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-rw-r--r--target/arm/machine.c4
-rw-r--r--target/i386/machine.c7
-rw-r--r--target/ppc/machine.c4
-rw-r--r--target/s390x/machine.c4
-rw-r--r--target/sparc/machine.c4
5 files changed, 17 insertions, 6 deletions
diff --git a/target/arm/machine.c b/target/arm/machine.c
index e5fe083da4..29df7ac87d 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -394,7 +394,7 @@ static const VMStateInfo vmstate_powered_off = {
.put = put_power,
};
-static void cpu_pre_save(void *opaque)
+static int cpu_pre_save(void *opaque)
{
ARMCPU *cpu = opaque;
@@ -415,6 +415,8 @@ static void cpu_pre_save(void *opaque)
cpu->cpreg_array_len * sizeof(uint64_t));
memcpy(cpu->cpreg_vmstate_values, cpu->cpreg_values,
cpu->cpreg_array_len * sizeof(uint64_t));
+
+ return 0;
}
static int cpu_post_load(void *opaque, int version_id)
diff --git a/target/i386/machine.c b/target/i386/machine.c
index 29cc58eda9..df5ec359eb 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -160,13 +160,15 @@ static floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper)
return temp.d;
}
-static void fpreg_pre_save(void *opaque)
+static int fpreg_pre_save(void *opaque)
{
x86_FPReg_tmp *tmp = opaque;
/* we save the real CPU data (in case of MMX usage only 'mant'
contains the MMX register */
cpu_get_fp80(&tmp->tmp_mant, &tmp->tmp_exp, tmp->parent->d);
+
+ return 0;
}
static int fpreg_post_load(void *opaque, int version)
@@ -196,7 +198,7 @@ static const VMStateDescription vmstate_fpreg = {
}
};
-static void cpu_pre_save(void *opaque)
+static int cpu_pre_save(void *opaque)
{
X86CPU *cpu = opaque;
CPUX86State *env = &cpu->env;
@@ -228,6 +230,7 @@ static void cpu_pre_save(void *opaque)
env->segs[R_SS].flags &= ~(env->segs[R_SS].flags & DESC_DPL_MASK);
}
+ return 0;
}
static int cpu_post_load(void *opaque, int version_id)
diff --git a/target/ppc/machine.c b/target/ppc/machine.c
index e36b7100cb..384caee800 100644
--- a/target/ppc/machine.c
+++ b/target/ppc/machine.c
@@ -146,7 +146,7 @@ static bool cpu_pre_2_8_migration(void *opaque, int version_id)
return cpu->pre_2_8_migration;
}
-static void cpu_pre_save(void *opaque)
+static int cpu_pre_save(void *opaque)
{
PowerPCCPU *cpu = opaque;
CPUPPCState *env = &cpu->env;
@@ -195,6 +195,8 @@ static void cpu_pre_save(void *opaque)
cpu->mig_insns_flags2 = env->insns_flags2 & insns_compat_mask2;
cpu->mig_nb_BATs = env->nb_BATs;
}
+
+ return 0;
}
/*
diff --git a/target/s390x/machine.c b/target/s390x/machine.c
index 097a147dbb..e1b7015d20 100644
--- a/target/s390x/machine.c
+++ b/target/s390x/machine.c
@@ -37,13 +37,15 @@ static int cpu_post_load(void *opaque, int version_id)
return 0;
}
-static void cpu_pre_save(void *opaque)
+static int cpu_pre_save(void *opaque)
{
S390CPU *cpu = opaque;
if (kvm_enabled()) {
kvm_s390_vcpu_interrupt_pre_save(cpu);
}
+
+ return 0;
}
static inline bool fpu_needed(void *opaque)
diff --git a/target/sparc/machine.c b/target/sparc/machine.c
index 6bd6b8ee3e..8ff9dea297 100644
--- a/target/sparc/machine.c
+++ b/target/sparc/machine.c
@@ -88,7 +88,7 @@ static const VMStateInfo vmstate_psr = {
.put = put_psr,
};
-static void cpu_pre_save(void *opaque)
+static int cpu_pre_save(void *opaque)
{
SPARCCPU *cpu = opaque;
CPUSPARCState *env = &cpu->env;
@@ -97,6 +97,8 @@ static void cpu_pre_save(void *opaque)
* window as the outs of the first window
*/
cpu_set_cwp(env, env->cwp);
+
+ return 0;
}
/* 32-bit SPARC retains migration compatibility with older versions