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-rw-r--r--target/arm/translate.c14
1 files changed, 5 insertions, 9 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c
index b604a820c0..24e522e1d6 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -6596,8 +6596,8 @@ static bool trans_TT(DisasContext *s, arg_TT *a)
}
addr = load_reg(s, a->rn);
- tmp = tcg_const_i32((a->A << 1) | a->T);
- gen_helper_v7m_tt(tmp, cpu_env, addr, tmp);
+ tmp = tcg_temp_new_i32();
+ gen_helper_v7m_tt(tmp, cpu_env, addr, tcg_constant_i32((a->A << 1) | a->T));
tcg_temp_free_i32(addr);
store_reg(s, a->rd, tmp);
return true;
@@ -7564,7 +7564,7 @@ static bool trans_PKH(DisasContext *s, arg_PKH *a)
static bool op_sat(DisasContext *s, arg_sat *a,
void (*gen)(TCGv_i32, TCGv_env, TCGv_i32, TCGv_i32))
{
- TCGv_i32 tmp, satimm;
+ TCGv_i32 tmp;
int shift = a->imm;
if (!ENABLE_ARCH_6) {
@@ -7578,9 +7578,7 @@ static bool op_sat(DisasContext *s, arg_sat *a,
tcg_gen_shli_i32(tmp, tmp, shift);
}
- satimm = tcg_const_i32(a->satimm);
- gen(tmp, cpu_env, tmp, satimm);
- tcg_temp_free_i32(satimm);
+ gen(tmp, cpu_env, tmp, tcg_constant_i32(a->satimm));
store_reg(s, a->rd, tmp);
return true;
@@ -7915,9 +7913,7 @@ static bool op_smmla(DisasContext *s, arg_rrrr *a, bool round, bool sub)
* a non-zero multiplicand lowpart, and the correct result
* lowpart for rounding.
*/
- TCGv_i32 zero = tcg_const_i32(0);
- tcg_gen_sub2_i32(t2, t1, zero, t3, t2, t1);
- tcg_temp_free_i32(zero);
+ tcg_gen_sub2_i32(t2, t1, tcg_constant_i32(0), t3, t2, t1);
} else {
tcg_gen_add_i32(t1, t1, t3);
}