diff options
Diffstat (limited to 'target')
| -rw-r--r-- | target/arm/translate-a64.c | 2 | ||||
| -rw-r--r-- | target/arm/translate.c | 6 | ||||
| -rw-r--r-- | target/m68k/op_helper.c | 2 | ||||
| -rw-r--r-- | target/nios2/translate.c | 2 | ||||
| -rw-r--r-- | target/xtensa/translate.c | 6 |
5 files changed, 9 insertions, 9 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 163df8c615..3decc8da57 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -2219,7 +2219,7 @@ static void disas_exc(DisasContext *s, uint32_t insn) * it is required for halting debug disabled: it will UNDEF. * Secondly, "HLT 0xf000" is the A64 semihosting syscall instruction. */ - if (semihosting_enabled() && imm16 == 0xf000) { + if (semihosting_enabled(false) && imm16 == 0xf000) { #ifndef CONFIG_USER_ONLY /* In system mode, don't allow userspace access to semihosting, * to provide some semblance of security (and for consistency diff --git a/target/arm/translate.c b/target/arm/translate.c index 9474e4b44b..b1e013270d 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -1169,7 +1169,7 @@ static inline void gen_hlt(DisasContext *s, int imm) * semihosting, to provide some semblance of security * (and for consistency with our 32-bit semihosting). */ - if (semihosting_enabled() && + if (semihosting_enabled(false) && #ifndef CONFIG_USER_ONLY s->current_el != 0 && #endif @@ -6556,7 +6556,7 @@ static bool trans_BKPT(DisasContext *s, arg_BKPT *a) /* BKPT is OK with ECI set and leaves it untouched */ s->eci_handled = true; if (arm_dc_feature(s, ARM_FEATURE_M) && - semihosting_enabled() && + semihosting_enabled(false) && #ifndef CONFIG_USER_ONLY !IS_USER(s) && #endif @@ -8764,7 +8764,7 @@ static bool trans_SVC(DisasContext *s, arg_SVC *a) { const uint32_t semihost_imm = s->thumb ? 0xab : 0x123456; - if (!arm_dc_feature(s, ARM_FEATURE_M) && semihosting_enabled() && + if (!arm_dc_feature(s, ARM_FEATURE_M) && semihosting_enabled(false) && #ifndef CONFIG_USER_ONLY !IS_USER(s) && #endif diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index d9937ca8dc..4b3dfec130 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -203,7 +203,7 @@ static void cf_interrupt_all(CPUM68KState *env, int is_hw) cf_rte(env); return; case EXCP_HALT_INSN: - if (semihosting_enabled() + if (semihosting_enabled(false) && (env->sr & SR_S) != 0 && (env->pc & 3) == 0 && cpu_lduw_code(env, env->pc - 4) == 0x4e71 diff --git a/target/nios2/translate.c b/target/nios2/translate.c index c588e8e885..ff631a42f6 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -818,7 +818,7 @@ static void gen_break(DisasContext *dc, uint32_t code, uint32_t flags) #ifndef CONFIG_USER_ONLY /* The semihosting instruction is "break 1". */ R_TYPE(instr, code); - if (semihosting_enabled() && instr.imm5 == 1) { + if (semihosting_enabled(false) && instr.imm5 == 1) { t_gen_helper_raise_exception(dc, EXCP_SEMIHOST); return; } diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index 8b864ef925..afae8a1bea 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -2366,9 +2366,9 @@ static uint32_t test_exceptions_simcall(DisasContext *dc, bool ill = true; #else /* Between RE.2 and RE.3 simcall opcode's become nop for the hardware. */ - bool ill = dc->config->hw_version <= 250002 && !semihosting_enabled(); + bool ill = dc->config->hw_version <= 250002 && !semihosting_enabled(false); #endif - if (ill || !semihosting_enabled()) { + if (ill || !semihosting_enabled(false)) { qemu_log_mask(LOG_GUEST_ERROR, "SIMCALL but semihosting is disabled\n"); } return ill ? XTENSA_OP_ILL : 0; @@ -2378,7 +2378,7 @@ static void translate_simcall(DisasContext *dc, const OpcodeArg arg[], const uint32_t par[]) { #ifndef CONFIG_USER_ONLY - if (semihosting_enabled()) { + if (semihosting_enabled(false)) { gen_helper_simcall(cpu_env); } #endif |