diff options
Diffstat (limited to 'target')
-rw-r--r-- | target/arm/helper.c | 2 | ||||
-rw-r--r-- | target/arm/translate.c | 2 | ||||
-rw-r--r-- | target/i386/cpu.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c index 1a8b06410e..e1bdc80c35 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -3898,7 +3898,7 @@ static const ARMCPRegInfo cache_dirty_status_cp_reginfo[] = { }; static const ARMCPRegInfo cache_block_ops_cp_reginfo[] = { - /* We never have a a block transfer operation in progress */ + /* We never have a block transfer operation in progress */ { .name = "BXSR", .cp = 15, .crn = 7, .crm = 12, .opc1 = 0, .opc2 = 4, .access = PL0_R, .type = ARM_CP_CONST | ARM_CP_NO_RAW, .resetvalue = 0 }, diff --git a/target/arm/translate.c b/target/arm/translate.c index 4ffb095c73..ad617b9948 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -8056,7 +8056,7 @@ static TCGv_i32 op_addr_block_pre(DisasContext *s, arg_ldst_block *a, int n) * If the writeback is incrementing SP rather than * decrementing it, and the initial SP is below the * stack limit but the final written-back SP would - * be above, then then we must not perform any memory + * be above, then we must not perform any memory * accesses, but it is IMPDEF whether we generate * an exception. We choose to do so in this case. * At this point 'addr' is the lowest address, so diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 6a57ef13af..194b5a31af 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3632,7 +3632,7 @@ static const X86CPUDefinition builtin_x86_defs[] = { CPUID_7_0_EDX_CORE_CAPABILITY, .features[FEAT_CORE_CAPABILITY] = MSR_CORE_CAP_SPLIT_LOCK_DETECT, - /* XSAVES is is added in version 3 */ + /* XSAVES is added in version 3 */ .features[FEAT_XSAVE] = CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | CPUID_XSAVE_XGETBV1, |