diff options
Diffstat (limited to 'target/xtensa')
-rw-r--r-- | target/xtensa/helper.h | 2 | ||||
-rw-r--r-- | target/xtensa/op_helper.c | 15 | ||||
-rw-r--r-- | target/xtensa/translate.c | 4 |
3 files changed, 3 insertions, 18 deletions
diff --git a/target/xtensa/helper.h b/target/xtensa/helper.h index db3c9c5f21..cc751c98fb 100644 --- a/target/xtensa/helper.h +++ b/target/xtensa/helper.h @@ -3,8 +3,6 @@ DEF_HELPER_3(exception_cause, noreturn, env, i32, i32) DEF_HELPER_4(exception_cause_vaddr, noreturn, env, i32, i32, i32) DEF_HELPER_3(debug_exception, noreturn, env, i32, i32) -DEF_HELPER_FLAGS_1(nsa, TCG_CALL_NO_RWG_SE, i32, i32) -DEF_HELPER_FLAGS_1(nsau, TCG_CALL_NO_RWG_SE, i32, i32) DEF_HELPER_2(wsr_windowbase, void, env, i32) DEF_HELPER_4(entry, void, env, i32, i32, i32) DEF_HELPER_2(retw, i32, env, i32) diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index b456c2ec3f..af2723445d 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -164,19 +164,6 @@ void HELPER(debug_exception)(CPUXtensaState *env, uint32_t pc, uint32_t cause) HELPER(exception)(env, EXC_DEBUG); } -uint32_t HELPER(nsa)(uint32_t v) -{ - if (v & 0x80000000) { - v = ~v; - } - return v ? clz32(v) - 1 : 31; -} - -uint32_t HELPER(nsau)(uint32_t v) -{ - return v ? clz32(v) : 32; -} - static void copy_window_from_phys(CPUXtensaState *env, uint32_t window, uint32_t phys, uint32_t n) { @@ -537,7 +524,7 @@ void HELPER(wsr_rasid)(CPUXtensaState *env, uint32_t v) v = (v & 0xffffff00) | 0x1; if (v != env->sregs[RASID]) { env->sregs[RASID] = v; - tlb_flush(CPU(cpu), 1); + tlb_flush(CPU(cpu)); } } diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index c0408a01c7..263002486c 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -1450,14 +1450,14 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) case 14: /*NSAu*/ HAS_OPTION(XTENSA_OPTION_MISC_OP_NSA); if (gen_window_check2(dc, RRR_S, RRR_T)) { - gen_helper_nsa(cpu_R[RRR_T], cpu_R[RRR_S]); + tcg_gen_clrsb_i32(cpu_R[RRR_T], cpu_R[RRR_S]); } break; case 15: /*NSAUu*/ HAS_OPTION(XTENSA_OPTION_MISC_OP_NSA); if (gen_window_check2(dc, RRR_S, RRR_T)) { - gen_helper_nsau(cpu_R[RRR_T], cpu_R[RRR_S]); + tcg_gen_clzi_i32(cpu_R[RRR_T], cpu_R[RRR_S], 32); } break; |