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-rw-r--r--target/sh4/cpu.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h
index dbe00e29c2..360eac1fbe 100644
--- a/target/sh4/cpu.h
+++ b/target/sh4/cpu.h
@@ -209,6 +209,26 @@ struct ArchCPU {
CPUSH4State env;
};
+/**
+ * SuperHCPUClass:
+ * @parent_realize: The parent class' realize handler.
+ * @parent_phases: The parent class' reset phase handlers.
+ * @pvr: Processor Version Register
+ * @prr: Processor Revision Register
+ * @cvr: Cache Version Register
+ *
+ * A SuperH CPU model.
+ */
+struct SuperHCPUClass {
+ CPUClass parent_class;
+
+ DeviceRealize parent_realize;
+ ResettablePhases parent_phases;
+
+ uint32_t pvr;
+ uint32_t prr;
+ uint32_t cvr;
+};
void superh_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
int superh_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);