7 files changed, 16 insertions, 3 deletions
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 86fd8693a8..6f2b644220 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -19,6 +19,7 @@
 
 #include "qemu/osdep.h"
 #include "qemu/qemu-print.h"
+#include "qemu/ctype.h"
 #include "qemu/log.h"
 #include "cpu.h"
 #include "exec/exec-all.h"
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index a935b17dbd..6c5de37b25 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -20,7 +20,6 @@
 #ifndef RISCV_CPU_H
 #define RISCV_CPU_H
 
-#include "qemu-common.h"
 #include "qom/cpu.h"
 #include "exec/cpu-defs.h"
 #include "fpu/softfloat.h"
diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
index dc9d53d4be..47450a3cdb 100644
--- a/target/riscv/cpu_bits.h
+++ b/target/riscv/cpu_bits.h
@@ -1,5 +1,8 @@
 /* RISC-V ISA constants */
 
+#ifndef TARGET_RISCV_CPU_BITS_H
+#define TARGET_RISCV_CPU_BITS_H
+
 #define get_field(reg, mask) (((reg) & \
                  (target_ulong)(mask)) / ((mask) & ~((mask) << 1)))
 #define set_field(reg, mask, val) (((reg) & ~(target_ulong)(mask)) | \
@@ -527,3 +530,5 @@
 #define SIP_SSIP                           MIP_SSIP
 #define SIP_STIP                           MIP_STIP
 #define SIP_SEIP                           MIP_SEIP
+
+#endif
diff --git a/target/riscv/cpu_user.h b/target/riscv/cpu_user.h
index 52d380aa98..02afad608b 100644
--- a/target/riscv/cpu_user.h
+++ b/target/riscv/cpu_user.h
@@ -1,3 +1,6 @@
+#ifndef TARGET_RISCV_CPU_USER_H
+#define TARGET_RISCV_CPU_USER_H
+
 #define xRA 1   /* return address (aka link register) */
 #define xSP 2   /* stack pointer */
 #define xGP 3   /* global pointer */
@@ -12,3 +15,5 @@
 #define xA6 16
 #define xA7 17  /* syscall number for RVI ABI */
 #define xT0 5   /* syscall number for RVE ABI */
+
+#endif
diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c
index dfcdd834cf..27be93279b 100644
--- a/target/riscv/gdbstub.c
+++ b/target/riscv/gdbstub.c
@@ -17,7 +17,6 @@
  */
 
 #include "qemu/osdep.h"
-#include "qemu-common.h"
 #include "exec/gdbstub.h"
 #include "cpu.h"
 
diff --git a/target/riscv/instmap.h b/target/riscv/instmap.h
index 58baa1ba1f..f8ad7d60fd 100644
--- a/target/riscv/instmap.h
+++ b/target/riscv/instmap.h
@@ -16,6 +16,9 @@
  * this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
+#ifndef TARGET_RISCV_INSTMAP_H
+#define TARGET_RISCV_INSTMAP_H
+
 #define MASK_OP_MAJOR(op)  (op & 0x7F)
 enum {
     /* rv32i, rv64i, rv32m */
@@ -362,3 +365,5 @@ enum {
 #define GET_C_RS2(inst)             extract32(inst, 2, 5)
 #define GET_C_RS1S(inst)            (8 + extract32(inst, 7, 3))
 #define GET_C_RS2S(inst)            (8 + extract32(inst, 2, 3))
+
+#endif
diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c
index b11c4ae22f..fed1c3c030 100644
--- a/target/riscv/pmp.c
+++ b/target/riscv/pmp.c
@@ -27,7 +27,6 @@
 #include "qemu/log.h"
 #include "qapi/error.h"
 #include "cpu.h"
-#include "qemu-common.h"
 
 #ifndef CONFIG_USER_ONLY