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-rw-r--r--target/riscv/vector_helper.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c
index 84cec73eb2..fe56c007d5 100644
--- a/target/riscv/vector_helper.c
+++ b/target/riscv/vector_helper.c
@@ -44,6 +44,7 @@ target_ulong HELPER(vsetvl)(CPURISCVState *env, target_ulong s1,
target_ulong reserved = s2 &
MAKE_64BIT_MASK(R_VTYPE_RESERVED_SHIFT,
xlen - 1 - R_VTYPE_RESERVED_SHIFT);
+ uint16_t vlen = cpu->cfg.vlenb << 3;
int8_t lmul;
if (vlmul & 4) {
@@ -53,10 +54,8 @@ target_ulong HELPER(vsetvl)(CPURISCVState *env, target_ulong s1,
* VLEN * LMUL >= SEW
* VLEN >> (8 - lmul) >= sew
* (vlenb << 3) >> (8 - lmul) >= sew
- * vlenb >> (8 - 3 - lmul) >= sew
*/
- if (vlmul == 4 ||
- cpu->cfg.vlenb >> (8 - 3 - vlmul) < sew) {
+ if (vlmul == 4 || (vlen >> (8 - vlmul)) < sew) {
vill = true;
}
}