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Diffstat (limited to 'target/riscv/cpu.h')
-rw-r--r--target/riscv/cpu.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 53335def23..d2529b757a 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -308,6 +308,9 @@ struct CPUArchState {
uint64_t mfromhost;
uint64_t mtohost;
+ /* Sstc CSRs */
+ uint64_t stimecmp;
+
/* physical memory protection */
pmp_table_t pmp_state;
target_ulong mseccfg;
@@ -361,6 +364,7 @@ struct CPUArchState {
float_status fp_status;
/* Fields from here on are preserved across CPU reset. */
+ QEMUTimer *stimer; /* Internal timer for S-mode interrupt */
hwaddr kernel_addr;
hwaddr fdt_addr;
@@ -424,6 +428,7 @@ struct RISCVCPUConfig {
bool ext_ifencei;
bool ext_icsr;
bool ext_zihintpause;
+ bool ext_sstc;
bool ext_svinval;
bool ext_svnapot;
bool ext_svpbmt;