diff options
Diffstat (limited to 'target/openrisc')
| -rw-r--r-- | target/openrisc/cpu.h | 2 | ||||
| -rw-r--r-- | target/openrisc/translate.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 92c38f54c2..ce4d605eb7 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -290,7 +290,7 @@ typedef struct CPUArchState { int is_counting; uint32_t picmr; /* Interrupt mask register */ - uint32_t picsr; /* Interrupt contrl register*/ + uint32_t picsr; /* Interrupt control register */ #endif } CPUOpenRISCState; diff --git a/target/openrisc/translate.c b/target/openrisc/translate.c index 7760329e75..a86360d4f5 100644 --- a/target/openrisc/translate.c +++ b/target/openrisc/translate.c @@ -273,7 +273,7 @@ static void gen_div(DisasContext *dc, TCGv dest, TCGv srca, TCGv srcb) tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_sr_ov, srcb, 0); /* The result of divide-by-zero is undefined. - Supress the host-side exception by dividing by 1. */ + Suppress the host-side exception by dividing by 1. */ tcg_gen_or_tl(t0, srcb, cpu_sr_ov); tcg_gen_div_tl(dest, srca, t0); @@ -287,7 +287,7 @@ static void gen_divu(DisasContext *dc, TCGv dest, TCGv srca, TCGv srcb) tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_sr_cy, srcb, 0); /* The result of divide-by-zero is undefined. - Supress the host-side exception by dividing by 1. */ + Suppress the host-side exception by dividing by 1. */ tcg_gen_or_tl(t0, srcb, cpu_sr_cy); tcg_gen_divu_tl(dest, srca, t0); |