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Diffstat (limited to 'target/openrisc')
-rw-r--r--target/openrisc/mmu.c24
1 files changed, 20 insertions, 4 deletions
diff --git a/target/openrisc/mmu.c b/target/openrisc/mmu.c
index 56b11d3d68..ce2a29dd1a 100644
--- a/target/openrisc/mmu.c
+++ b/target/openrisc/mmu.c
@@ -124,7 +124,7 @@ static int cpu_openrisc_get_phys_addr(OpenRISCCPU *cpu,
{
int ret = TLBRET_MATCH;
- if (rw == 2) { /* ITLB */
+ if (rw == MMU_INST_FETCH) { /* ITLB */
*physical = 0;
ret = cpu->env.tlb->cpu_openrisc_map_address_code(cpu, physical,
prot, address, rw);
@@ -221,12 +221,28 @@ hwaddr openrisc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
OpenRISCCPU *cpu = OPENRISC_CPU(cs);
hwaddr phys_addr;
int prot;
+ int miss;
- if (cpu_openrisc_get_phys_addr(cpu, &phys_addr, &prot, addr, 0)) {
- return -1;
+ /* Check memory for any kind of address, since during debug the
+ gdb can ask for anything, check data tlb for address */
+ miss = cpu_openrisc_get_phys_addr(cpu, &phys_addr, &prot, addr, 0);
+
+ /* Check instruction tlb */
+ if (miss) {
+ miss = cpu_openrisc_get_phys_addr(cpu, &phys_addr, &prot, addr,
+ MMU_INST_FETCH);
+ }
+
+ /* Last, fall back to a plain address */
+ if (miss) {
+ miss = cpu_openrisc_get_phys_nommu(cpu, &phys_addr, &prot, addr, 0);
}
- return phys_addr;
+ if (miss) {
+ return -1;
+ } else {
+ return phys_addr;
+ }
}
void cpu_openrisc_mmu_init(OpenRISCCPU *cpu)