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Diffstat (limited to 'target/openrisc/cpu.c')
-rw-r--r--target/openrisc/cpu.c12
1 files changed, 8 insertions, 4 deletions
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index de0176cd20..4c11a1f7ad 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -70,13 +70,15 @@ static void openrisc_disas_set_info(CPUState *cpu, disassemble_info *info)
info->print_insn = print_insn_or1k;
}
-static void openrisc_cpu_reset(DeviceState *dev)
+static void openrisc_cpu_reset_hold(Object *obj)
{
- CPUState *s = CPU(dev);
+ CPUState *s = CPU(obj);
OpenRISCCPU *cpu = OPENRISC_CPU(s);
OpenRISCCPUClass *occ = OPENRISC_CPU_GET_CLASS(cpu);
- occ->parent_reset(dev);
+ if (occ->parent_phases.hold) {
+ occ->parent_phases.hold(obj);
+ }
memset(&cpu->env, 0, offsetof(CPUOpenRISCState, end_reset_fields));
@@ -229,10 +231,12 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
OpenRISCCPUClass *occ = OPENRISC_CPU_CLASS(oc);
CPUClass *cc = CPU_CLASS(occ);
DeviceClass *dc = DEVICE_CLASS(oc);
+ ResettableClass *rc = RESETTABLE_CLASS(oc);
device_class_set_parent_realize(dc, openrisc_cpu_realizefn,
&occ->parent_realize);
- device_class_set_parent_reset(dc, openrisc_cpu_reset, &occ->parent_reset);
+ resettable_class_set_parent_phases(rc, NULL, openrisc_cpu_reset_hold, NULL,
+ &occ->parent_phases);
cc->class_by_name = openrisc_cpu_class_by_name;
cc->has_work = openrisc_cpu_has_work;