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-rw-r--r--target/mips/cpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index c218ccc4a8..7cf1b49895 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -961,7 +961,7 @@ struct CPUMIPSState {
/*
* CP0 Register 19
*/
- int32_t CP0_WatchHi[8];
+ uint64_t CP0_WatchHi[8];
#define CP0WH_ASID 16
/*
* CP0 Register 20