diff options
Diffstat (limited to 'target/mips/cp0_timer.c')
| -rw-r--r-- | target/mips/cp0_timer.c | 23 |
1 files changed, 6 insertions, 17 deletions
diff --git a/target/mips/cp0_timer.c b/target/mips/cp0_timer.c index 6fec5fe0ff..5ec0d6249e 100644 --- a/target/mips/cp0_timer.c +++ b/target/mips/cp0_timer.c @@ -27,18 +27,6 @@ #include "sysemu/kvm.h" #include "internal.h" -/* - * Since commit 6af0bf9c7c3 this model assumes a CPU clocked at 200MHz - * and a CP0 timer running at half the clock of the CPU (cp0_count_rate = 2). - * - * TIMER_FREQ_HZ = CPU_FREQ_HZ / CP0_COUNT_RATE = 200 MHz / 2 = 100 MHz - * - * TIMER_PERIOD_NS = 1 / TIMER_FREQ_HZ = 10 ns - */ -#define CPU_FREQ_HZ_DEFAULT 200000000 -#define CP0_COUNT_RATE_DEFAULT 2 -#define TIMER_PERIOD 10 /* 1 / (CPU_FREQ_HZ / CP0_COUNT_RATE) */ - /* MIPS R4K timer */ static void cpu_mips_timer_update(CPUMIPSState *env) { @@ -47,8 +35,8 @@ static void cpu_mips_timer_update(CPUMIPSState *env) now_ns = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); wait = env->CP0_Compare - env->CP0_Count - - (uint32_t)(now_ns / TIMER_PERIOD); - next_ns = now_ns + (uint64_t)wait * TIMER_PERIOD; + (uint32_t)(now_ns / env->cp0_count_ns); + next_ns = now_ns + (uint64_t)wait * env->cp0_count_ns; timer_mod(env->timer, next_ns); } @@ -76,7 +64,7 @@ uint32_t cpu_mips_get_count(CPUMIPSState *env) cpu_mips_timer_expire(env); } - return env->CP0_Count + (uint32_t)(now_ns / TIMER_PERIOD); + return env->CP0_Count + (uint32_t)(now_ns / env->cp0_count_ns); } } @@ -92,7 +80,8 @@ void cpu_mips_store_count(CPUMIPSState *env, uint32_t count) } else { /* Store new count register */ env->CP0_Count = count - - (uint32_t)(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / TIMER_PERIOD); + (uint32_t)(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / + env->cp0_count_ns); /* Update timer timer */ cpu_mips_timer_update(env); } @@ -119,7 +108,7 @@ void cpu_mips_stop_count(CPUMIPSState *env) { /* Store the current value */ env->CP0_Count += (uint32_t)(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / - TIMER_PERIOD); + env->cp0_count_ns); } static void mips_timer_cb(void *opaque) |