diff options
Diffstat (limited to 'target/microblaze/translate.c')
| -rw-r--r-- | target/microblaze/translate.c | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index a2bba0fe61..a862ac4055 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -59,7 +59,6 @@ static TCGv_i32 cpu_pc; static TCGv_i32 cpu_msr; static TCGv_i64 cpu_ear; static TCGv_i32 cpu_esr; -static TCGv_i64 cpu_edr; static TCGv_i32 env_imm; static TCGv_i32 env_btaken; static TCGv_i32 cpu_btarget; @@ -548,7 +547,8 @@ static void dec_msr(DisasContext *dc) cpu_env, offsetof(CPUMBState, btr)); break; case SR_EDR: - tcg_gen_extu_i32_i64(cpu_edr, cpu_R[dc->ra]); + tcg_gen_st_i32(cpu_R[dc->ra], + cpu_env, offsetof(CPUMBState, edr)); break; case 0x800: tcg_gen_st_i32(cpu_R[dc->ra], @@ -591,7 +591,8 @@ static void dec_msr(DisasContext *dc) cpu_env, offsetof(CPUMBState, btr)); break; case SR_EDR: - tcg_gen_extrl_i64_i32(cpu_R[dc->rd], cpu_edr); + tcg_gen_ld_i32(cpu_R[dc->rd], + cpu_env, offsetof(CPUMBState, edr)); break; case 0x800: tcg_gen_ld_i32(cpu_R[dc->rd], @@ -1818,7 +1819,7 @@ void mb_cpu_dump_state(CPUState *cs, FILE *f, int flags) } /* Registers that aren't modeled are reported as 0 */ - qemu_fprintf(f, "redr=%" PRIx64 " rpid=0 rzpr=0 rtlbx=0 rtlbsx=0 " + qemu_fprintf(f, "redr=%x rpid=0 rzpr=0 rtlbx=0 rtlbsx=0 " "rtlblo=0 rtlbhi=0\n", env->edr); qemu_fprintf(f, "slr=%x shr=%x\n", env->slr, env->shr); for (i = 0; i < 32; i++) { @@ -1868,8 +1869,6 @@ void mb_tcg_init(void) tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, ear), "rear"); cpu_esr = tcg_global_mem_new_i32(cpu_env, offsetof(CPUMBState, esr), "resr"); - cpu_edr = - tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, edr), "redr"); } void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb, |