aboutsummaryrefslogtreecommitdiff
path: root/target/microblaze/translate.c
diff options
context:
space:
mode:
Diffstat (limited to 'target/microblaze/translate.c')
-rw-r--r--target/microblaze/translate.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 62747b02f3..411c7b6e49 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -1809,7 +1809,7 @@ void mb_cpu_dump_state(CPUState *cs, FILE *f, int flags)
qemu_fprintf(f, "rmsr=%" PRIx64 " resr=%" PRIx64 " rear=%" PRIx64 " "
"debug=%x imm=%x iflags=%x fsr=%" PRIx64 " "
"rbtr=%" PRIx64 "\n",
- env->msr, env->sregs[SR_ESR], env->ear,
+ env->msr, env->esr, env->ear,
env->debug, env->imm, env->iflags, env->sregs[SR_FSR],
env->sregs[SR_BTR]);
qemu_fprintf(f, "btaken=%d btarget=%" PRIx64 " mode=%s(saved=%s) "
@@ -1875,8 +1875,10 @@ void mb_tcg_init(void)
tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, msr), "rmsr");
cpu_SR[SR_EAR] =
tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, ear), "rear");
+ cpu_SR[SR_ESR] =
+ tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, esr), "resr");
- for (i = SR_EAR + 1; i < ARRAY_SIZE(cpu_SR); i++) {
+ for (i = SR_ESR + 1; i < ARRAY_SIZE(cpu_SR); i++) {
cpu_SR[i] = tcg_global_mem_new_i64(cpu_env,
offsetof(CPUMBState, sregs[i]),
special_regnames[i]);