diff options
Diffstat (limited to 'target/hppa')
| -rw-r--r-- | target/hppa/cpu.h | 1 | ||||
| -rw-r--r-- | target/hppa/helper.h | 1 | ||||
| -rw-r--r-- | target/hppa/mem_helper.c | 21 | ||||
| -rw-r--r-- | target/hppa/op_helper.c | 10 | ||||
| -rw-r--r-- | target/hppa/translate.c | 30 |
5 files changed, 58 insertions, 5 deletions
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 3782e1d834..54f11d4e18 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -345,5 +345,6 @@ int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx, extern const MemoryRegionOps hppa_io_eir_ops; void hppa_cpu_alarm_timer(void *); #endif +void QEMU_NORETURN hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra); #endif /* HPPA_CPU_H */ diff --git a/target/hppa/helper.h b/target/hppa/helper.h index f059ddf3b9..1e733b7926 100644 --- a/target/hppa/helper.h +++ b/target/hppa/helper.h @@ -90,4 +90,5 @@ DEF_HELPER_FLAGS_3(itlba, TCG_CALL_NO_RWG, void, env, tl, tr) DEF_HELPER_FLAGS_3(itlbp, TCG_CALL_NO_RWG, void, env, tl, tr) DEF_HELPER_FLAGS_2(ptlb, TCG_CALL_NO_RWG, void, env, tl) DEF_HELPER_FLAGS_1(ptlbe, TCG_CALL_NO_RWG, void, env) +DEF_HELPER_FLAGS_2(lpa, TCG_CALL_NO_WG, tr, env, tl) #endif diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index 995b1937f6..ecd964d779 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -314,4 +314,25 @@ void HELPER(ptlbe)(CPUHPPAState *env) memset(env->tlb, 0, sizeof(env->tlb)); tlb_flush_by_mmuidx(src, 0xf); } + +target_ureg HELPER(lpa)(CPUHPPAState *env, target_ulong addr) +{ + hwaddr phys; + int prot, excp; + + excp = hppa_get_physical_address(env, addr, MMU_KERNEL_IDX, 0, + &phys, &prot); + if (excp >= 0) { + if (env->psw & PSW_Q) { + /* ??? Needs tweaking for hppa64. */ + env->cr[CR_IOR] = addr; + env->cr[CR_ISR] = addr >> 32; + } + if (excp == EXCP_DTLB_MISS) { + excp = EXCP_NA_DTLB_MISS; + } + hppa_dynamic_excp(env, excp, GETPC()); + } + return phys; +} #endif /* CONFIG_USER_ONLY */ diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index 8c546f4882..ef2951386c 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -34,7 +34,7 @@ void QEMU_NORETURN HELPER(excp)(CPUHPPAState *env, int excp) cpu_loop_exit(cs); } -static void QEMU_NORETURN dynexcp(CPUHPPAState *env, int excp, uintptr_t ra) +void QEMU_NORETURN hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra) { HPPACPU *cpu = hppa_env_get_cpu(env); CPUState *cs = CPU(cpu); @@ -46,14 +46,14 @@ static void QEMU_NORETURN dynexcp(CPUHPPAState *env, int excp, uintptr_t ra) void HELPER(tsv)(CPUHPPAState *env, target_ureg cond) { if (unlikely((target_sreg)cond < 0)) { - dynexcp(env, EXCP_OVERFLOW, GETPC()); + hppa_dynamic_excp(env, EXCP_OVERFLOW, GETPC()); } } void HELPER(tcond)(CPUHPPAState *env, target_ureg cond) { if (unlikely(cond)) { - dynexcp(env, EXCP_COND, GETPC()); + hppa_dynamic_excp(env, EXCP_COND, GETPC()); } } @@ -237,7 +237,7 @@ static void update_fr0_op(CPUHPPAState *env, uintptr_t ra) env->fr[0] = (uint64_t)shadow << 32; if (hard_exp & shadow) { - dynexcp(env, EXCP_ASSIST, ra); + hppa_dynamic_excp(env, EXCP_ASSIST, ra); } } @@ -645,7 +645,7 @@ target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm) /* ??? On second reading this condition simply seems to be undefined rather than a diagnosed trap. */ if (nsm & ~psw & PSW_Q) { - dynexcp(env, EXCP_ILL, GETPC()); + hppa_dynamic_excp(env, EXCP_ILL, GETPC()); } env->psw = (psw & ~PSW_SM) | (nsm & PSW_SM); return psw & PSW_SM; diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 3d441ef4ac..082221f450 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2433,6 +2433,35 @@ static DisasJumpType trans_pxtlbx(DisasContext *ctx, uint32_t insn, return nullify_end(ctx, !is_data && (ctx->base.tb->flags & PSW_C) ? DISAS_IAQ_N_STALE : DISAS_NEXT); } + +static DisasJumpType trans_lpa(DisasContext *ctx, uint32_t insn, + const DisasInsn *di) +{ + unsigned rt = extract32(insn, 0, 5); + unsigned m = extract32(insn, 5, 1); + unsigned sp = extract32(insn, 14, 2); + unsigned rx = extract32(insn, 16, 5); + unsigned rb = extract32(insn, 21, 5); + TCGv_tl vaddr; + TCGv_reg ofs, paddr; + + CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); + nullify_over(ctx); + + form_gva(ctx, &vaddr, &ofs, rb, rx, 0, 0, sp, m, false); + + paddr = tcg_temp_new(); + gen_helper_lpa(paddr, cpu_env, vaddr); + + /* Note that physical address result overrides base modification. */ + if (m) { + save_gpr(ctx, rb, ofs); + } + save_gpr(ctx, rt, paddr); + tcg_temp_free(paddr); + + return nullify_end(ctx, DISAS_NEXT); +} #endif /* !CONFIG_USER_ONLY */ static const DisasInsn table_mem_mgmt[] = { @@ -2460,6 +2489,7 @@ static const DisasInsn table_mem_mgmt[] = { { 0x04000240u, 0xfc001fdfu, trans_pxtlbx }, /* pitlbe */ { 0x04001200u, 0xfc001fdfu, trans_pxtlbx }, /* pdtlb */ { 0x04001240u, 0xfc001fdfu, trans_pxtlbx }, /* pdtlbe */ + { 0x04001340u, 0xfc003fc0u, trans_lpa }, #endif }; |