aboutsummaryrefslogtreecommitdiff
path: root/target/arm/translate.h
diff options
context:
space:
mode:
Diffstat (limited to 'target/arm/translate.h')
-rw-r--r--target/arm/translate.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/target/arm/translate.h b/target/arm/translate.h
index 98b319f3f6..95b43e7ab6 100644
--- a/target/arm/translate.h
+++ b/target/arm/translate.h
@@ -305,4 +305,13 @@ void gen_sshl_i64(TCGv_i64 d, TCGv_i64 a, TCGv_i64 b);
#define dc_isar_feature(name, ctx) \
({ DisasContext *ctx_ = (ctx); isar_feature_##name(ctx_->isar); })
+/* Note that the gvec expanders operate on offsets + sizes. */
+typedef void GVecGen2Fn(unsigned, uint32_t, uint32_t, uint32_t, uint32_t);
+typedef void GVecGen2iFn(unsigned, uint32_t, uint32_t, int64_t,
+ uint32_t, uint32_t);
+typedef void GVecGen3Fn(unsigned, uint32_t, uint32_t,
+ uint32_t, uint32_t, uint32_t);
+typedef void GVecGen4Fn(unsigned, uint32_t, uint32_t, uint32_t,
+ uint32_t, uint32_t, uint32_t);
+
#endif /* TARGET_ARM_TRANSLATE_H */