diff options
Diffstat (limited to 'target/arm/cpu.h')
| -rw-r--r-- | target/arm/cpu.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 67e4e95d44..eb989d773a 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2045,6 +2045,20 @@ void armv7m_nvic_acknowledge_irq(void *opaque); */ int armv7m_nvic_complete_irq(void *opaque, int irq, bool secure); /** + * armv7m_nvic_get_ready_status(void *opaque, int irq, bool secure) + * @opaque: the NVIC + * @irq: the exception number to mark pending + * @secure: false for non-banked exceptions or for the nonsecure + * version of a banked exception, true for the secure version of a banked + * exception. + * + * Return whether an exception is "ready", i.e. whether the exception is + * enabled and is configured at a priority which would allow it to + * interrupt the current execution priority. This controls whether the + * RDY bit for it in the FPCCR is set. + */ +bool armv7m_nvic_get_ready_status(void *opaque, int irq, bool secure); +/** * armv7m_nvic_raw_execution_priority: return the raw execution priority * @opaque: the NVIC * |