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-rw-r--r--target/alpha/cpu.h2
-rw-r--r--target/alpha/translate.c2
2 files changed, 0 insertions, 4 deletions
diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index 4619530660..a530249a5b 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -23,8 +23,6 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
-#define ALIGNED_ONLY
-
/* Alpha processors have a weak memory model */
#define TCG_GUEST_DEFAULT_MO (0)
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index 2c9cccf6c1..1e29653aac 100644
--- a/target/alpha/translate.c
+++ b/target/alpha/translate.c
@@ -1332,7 +1332,6 @@ static DisasJumpType gen_mfpr(DisasContext *ctx, TCGv va, int regno)
if (use_icount) {
gen_io_start();
helper(va);
- gen_io_end();
return DISAS_PC_STALE;
} else {
helper(va);
@@ -2398,7 +2397,6 @@ static DisasJumpType translate_one(DisasContext *ctx, uint32_t insn)
if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
gen_io_start();
gen_helper_load_pcc(va, cpu_env);
- gen_io_end();
ret = DISAS_PC_STALE;
} else {
gen_helper_load_pcc(va, cpu_env);