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Diffstat (limited to 'target-xtensa')
-rw-r--r--target-xtensa/cpu.h1
-rw-r--r--target-xtensa/overlay_tool.h5
-rw-r--r--target-xtensa/translate.c20
3 files changed, 26 insertions, 0 deletions
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index 006bcb78b8..15ce0107d6 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -64,6 +64,7 @@ enum {
XTENSA_OPTION_MP_SYNCHRO,
XTENSA_OPTION_CONDITIONAL_STORE,
XTENSA_OPTION_ATOMCTL,
+ XTENSA_OPTION_DEPBITS,
/* Interrupts and exceptions */
XTENSA_OPTION_EXCEPTION,
diff --git a/target-xtensa/overlay_tool.h b/target-xtensa/overlay_tool.h
index eda03aaca9..e8a7fda3d8 100644
--- a/target-xtensa/overlay_tool.h
+++ b/target-xtensa/overlay_tool.h
@@ -30,6 +30,10 @@
{ .targno = (no), .type = (typ), .group = (grp), .size = (sz) },
#define XTREG_END { .targno = -1 },
+#ifndef XCHAL_HAVE_DEPBITS
+#define XCHAL_HAVE_DEPBITS 0
+#endif
+
#ifndef XCHAL_HAVE_DIV32
#define XCHAL_HAVE_DIV32 0
#endif
@@ -69,6 +73,7 @@
XCHAL_OPTION(XCHAL_HAVE_S32C1I, XTENSA_OPTION_CONDITIONAL_STORE) | \
XCHAL_OPTION(XCHAL_HAVE_S32C1I && XCHAL_HW_MIN_VERSION >= 230000, \
XTENSA_OPTION_ATOMCTL) | \
+ XCHAL_OPTION(XCHAL_HAVE_DEPBITS, XTENSA_OPTION_DEPBITS) | \
/* Interrupts and exceptions */ \
XCHAL_OPTION(XCHAL_HAVE_EXCEPTIONS, XTENSA_OPTION_EXCEPTION) | \
XCHAL_OPTION(XCHAL_HAVE_VECBASE, XTENSA_OPTION_RELOCATABLE_VECTOR) | \
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 1349d2f3da..be5eb25627 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -1972,6 +1972,16 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
break;
case 10: /*FP0*/
+ /*DEPBITS*/
+ if (option_enabled(dc, XTENSA_OPTION_DEPBITS)) {
+ if (!gen_window_check2(dc, RRR_S, RRR_T)) {
+ break;
+ }
+ tcg_gen_deposit_i32(cpu_R[RRR_T], cpu_R[RRR_T], cpu_R[RRR_S],
+ OP2, RRR_R + 1);
+ break;
+ }
+
HAS_OPTION(XTENSA_OPTION_FP_COPROCESSOR);
switch (OP2) {
case 0: /*ADD.Sf*/
@@ -2106,6 +2116,16 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc)
break;
case 11: /*FP1*/
+ /*DEPBITS*/
+ if (option_enabled(dc, XTENSA_OPTION_DEPBITS)) {
+ if (!gen_window_check2(dc, RRR_S, RRR_T)) {
+ break;
+ }
+ tcg_gen_deposit_i32(cpu_R[RRR_T], cpu_R[RRR_T], cpu_R[RRR_S],
+ OP2 + 16, RRR_R + 1);
+ break;
+ }
+
HAS_OPTION(XTENSA_OPTION_FP_COPROCESSOR);
#define gen_compare(rel, br, a, b) \