diff options
Diffstat (limited to 'target-tricore/translate.c')
| -rw-r--r-- | target-tricore/translate.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target-tricore/translate.c b/target-tricore/translate.c index 54a48cd694..663b2a0796 100644 --- a/target-tricore/translate.c +++ b/target-tricore/translate.c @@ -3440,7 +3440,7 @@ static void gen_compute_branch(DisasContext *ctx, uint32_t opc, int r1, break; case OPCM_32_BRR_LOOP: if (MASK_OP_BRR_OP2(ctx->opcode) == OPC2_32_BRR_LOOP) { - gen_loop(ctx, r1, offset * 2); + gen_loop(ctx, r2, offset * 2); } else { /* OPC2_32_BRR_LOOPU */ gen_goto_tb(ctx, 0, ctx->pc + offset * 2); @@ -3745,10 +3745,10 @@ static void decode_slr_opc(DisasContext *ctx, int op1) tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 2); break; case OPC1_16_SLR_LD_W: - tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESW); + tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESL); break; case OPC1_16_SLR_LD_W_POSTINC: - tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESW); + tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], cpu_gpr_a[r2], ctx->mem_idx, MO_LESL); tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], 4); break; } |