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Diffstat (limited to 'target-sparc')
-rw-r--r--target-sparc/helper.c14
-rw-r--r--target-sparc/op_helper.c4
-rw-r--r--target-sparc/op_mem.h28
-rw-r--r--target-sparc/translate.c23
4 files changed, 43 insertions, 26 deletions
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 76ad643ebb..5fc1da1a83 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -62,7 +62,7 @@ void cpu_unlock(void)
NULL, it means that the function was called in C code (i.e. not
from generated code or from helper.c) */
/* XXX: fix it to restore all registers */
-void tlb_fill(unsigned long addr, int is_write, int is_user, void *retaddr)
+void tlb_fill(target_ulong addr, int is_write, int is_user, void *retaddr)
{
TranslationBlock *tb;
int ret;
@@ -282,6 +282,15 @@ void set_cwp(int new_cwp)
env->regwptr = env->regbase + (new_cwp * 16);
}
+void cpu_set_cwp(CPUState *env1, int new_cwp)
+{
+ CPUState *saved_env;
+ saved_env = env;
+ env = env1;
+ set_cwp(new_cwp);
+ env = saved_env;
+}
+
/*
* Begin execution of an interruption. is_int is TRUE if coming from
* the int instruction. next_eip is the EIP value AFTER the interrupt
@@ -318,8 +327,7 @@ void do_interrupt(int intno, int is_int, int error_code,
#endif
#if !defined(CONFIG_USER_ONLY)
if (env->psret == 0) {
- fprintf(logfile, "Trap while interrupts disabled, Error state!\n");
- qemu_system_shutdown_request();
+ cpu_abort(cpu_single_env, "Trap while interrupts disabled, Error state");
return;
}
#endif
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index 6dead66a8c..850d8c03ea 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc/op_helper.c
@@ -108,7 +108,7 @@ void helper_ld_asi(int asi, int size, int sign)
if (size == 4)
bswap32s(&ret);
else if (size == 2)
- bswap16s(&ret);
+ bswap16s((uint16_t *)&ret);
break;
default:
ret = 0;
@@ -198,7 +198,7 @@ void helper_st_asi(int asi, int size, int sign)
if (size == 4)
bswap32s(&temp);
else if (size == 2)
- bswap16s(&temp);
+ bswap16s((uint16_t *)&temp);
cpu_physical_memory_write(T0, (void *) &temp, size);
}
diff --git a/target-sparc/op_mem.h b/target-sparc/op_mem.h
index 9c839a0047..995eb27d75 100644
--- a/target-sparc/op_mem.h
+++ b/target-sparc/op_mem.h
@@ -2,13 +2,13 @@
#define SPARC_LD_OP(name, qp) \
void OPPROTO glue(glue(op_, name), MEMSUFFIX)(void) \
{ \
- T1 = glue(qp, MEMSUFFIX)((void *)T0); \
+ T1 = glue(qp, MEMSUFFIX)(T0); \
}
#define SPARC_ST_OP(name, op) \
void OPPROTO glue(glue(op_, name), MEMSUFFIX)(void) \
{ \
- glue(op, MEMSUFFIX)((void *)T0, T1); \
+ glue(op, MEMSUFFIX)(T0, T1); \
}
SPARC_LD_OP(ld, ldl);
@@ -24,48 +24,48 @@ SPARC_ST_OP(sth, stw);
void OPPROTO glue(op_std, MEMSUFFIX)(void)
{
- glue(stl, MEMSUFFIX)((void *) T0, T1);
- glue(stl, MEMSUFFIX)((void *) (T0 + 4), T2);
+ glue(stl, MEMSUFFIX)(T0, T1);
+ glue(stl, MEMSUFFIX)((T0 + 4), T2);
}
void OPPROTO glue(op_ldstub, MEMSUFFIX)(void)
{
- T1 = glue(ldub, MEMSUFFIX)((void *) T0);
- glue(stb, MEMSUFFIX)((void *) T0, 0xff); /* XXX: Should be Atomically */
+ T1 = glue(ldub, MEMSUFFIX)(T0);
+ glue(stb, MEMSUFFIX)(T0, 0xff); /* XXX: Should be Atomically */
}
void OPPROTO glue(op_swap, MEMSUFFIX)(void)
{
- unsigned int tmp = glue(ldl, MEMSUFFIX)((void *) T0);
- glue(stl, MEMSUFFIX)((void *) T0, T1); /* XXX: Should be Atomically */
+ unsigned int tmp = glue(ldl, MEMSUFFIX)(T0);
+ glue(stl, MEMSUFFIX)(T0, T1); /* XXX: Should be Atomically */
T1 = tmp;
}
void OPPROTO glue(op_ldd, MEMSUFFIX)(void)
{
- T1 = glue(ldl, MEMSUFFIX)((void *) T0);
- T0 = glue(ldl, MEMSUFFIX)((void *) (T0 + 4));
+ T1 = glue(ldl, MEMSUFFIX)(T0);
+ T0 = glue(ldl, MEMSUFFIX)((T0 + 4));
}
/*** Floating-point store ***/
void OPPROTO glue(op_stf, MEMSUFFIX) (void)
{
- glue(stfl, MEMSUFFIX)((void *) T0, FT0);
+ glue(stfl, MEMSUFFIX)(T0, FT0);
}
void OPPROTO glue(op_stdf, MEMSUFFIX) (void)
{
- glue(stfq, MEMSUFFIX)((void *) T0, DT0);
+ glue(stfq, MEMSUFFIX)(T0, DT0);
}
/*** Floating-point load ***/
void OPPROTO glue(op_ldf, MEMSUFFIX) (void)
{
- FT0 = glue(ldfl, MEMSUFFIX)((void *) T0);
+ FT0 = glue(ldfl, MEMSUFFIX)(T0);
}
void OPPROTO glue(op_lddf, MEMSUFFIX) (void)
{
- DT0 = glue(ldfq, MEMSUFFIX)((void *) T0);
+ DT0 = glue(ldfq, MEMSUFFIX)(T0);
}
#undef MEMSUFFIX
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 2f067958d0..dc7e6dbf6a 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -291,10 +291,7 @@ GEN32(gen_op_store_DT2_fpr, gen_op_store_DT2_fpr_fprf);
#if defined(CONFIG_USER_ONLY)
#define gen_op_ldst(name) gen_op_##name##_raw()
-#define OP_LD_TABLE(width) \
-static void gen_op_##width##a(int insn, int is_ld, int size, int sign) \
-{ \
-}
+#define OP_LD_TABLE(width)
#define supervisor(dc) 0
#else
#define gen_op_ldst(name) (*gen_op_##name[dc->mem_idx])()
@@ -614,12 +611,14 @@ static void do_fbranch(DisasContext * dc, uint32_t target, uint32_t insn)
}
}
+#if 0
static void gen_debug(DisasContext *s, uint32_t pc)
{
gen_op_jmp_im(pc);
gen_op_debug();
s->is_br = 1;
}
+#endif
#define GET_FIELDs(x,a,b) sign_extend (GET_FIELD(x,a,b), (b) - (a) + 1)
@@ -633,7 +632,7 @@ static void disas_sparc_insn(DisasContext * dc)
{
unsigned int insn, opc, rs1, rs2, rd;
- insn = ldl_code((uint8_t *)dc->pc);
+ insn = ldl_code(dc->pc);
opc = GET_FIELD(insn, 0, 1);
rd = GET_FIELD(insn, 2, 6);
@@ -1290,6 +1289,12 @@ static void disas_sparc_insn(DisasContext * dc)
gen_movl_reg_T1(rd);
gen_op_swapa(insn, 1, 4, 0);
break;
+
+ /* avoid warnings */
+ (void) &gen_op_stfa;
+ (void) &gen_op_stdfa;
+ (void) &gen_op_ldfa;
+ (void) &gen_op_lddfa;
#endif
default:
goto illegal_insn;
@@ -1520,8 +1525,8 @@ static inline int gen_intermediate_code_internal(TranslationBlock * tb,
#ifdef DEBUG_DISAS
if (loglevel & CPU_LOG_TB_IN_ASM) {
fprintf(logfile, "--------------\n");
- fprintf(logfile, "IN: %s\n", lookup_symbol((uint8_t *)pc_start));
- disas(logfile, (uint8_t *)pc_start, last_pc + 4 - pc_start, 0, 0);
+ fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start));
+ target_disas(logfile, pc_start, last_pc + 4 - pc_start, 0);
fprintf(logfile, "\n");
if (loglevel & CPU_LOG_TB_OP) {
fprintf(logfile, "OP:\n");
@@ -1626,6 +1631,10 @@ target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
}
#else
+extern int get_physical_address (CPUState *env, uint32_t *physical, int *prot,
+ int *access_index, uint32_t address, int rw,
+ int is_user);
+
target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr)
{
uint32_t phys_addr;