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Diffstat (limited to 'target-sparc')
-rw-r--r--target-sparc/cpu.h1
-rw-r--r--target-sparc/exec.h7
-rw-r--r--target-sparc/helper.c49
-rw-r--r--target-sparc/op.c6
-rw-r--r--target-sparc/op_helper.c6
5 files changed, 31 insertions, 38 deletions
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 7f8b9060a2..a4b6c730f3 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -127,7 +127,6 @@ typedef struct CPUSPARCState {
int exception_index;
int interrupt_index;
int interrupt_request;
- target_ulong exception_next_pc;
struct TranslationBlock *current_tb;
void *opaque;
/* NOTE: we allow 8 more registers to handle wrapping */
diff --git a/target-sparc/exec.h b/target-sparc/exec.h
index 1fa7d87dce..f905bdfe1d 100644
--- a/target-sparc/exec.h
+++ b/target-sparc/exec.h
@@ -41,9 +41,7 @@ void do_fcmpd(void);
void do_ldd_kernel(target_ulong addr);
void do_ldd_user(target_ulong addr);
void do_ldd_raw(target_ulong addr);
-void do_interrupt(int intno, int is_int, int error_code,
- unsigned int next_eip, int is_hw);
-void raise_exception_err(int exception_index, int error_code);
+void do_interrupt(int intno, int error_code);
void raise_exception(int tt);
void memcpy32(target_ulong *dst, const target_ulong *src);
target_ulong mmu_probe(target_ulong address, int mmulev);
@@ -129,4 +127,7 @@ static inline void regs_to_env(void)
{
}
+int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
+ int is_user, int is_softmmu);
+
#endif
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 60096bf3a3..b23be7cee7 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -23,8 +23,6 @@
//#define DEBUG_MMU
/* Sparc MMU emulation */
-int cpu_sparc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
- int is_user, int is_softmmu);
/* thread support */
@@ -40,7 +38,18 @@ void cpu_unlock(void)
spin_unlock(&global_cpu_lock);
}
-#if !defined(CONFIG_USER_ONLY)
+#if defined(CONFIG_USER_ONLY)
+
+int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw,
+ int is_user, int is_softmmu)
+{
+ env->mmuregs[4] = address;
+ env->exception_index = 0; /* XXX: must be incorrect */
+ env->error_code = -2; /* XXX: is it really used ! */
+ return 1;
+}
+
+#else
#define MMUSUFFIX _mmu
#define GETPC() (__builtin_return_address(0))
@@ -86,11 +95,10 @@ void tlb_fill(target_ulong addr, int is_write, int is_user, void *retaddr)
cpu_restore_state(tb, env, pc, NULL);
}
}
- raise_exception_err(ret, env->error_code);
+ raise_exception(ret);
}
env = saved_env;
}
-#endif
static const int access_table[8][8] = {
{ 0, 0, 0, 0, 2, 0, 3, 3 },
@@ -227,12 +235,6 @@ int cpu_sparc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
unsigned long vaddr;
int error_code = 0, prot, ret = 0, access_index;
- if (env->user_mode_only) {
- /* user mode only emulation */
- error_code = -2;
- goto do_fault_user;
- }
-
error_code = get_physical_address(env, &paddr, &prot, &access_index, address, rw, is_user);
if (error_code == 0) {
virt_addr = address & TARGET_PAGE_MASK;
@@ -248,11 +250,11 @@ int cpu_sparc_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
if (env->mmuregs[0] & MMU_NF || env->psret == 0) // No fault
return 0;
- do_fault_user:
env->exception_index = exception;
env->error_code = error_code;
return error_code;
}
+#endif
void memcpy32(target_ulong *dst, const target_ulong *src)
{
@@ -287,23 +289,17 @@ void cpu_set_cwp(CPUState *env1, int new_cwp)
env = saved_env;
}
-/*
- * Begin execution of an interruption. is_int is TRUE if coming from
- * the int instruction. next_eip is the EIP value AFTER the interrupt
- * instruction. It is only relevant if is_int is TRUE.
- */
-void do_interrupt(int intno, int is_int, int error_code,
- unsigned int next_eip, int is_hw)
+void do_interrupt(int intno, int error_code)
{
int cwp;
#ifdef DEBUG_PCALL
if (loglevel & CPU_LOG_INT) {
static int count;
- fprintf(logfile, "%6d: v=%02x e=%04x i=%d pc=%08x npc=%08x SP=%08x\n",
- count, intno, error_code, is_int,
- env->pc,
- env->npc, env->regwptr[6]);
+ fprintf(logfile, "%6d: v=%02x e=%04x pc=%08x npc=%08x SP=%08x\n",
+ count, intno, error_code,
+ env->pc,
+ env->npc, env->regwptr[6]);
#if 1
cpu_dump_state(env, logfile, fprintf, 0);
{
@@ -334,6 +330,8 @@ void do_interrupt(int intno, int is_int, int error_code,
env->regwptr[9] = env->pc;
env->regwptr[10] = env->npc;
} else {
+ /* XXX: this code is clearly incorrect - npc should have the
+ incorrect value */
env->regwptr[9] = env->pc - 4; // XXX?
env->regwptr[10] = env->pc;
}
@@ -345,11 +343,6 @@ void do_interrupt(int intno, int is_int, int error_code,
env->exception_index = 0;
}
-void raise_exception_err(int exception_index, int error_code)
-{
- raise_exception(exception_index);
-}
-
target_ulong mmu_probe(target_ulong address, int mmulev)
{
target_phys_addr_t pde_ptr;
diff --git a/target-sparc/op.c b/target-sparc/op.c
index d1d48d2a78..dd8295e559 100644
--- a/target-sparc/op.c
+++ b/target-sparc/op.c
@@ -556,12 +556,6 @@ void OPPROTO op_rett(void)
FORCE_RET();
}
-void raise_exception(int tt)
-{
- env->exception_index = tt;
- cpu_loop_exit();
-}
-
/* XXX: use another pointer for %iN registers to avoid slow wrapping
handling ? */
void OPPROTO op_save(void)
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index 2529cca720..9699d02f7c 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc/op_helper.c
@@ -4,6 +4,12 @@
//#define DEBUG_MMU
+void raise_exception(int tt)
+{
+ env->exception_index = tt;
+ cpu_loop_exit();
+}
+
#ifdef USE_INT_TO_FLOAT_HELPERS
void do_fitos(void)
{
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-17 23:44:29 +0000