diff options
Diffstat (limited to 'target-sparc/translate.c')
| -rw-r--r-- | target-sparc/translate.c | 270 |
1 files changed, 137 insertions, 133 deletions
diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 9dd6b34d4e..8c05c44a80 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -1405,16 +1405,16 @@ static inline void gen_op_fcmps(int fccno, TCGv_i32 r_rs1, TCGv_i32 r_rs2) { switch (fccno) { case 0: - gen_helper_fcmps(r_rs1, r_rs2); + gen_helper_fcmps(cpu_env, r_rs1, r_rs2); break; case 1: - gen_helper_fcmps_fcc1(r_rs1, r_rs2); + gen_helper_fcmps_fcc1(cpu_env, r_rs1, r_rs2); break; case 2: - gen_helper_fcmps_fcc2(r_rs1, r_rs2); + gen_helper_fcmps_fcc2(cpu_env, r_rs1, r_rs2); break; case 3: - gen_helper_fcmps_fcc3(r_rs1, r_rs2); + gen_helper_fcmps_fcc3(cpu_env, r_rs1, r_rs2); break; } } @@ -1423,16 +1423,16 @@ static inline void gen_op_fcmpd(int fccno) { switch (fccno) { case 0: - gen_helper_fcmpd(); + gen_helper_fcmpd(cpu_env); break; case 1: - gen_helper_fcmpd_fcc1(); + gen_helper_fcmpd_fcc1(cpu_env); break; case 2: - gen_helper_fcmpd_fcc2(); + gen_helper_fcmpd_fcc2(cpu_env); break; case 3: - gen_helper_fcmpd_fcc3(); + gen_helper_fcmpd_fcc3(cpu_env); break; } } @@ -1441,16 +1441,16 @@ static inline void gen_op_fcmpq(int fccno) { switch (fccno) { case 0: - gen_helper_fcmpq(); + gen_helper_fcmpq(cpu_env); break; case 1: - gen_helper_fcmpq_fcc1(); + gen_helper_fcmpq_fcc1(cpu_env); break; case 2: - gen_helper_fcmpq_fcc2(); + gen_helper_fcmpq_fcc2(cpu_env); break; case 3: - gen_helper_fcmpq_fcc3(); + gen_helper_fcmpq_fcc3(cpu_env); break; } } @@ -1459,16 +1459,16 @@ static inline void gen_op_fcmpes(int fccno, TCGv_i32 r_rs1, TCGv_i32 r_rs2) { switch (fccno) { case 0: - gen_helper_fcmpes(r_rs1, r_rs2); + gen_helper_fcmpes(cpu_env, r_rs1, r_rs2); break; case 1: - gen_helper_fcmpes_fcc1(r_rs1, r_rs2); + gen_helper_fcmpes_fcc1(cpu_env, r_rs1, r_rs2); break; case 2: - gen_helper_fcmpes_fcc2(r_rs1, r_rs2); + gen_helper_fcmpes_fcc2(cpu_env, r_rs1, r_rs2); break; case 3: - gen_helper_fcmpes_fcc3(r_rs1, r_rs2); + gen_helper_fcmpes_fcc3(cpu_env, r_rs1, r_rs2); break; } } @@ -1477,16 +1477,16 @@ static inline void gen_op_fcmped(int fccno) { switch (fccno) { case 0: - gen_helper_fcmped(); + gen_helper_fcmped(cpu_env); break; case 1: - gen_helper_fcmped_fcc1(); + gen_helper_fcmped_fcc1(cpu_env); break; case 2: - gen_helper_fcmped_fcc2(); + gen_helper_fcmped_fcc2(cpu_env); break; case 3: - gen_helper_fcmped_fcc3(); + gen_helper_fcmped_fcc3(cpu_env); break; } } @@ -1495,16 +1495,16 @@ static inline void gen_op_fcmpeq(int fccno) { switch (fccno) { case 0: - gen_helper_fcmpeq(); + gen_helper_fcmpeq(cpu_env); break; case 1: - gen_helper_fcmpeq_fcc1(); + gen_helper_fcmpeq_fcc1(cpu_env); break; case 2: - gen_helper_fcmpeq_fcc2(); + gen_helper_fcmpeq_fcc2(cpu_env); break; case 3: - gen_helper_fcmpeq_fcc3(); + gen_helper_fcmpeq_fcc3(cpu_env); break; } } @@ -1513,32 +1513,32 @@ static inline void gen_op_fcmpeq(int fccno) static inline void gen_op_fcmps(int fccno, TCGv r_rs1, TCGv r_rs2) { - gen_helper_fcmps(r_rs1, r_rs2); + gen_helper_fcmps(cpu_env, r_rs1, r_rs2); } static inline void gen_op_fcmpd(int fccno) { - gen_helper_fcmpd(); + gen_helper_fcmpd(cpu_env); } static inline void gen_op_fcmpq(int fccno) { - gen_helper_fcmpq(); + gen_helper_fcmpq(cpu_env); } static inline void gen_op_fcmpes(int fccno, TCGv r_rs1, TCGv r_rs2) { - gen_helper_fcmpes(r_rs1, r_rs2); + gen_helper_fcmpes(cpu_env, r_rs1, r_rs2); } static inline void gen_op_fcmped(int fccno) { - gen_helper_fcmped(); + gen_helper_fcmped(cpu_env); } static inline void gen_op_fcmpeq(int fccno) { - gen_helper_fcmpeq(); + gen_helper_fcmpeq(cpu_env); } #endif @@ -1584,7 +1584,7 @@ static inline void gen_op_clear_ieee_excp_and_FTT(void) static inline void gen_clear_float_exceptions(void) { - gen_helper_clear_float_exceptions(); + gen_helper_clear_float_exceptions(cpu_env); } /* asi moves */ @@ -2383,8 +2383,8 @@ static void disas_sparc_insn(DisasContext * dc) case 0x29: /* fsqrts */ CHECK_FPU_FEATURE(dc, FSQRT); gen_clear_float_exceptions(); - gen_helper_fsqrts(cpu_tmp32, cpu_fpr[rs2]); - gen_helper_check_ieee_exceptions(); + gen_helper_fsqrts(cpu_tmp32, cpu_env, cpu_fpr[rs2]); + gen_helper_check_ieee_exceptions(cpu_env); tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32); gen_update_fprs_dirty(rd); break; @@ -2392,8 +2392,8 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, FSQRT); gen_op_load_fpr_DT1(DFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fsqrtd(); - gen_helper_check_ieee_exceptions(); + gen_helper_fsqrtd(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -2401,15 +2401,16 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_QT1(QFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fsqrtq(); - gen_helper_check_ieee_exceptions(); + gen_helper_fsqrtq(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_QT0_fpr(QFPREG(rd)); gen_update_fprs_dirty(QFPREG(rd)); break; case 0x41: /* fadds */ gen_clear_float_exceptions(); - gen_helper_fadds(cpu_tmp32, cpu_fpr[rs1], cpu_fpr[rs2]); - gen_helper_check_ieee_exceptions(); + gen_helper_fadds(cpu_tmp32, cpu_env, cpu_fpr[rs1], + cpu_fpr[rs2]); + gen_helper_check_ieee_exceptions(cpu_env); tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32); gen_update_fprs_dirty(rd); break; @@ -2417,8 +2418,8 @@ static void disas_sparc_insn(DisasContext * dc) gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_faddd(); - gen_helper_check_ieee_exceptions(); + gen_helper_faddd(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -2427,15 +2428,16 @@ static void disas_sparc_insn(DisasContext * dc) gen_op_load_fpr_QT0(QFPREG(rs1)); gen_op_load_fpr_QT1(QFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_faddq(); - gen_helper_check_ieee_exceptions(); + gen_helper_faddq(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_QT0_fpr(QFPREG(rd)); gen_update_fprs_dirty(QFPREG(rd)); break; case 0x45: /* fsubs */ gen_clear_float_exceptions(); - gen_helper_fsubs(cpu_tmp32, cpu_fpr[rs1], cpu_fpr[rs2]); - gen_helper_check_ieee_exceptions(); + gen_helper_fsubs(cpu_tmp32, cpu_env, cpu_fpr[rs1], + cpu_fpr[rs2]); + gen_helper_check_ieee_exceptions(cpu_env); tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32); gen_update_fprs_dirty(rd); break; @@ -2443,8 +2445,8 @@ static void disas_sparc_insn(DisasContext * dc) gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fsubd(); - gen_helper_check_ieee_exceptions(); + gen_helper_fsubd(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -2453,16 +2455,17 @@ static void disas_sparc_insn(DisasContext * dc) gen_op_load_fpr_QT0(QFPREG(rs1)); gen_op_load_fpr_QT1(QFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fsubq(); - gen_helper_check_ieee_exceptions(); + gen_helper_fsubq(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_QT0_fpr(QFPREG(rd)); gen_update_fprs_dirty(QFPREG(rd)); break; case 0x49: /* fmuls */ CHECK_FPU_FEATURE(dc, FMUL); gen_clear_float_exceptions(); - gen_helper_fmuls(cpu_tmp32, cpu_fpr[rs1], cpu_fpr[rs2]); - gen_helper_check_ieee_exceptions(); + gen_helper_fmuls(cpu_tmp32, cpu_env, cpu_fpr[rs1], + cpu_fpr[rs2]); + gen_helper_check_ieee_exceptions(cpu_env); tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32); gen_update_fprs_dirty(rd); break; @@ -2471,8 +2474,8 @@ static void disas_sparc_insn(DisasContext * dc) gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fmuld(); - gen_helper_check_ieee_exceptions(); + gen_helper_fmuld(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -2482,15 +2485,16 @@ static void disas_sparc_insn(DisasContext * dc) gen_op_load_fpr_QT0(QFPREG(rs1)); gen_op_load_fpr_QT1(QFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fmulq(); - gen_helper_check_ieee_exceptions(); + gen_helper_fmulq(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_QT0_fpr(QFPREG(rd)); gen_update_fprs_dirty(QFPREG(rd)); break; case 0x4d: /* fdivs */ gen_clear_float_exceptions(); - gen_helper_fdivs(cpu_tmp32, cpu_fpr[rs1], cpu_fpr[rs2]); - gen_helper_check_ieee_exceptions(); + gen_helper_fdivs(cpu_tmp32, cpu_env, cpu_fpr[rs1], + cpu_fpr[rs2]); + gen_helper_check_ieee_exceptions(cpu_env); tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32); gen_update_fprs_dirty(rd); break; @@ -2498,8 +2502,8 @@ static void disas_sparc_insn(DisasContext * dc) gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fdivd(); - gen_helper_check_ieee_exceptions(); + gen_helper_fdivd(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -2508,16 +2512,16 @@ static void disas_sparc_insn(DisasContext * dc) gen_op_load_fpr_QT0(QFPREG(rs1)); gen_op_load_fpr_QT1(QFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fdivq(); - gen_helper_check_ieee_exceptions(); + gen_helper_fdivq(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_QT0_fpr(QFPREG(rd)); gen_update_fprs_dirty(QFPREG(rd)); break; case 0x69: /* fsmuld */ CHECK_FPU_FEATURE(dc, FSMULD); gen_clear_float_exceptions(); - gen_helper_fsmuld(cpu_fpr[rs1], cpu_fpr[rs2]); - gen_helper_check_ieee_exceptions(); + gen_helper_fsmuld(cpu_env, cpu_fpr[rs1], cpu_fpr[rs2]); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -2526,23 +2530,23 @@ static void disas_sparc_insn(DisasContext * dc) gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fdmulq(); - gen_helper_check_ieee_exceptions(); + gen_helper_fdmulq(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_QT0_fpr(QFPREG(rd)); gen_update_fprs_dirty(QFPREG(rd)); break; case 0xc4: /* fitos */ gen_clear_float_exceptions(); - gen_helper_fitos(cpu_tmp32, cpu_fpr[rs2]); - gen_helper_check_ieee_exceptions(); + gen_helper_fitos(cpu_tmp32, cpu_env, cpu_fpr[rs2]); + gen_helper_check_ieee_exceptions(cpu_env); tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32); gen_update_fprs_dirty(rd); break; case 0xc6: /* fdtos */ gen_op_load_fpr_DT1(DFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fdtos(cpu_tmp32); - gen_helper_check_ieee_exceptions(); + gen_helper_fdtos(cpu_tmp32, cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32); gen_update_fprs_dirty(rd); break; @@ -2550,18 +2554,18 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_QT1(QFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fqtos(cpu_tmp32); - gen_helper_check_ieee_exceptions(); + gen_helper_fqtos(cpu_tmp32, cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32); gen_update_fprs_dirty(rd); break; case 0xc8: /* fitod */ - gen_helper_fitod(cpu_fpr[rs2]); + gen_helper_fitod(cpu_env, cpu_fpr[rs2]); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; case 0xc9: /* fstod */ - gen_helper_fstod(cpu_fpr[rs2]); + gen_helper_fstod(cpu_env, cpu_fpr[rs2]); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -2569,42 +2573,42 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_QT1(QFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fqtod(); - gen_helper_check_ieee_exceptions(); + gen_helper_fqtod(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; case 0xcc: /* fitoq */ CHECK_FPU_FEATURE(dc, FLOAT128); - gen_helper_fitoq(cpu_fpr[rs2]); + gen_helper_fitoq(cpu_env, cpu_fpr[rs2]); gen_op_store_QT0_fpr(QFPREG(rd)); gen_update_fprs_dirty(QFPREG(rd)); break; case 0xcd: /* fstoq */ CHECK_FPU_FEATURE(dc, FLOAT128); - gen_helper_fstoq(cpu_fpr[rs2]); + gen_helper_fstoq(cpu_env, cpu_fpr[rs2]); gen_op_store_QT0_fpr(QFPREG(rd)); gen_update_fprs_dirty(QFPREG(rd)); break; case 0xce: /* fdtoq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fdtoq(); + gen_helper_fdtoq(cpu_env); gen_op_store_QT0_fpr(QFPREG(rd)); gen_update_fprs_dirty(QFPREG(rd)); break; case 0xd1: /* fstoi */ gen_clear_float_exceptions(); - gen_helper_fstoi(cpu_tmp32, cpu_fpr[rs2]); - gen_helper_check_ieee_exceptions(); + gen_helper_fstoi(cpu_tmp32, cpu_env, cpu_fpr[rs2]); + gen_helper_check_ieee_exceptions(cpu_env); tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32); gen_update_fprs_dirty(rd); break; case 0xd2: /* fdtoi */ gen_op_load_fpr_DT1(DFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fdtoi(cpu_tmp32); - gen_helper_check_ieee_exceptions(); + gen_helper_fdtoi(cpu_tmp32, cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32); gen_update_fprs_dirty(rd); break; @@ -2612,8 +2616,8 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_QT1(QFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fqtoi(cpu_tmp32); - gen_helper_check_ieee_exceptions(); + gen_helper_fqtoi(cpu_tmp32, cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32); gen_update_fprs_dirty(rd); break; @@ -2637,42 +2641,42 @@ static void disas_sparc_insn(DisasContext * dc) break; case 0x6: /* V9 fnegd */ gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fnegd(); + gen_helper_fnegd(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; case 0x7: /* V9 fnegq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_QT1(QFPREG(rs2)); - gen_helper_fnegq(); + gen_helper_fnegq(cpu_env); gen_op_store_QT0_fpr(QFPREG(rd)); gen_update_fprs_dirty(QFPREG(rd)); break; case 0xa: /* V9 fabsd */ gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fabsd(); + gen_helper_fabsd(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; case 0xb: /* V9 fabsq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_QT1(QFPREG(rs2)); - gen_helper_fabsq(); + gen_helper_fabsq(cpu_env); gen_op_store_QT0_fpr(QFPREG(rd)); gen_update_fprs_dirty(QFPREG(rd)); break; case 0x81: /* V9 fstox */ gen_clear_float_exceptions(); - gen_helper_fstox(cpu_fpr[rs2]); - gen_helper_check_ieee_exceptions(); + gen_helper_fstox(cpu_env, cpu_fpr[rs2]); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; case 0x82: /* V9 fdtox */ gen_op_load_fpr_DT1(DFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fdtox(); - gen_helper_check_ieee_exceptions(); + gen_helper_fdtox(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -2680,24 +2684,24 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_QT1(QFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fqtox(); - gen_helper_check_ieee_exceptions(); + gen_helper_fqtox(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; case 0x84: /* V9 fxtos */ gen_op_load_fpr_DT1(DFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fxtos(cpu_tmp32); - gen_helper_check_ieee_exceptions(); + gen_helper_fxtos(cpu_tmp32, cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); tcg_gen_mov_i32(cpu_fpr[rd], cpu_tmp32); gen_update_fprs_dirty(rd); break; case 0x88: /* V9 fxtod */ gen_op_load_fpr_DT1(DFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fxtod(); - gen_helper_check_ieee_exceptions(); + gen_helper_fxtod(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -2705,8 +2709,8 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_DT1(DFPREG(rs2)); gen_clear_float_exceptions(); - gen_helper_fxtoq(); - gen_helper_check_ieee_exceptions(); + gen_helper_fxtoq(cpu_env); + gen_helper_check_ieee_exceptions(cpu_env); gen_op_store_QT0_fpr(QFPREG(rd)); gen_update_fprs_dirty(QFPREG(rd)); break; @@ -3828,14 +3832,14 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); cpu_src1 = get_src1(insn, cpu_src1); gen_movl_reg_TN(rs2, cpu_src2); - gen_helper_array8(cpu_dst, cpu_src1, cpu_src2); + gen_helper_array8(cpu_dst, cpu_env, cpu_src1, cpu_src2); gen_movl_TN_reg(rd, cpu_dst); break; case 0x012: /* VIS I array16 */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1 = get_src1(insn, cpu_src1); gen_movl_reg_TN(rs2, cpu_src2); - gen_helper_array8(cpu_dst, cpu_src1, cpu_src2); + gen_helper_array8(cpu_dst, cpu_env, cpu_src1, cpu_src2); tcg_gen_shli_i64(cpu_dst, cpu_dst, 1); gen_movl_TN_reg(rd, cpu_dst); break; @@ -3843,7 +3847,7 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); cpu_src1 = get_src1(insn, cpu_src1); gen_movl_reg_TN(rs2, cpu_src2); - gen_helper_array8(cpu_dst, cpu_src1, cpu_src2); + gen_helper_array8(cpu_dst, cpu_env, cpu_src1, cpu_src2); tcg_gen_shli_i64(cpu_dst, cpu_dst, 2); gen_movl_TN_reg(rd, cpu_dst); break; @@ -3851,7 +3855,7 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); cpu_src1 = get_src1(insn, cpu_src1); gen_movl_reg_TN(rs2, cpu_src2); - gen_helper_alignaddr(cpu_dst, cpu_src1, cpu_src2); + gen_helper_alignaddr(cpu_dst, cpu_env, cpu_src1, cpu_src2); gen_movl_TN_reg(rd, cpu_dst); break; case 0x019: /* VIS II bmask */ @@ -3862,63 +3866,63 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fcmple16(cpu_dst); + gen_helper_fcmple16(cpu_dst, cpu_env); gen_movl_TN_reg(rd, cpu_dst); break; case 0x022: /* VIS I fcmpne16 */ CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fcmpne16(cpu_dst); + gen_helper_fcmpne16(cpu_dst, cpu_env); gen_movl_TN_reg(rd, cpu_dst); break; case 0x024: /* VIS I fcmple32 */ CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fcmple32(cpu_dst); + gen_helper_fcmple32(cpu_dst, cpu_env); gen_movl_TN_reg(rd, cpu_dst); break; case 0x026: /* VIS I fcmpne32 */ CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fcmpne32(cpu_dst); + gen_helper_fcmpne32(cpu_dst, cpu_env); gen_movl_TN_reg(rd, cpu_dst); break; case 0x028: /* VIS I fcmpgt16 */ CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fcmpgt16(cpu_dst); + gen_helper_fcmpgt16(cpu_dst, cpu_env); gen_movl_TN_reg(rd, cpu_dst); break; case 0x02a: /* VIS I fcmpeq16 */ CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fcmpeq16(cpu_dst); + gen_helper_fcmpeq16(cpu_dst, cpu_env); gen_movl_TN_reg(rd, cpu_dst); break; case 0x02c: /* VIS I fcmpgt32 */ CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fcmpgt32(cpu_dst); + gen_helper_fcmpgt32(cpu_dst, cpu_env); gen_movl_TN_reg(rd, cpu_dst); break; case 0x02e: /* VIS I fcmpeq32 */ CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fcmpeq32(cpu_dst); + gen_helper_fcmpeq32(cpu_dst, cpu_env); gen_movl_TN_reg(rd, cpu_dst); break; case 0x031: /* VIS I fmul8x16 */ CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fmul8x16(); + gen_helper_fmul8x16(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -3926,7 +3930,7 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fmul8x16au(); + gen_helper_fmul8x16au(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -3934,7 +3938,7 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fmul8x16al(); + gen_helper_fmul8x16al(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -3942,7 +3946,7 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fmul8sux16(); + gen_helper_fmul8sux16(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -3950,7 +3954,7 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fmul8ulx16(); + gen_helper_fmul8ulx16(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -3958,7 +3962,7 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fmuld8sux16(); + gen_helper_fmuld8sux16(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -3966,7 +3970,7 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fmuld8ulx16(); + gen_helper_fmuld8ulx16(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -3980,7 +3984,7 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_faligndata(); + gen_helper_faligndata(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -3988,7 +3992,7 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fpmerge(); + gen_helper_fpmerge(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -3999,7 +4003,7 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fexpand(); + gen_helper_fexpand(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; @@ -4007,13 +4011,13 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fpadd16(); + gen_helper_fpadd16(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; case 0x051: /* VIS I fpadd16s */ CHECK_FPU_FEATURE(dc, VIS1); - gen_helper_fpadd16s(cpu_fpr[rd], + gen_helper_fpadd16s(cpu_env, cpu_fpr[rd], cpu_fpr[rs1], cpu_fpr[rs2]); gen_update_fprs_dirty(rd); break; @@ -4021,13 +4025,13 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fpadd32(); + gen_helper_fpadd32(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; case 0x053: /* VIS I fpadd32s */ CHECK_FPU_FEATURE(dc, VIS1); - gen_helper_fpadd32s(cpu_fpr[rd], + gen_helper_fpadd32s(cpu_env, cpu_fpr[rd], cpu_fpr[rs1], cpu_fpr[rs2]); gen_update_fprs_dirty(rd); break; @@ -4035,13 +4039,13 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fpsub16(); + gen_helper_fpsub16(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; case 0x055: /* VIS I fpsub16s */ CHECK_FPU_FEATURE(dc, VIS1); - gen_helper_fpsub16s(cpu_fpr[rd], + gen_helper_fpsub16s(cpu_env, cpu_fpr[rd], cpu_fpr[rs1], cpu_fpr[rs2]); gen_update_fprs_dirty(rd); break; @@ -4049,13 +4053,13 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, VIS1); gen_op_load_fpr_DT0(DFPREG(rs1)); gen_op_load_fpr_DT1(DFPREG(rs2)); - gen_helper_fpsub32(); + gen_helper_fpsub32(cpu_env); gen_op_store_DT0_fpr(DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); break; case 0x057: /* VIS I fpsub32s */ CHECK_FPU_FEATURE(dc, VIS1); - gen_helper_fpsub32s(cpu_fpr[rd], + gen_helper_fpsub32s(cpu_env, cpu_fpr[rd], cpu_fpr[rs1], cpu_fpr[rs2]); gen_update_fprs_dirty(rd); break; @@ -4659,16 +4663,16 @@ static void disas_sparc_insn(DisasContext * dc) gen_address_mask(dc, cpu_addr); if (rd == 1) { tcg_gen_qemu_ld64(cpu_tmp64, cpu_addr, dc->mem_idx); - gen_helper_ldxfsr(cpu_tmp64); + gen_helper_ldxfsr(cpu_env, cpu_tmp64); } else { tcg_gen_qemu_ld32u(cpu_tmp0, cpu_addr, dc->mem_idx); tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0); - gen_helper_ldfsr(cpu_tmp32); + gen_helper_ldfsr(cpu_env, cpu_tmp32); } #else { tcg_gen_qemu_ld32u(cpu_tmp32, cpu_addr, dc->mem_idx); - gen_helper_ldfsr(cpu_tmp32); + gen_helper_ldfsr(cpu_env, cpu_tmp32); } #endif break; |