diff options
Diffstat (limited to 'target-sparc/fop_helper.c')
| -rw-r--r-- | target-sparc/fop_helper.c | 294 |
1 files changed, 190 insertions, 104 deletions
diff --git a/target-sparc/fop_helper.c b/target-sparc/fop_helper.c index 23502f3020..c7a2512117 100644 --- a/target-sparc/fop_helper.c +++ b/target-sparc/fop_helper.c @@ -20,26 +20,74 @@ #include "cpu.h" #include "helper.h" -#define DT0 (env->dt0) -#define DT1 (env->dt1) #define QT0 (env->qt0) #define QT1 (env->qt1) +static void check_ieee_exceptions(CPUState *env) +{ + target_ulong status; + + status = get_float_exception_flags(&env->fp_status); + if (status) { + /* Copy IEEE 754 flags into FSR */ + if (status & float_flag_invalid) { + env->fsr |= FSR_NVC; + } + if (status & float_flag_overflow) { + env->fsr |= FSR_OFC; + } + if (status & float_flag_underflow) { + env->fsr |= FSR_UFC; + } + if (status & float_flag_divbyzero) { + env->fsr |= FSR_DZC; + } + if (status & float_flag_inexact) { + env->fsr |= FSR_NXC; + } + + if ((env->fsr & FSR_CEXC_MASK) & ((env->fsr & FSR_TEM_MASK) >> 23)) { + /* Unmasked exception, generate a trap */ + env->fsr |= FSR_FTT_IEEE_EXCP; + helper_raise_exception(env, TT_FP_EXCP); + } else { + /* Accumulate exceptions */ + env->fsr |= (env->fsr & FSR_CEXC_MASK) << 5; + } + } +} + +static inline void clear_float_exceptions(CPUState *env) +{ + set_float_exception_flags(0, &env->fp_status); +} + #define F_HELPER(name, p) void helper_f##name##p(CPUState *env) #define F_BINOP(name) \ - float32 helper_f ## name ## s (CPUState * env, float32 src1,\ + float32 helper_f ## name ## s (CPUState *env, float32 src1, \ float32 src2) \ { \ - return float32_ ## name (src1, src2, &env->fp_status); \ + float32 ret; \ + clear_float_exceptions(env); \ + ret = float32_ ## name (src1, src2, &env->fp_status); \ + check_ieee_exceptions(env); \ + return ret; \ } \ - F_HELPER(name, d) \ + float64 helper_f ## name ## d (CPUState * env, float64 src1,\ + float64 src2) \ { \ - DT0 = float64_ ## name (DT0, DT1, &env->fp_status); \ + float64 ret; \ + clear_float_exceptions(env); \ + ret = float64_ ## name (src1, src2, &env->fp_status); \ + check_ieee_exceptions(env); \ + return ret; \ } \ F_HELPER(name, q) \ { \ + clear_float_exceptions(env); \ QT0 = float128_ ## name (QT0, QT1, &env->fp_status); \ + check_ieee_exceptions(env); \ } F_BINOP(add); @@ -48,18 +96,24 @@ F_BINOP(mul); F_BINOP(div); #undef F_BINOP -void helper_fsmuld(CPUState *env, float32 src1, float32 src2) +float64 helper_fsmuld(CPUState *env, float32 src1, float32 src2) { - DT0 = float64_mul(float32_to_float64(src1, &env->fp_status), + float64 ret; + clear_float_exceptions(env); + ret = float64_mul(float32_to_float64(src1, &env->fp_status), float32_to_float64(src2, &env->fp_status), &env->fp_status); + check_ieee_exceptions(env); + return ret; } -void helper_fdmulq(CPUState *env) +void helper_fdmulq(CPUState *env, float64 src1, float64 src2) { - QT0 = float128_mul(float64_to_float128(DT0, &env->fp_status), - float64_to_float128(DT1, &env->fp_status), + clear_float_exceptions(env); + QT0 = float128_mul(float64_to_float128(src1, &env->fp_status), + float64_to_float128(src2, &env->fp_status), &env->fp_status); + check_ieee_exceptions(env); } float32 helper_fnegs(float32 src) @@ -68,9 +122,9 @@ float32 helper_fnegs(float32 src) } #ifdef TARGET_SPARC64 -F_HELPER(neg, d) +float64 helper_fnegd(float64 src) { - DT0 = float64_chs(DT1); + return float64_chs(src); } F_HELPER(neg, q) @@ -82,98 +136,158 @@ F_HELPER(neg, q) /* Integer to float conversion. */ float32 helper_fitos(CPUState *env, int32_t src) { - return int32_to_float32(src, &env->fp_status); + /* Inexact error possible converting int to float. */ + float32 ret; + clear_float_exceptions(env); + ret = int32_to_float32(src, &env->fp_status); + check_ieee_exceptions(env); + return ret; } -void helper_fitod(CPUState *env, int32_t src) +float64 helper_fitod(CPUState *env, int32_t src) { - DT0 = int32_to_float64(src, &env->fp_status); + /* No possible exceptions converting int to double. */ + return int32_to_float64(src, &env->fp_status); } void helper_fitoq(CPUState *env, int32_t src) { + /* No possible exceptions converting int to long double. */ QT0 = int32_to_float128(src, &env->fp_status); } #ifdef TARGET_SPARC64 -float32 helper_fxtos(CPUState *env) +float32 helper_fxtos(CPUState *env, int64_t src) { - return int64_to_float32(*((int64_t *)&DT1), &env->fp_status); + float32 ret; + clear_float_exceptions(env); + ret = int64_to_float32(src, &env->fp_status); + check_ieee_exceptions(env); + return ret; } -F_HELPER(xto, d) +float64 helper_fxtod(CPUState *env, int64_t src) { - DT0 = int64_to_float64(*((int64_t *)&DT1), &env->fp_status); + float64 ret; + clear_float_exceptions(env); + ret = int64_to_float64(src, &env->fp_status); + check_ieee_exceptions(env); + return ret; } -F_HELPER(xto, q) +void helper_fxtoq(CPUState *env, int64_t src) { - QT0 = int64_to_float128(*((int64_t *)&DT1), &env->fp_status); + /* No possible exceptions converting long long to long double. */ + QT0 = int64_to_float128(src, &env->fp_status); } #endif #undef F_HELPER /* floating point conversion */ -float32 helper_fdtos(CPUState *env) +float32 helper_fdtos(CPUState *env, float64 src) { - return float64_to_float32(DT1, &env->fp_status); + float32 ret; + clear_float_exceptions(env); + ret = float64_to_float32(src, &env->fp_status); + check_ieee_exceptions(env); + return ret; } -void helper_fstod(CPUState *env, float32 src) +float64 helper_fstod(CPUState *env, float32 src) { - DT0 = float32_to_float64(src, &env->fp_status); + float64 ret; + clear_float_exceptions(env); + ret = float32_to_float64(src, &env->fp_status); + check_ieee_exceptions(env); + return ret; } float32 helper_fqtos(CPUState *env) { - return float128_to_float32(QT1, &env->fp_status); + float32 ret; + clear_float_exceptions(env); + ret = float128_to_float32(QT1, &env->fp_status); + check_ieee_exceptions(env); + return ret; } void helper_fstoq(CPUState *env, float32 src) { + clear_float_exceptions(env); QT0 = float32_to_float128(src, &env->fp_status); + check_ieee_exceptions(env); } -void helper_fqtod(CPUState *env) +float64 helper_fqtod(CPUState *env) { - DT0 = float128_to_float64(QT1, &env->fp_status); + float64 ret; + clear_float_exceptions(env); + ret = float128_to_float64(QT1, &env->fp_status); + check_ieee_exceptions(env); + return ret; } -void helper_fdtoq(CPUState *env) +void helper_fdtoq(CPUState *env, float64 src) { - QT0 = float64_to_float128(DT1, &env->fp_status); + clear_float_exceptions(env); + QT0 = float64_to_float128(src, &env->fp_status); + check_ieee_exceptions(env); } /* Float to integer conversion. */ int32_t helper_fstoi(CPUState *env, float32 src) { - return float32_to_int32_round_to_zero(src, &env->fp_status); + int32_t ret; + clear_float_exceptions(env); + ret = float32_to_int32_round_to_zero(src, &env->fp_status); + check_ieee_exceptions(env); + return ret; } -int32_t helper_fdtoi(CPUState *env) +int32_t helper_fdtoi(CPUState *env, float64 src) { - return float64_to_int32_round_to_zero(DT1, &env->fp_status); + int32_t ret; + clear_float_exceptions(env); + ret = float64_to_int32_round_to_zero(src, &env->fp_status); + check_ieee_exceptions(env); + return ret; } int32_t helper_fqtoi(CPUState *env) { - return float128_to_int32_round_to_zero(QT1, &env->fp_status); + int32_t ret; + clear_float_exceptions(env); + ret = float128_to_int32_round_to_zero(QT1, &env->fp_status); + check_ieee_exceptions(env); + return ret; } #ifdef TARGET_SPARC64 -void helper_fstox(CPUState *env, float32 src) +int64_t helper_fstox(CPUState *env, float32 src) { - *((int64_t *)&DT0) = float32_to_int64_round_to_zero(src, &env->fp_status); + int64_t ret; + clear_float_exceptions(env); + ret = float32_to_int64_round_to_zero(src, &env->fp_status); + check_ieee_exceptions(env); + return ret; } -void helper_fdtox(CPUState *env) +int64_t helper_fdtox(CPUState *env, float64 src) { - *((int64_t *)&DT0) = float64_to_int64_round_to_zero(DT1, &env->fp_status); + int64_t ret; + clear_float_exceptions(env); + ret = float64_to_int64_round_to_zero(src, &env->fp_status); + check_ieee_exceptions(env); + return ret; } -void helper_fqtox(CPUState *env) +int64_t helper_fqtox(CPUState *env) { - *((int64_t *)&DT0) = float128_to_int64_round_to_zero(QT1, &env->fp_status); + int64_t ret; + clear_float_exceptions(env); + ret = float128_to_int64_round_to_zero(QT1, &env->fp_status); + check_ieee_exceptions(env); + return ret; } #endif @@ -183,9 +297,9 @@ float32 helper_fabss(float32 src) } #ifdef TARGET_SPARC64 -void helper_fabsd(CPUState *env) +float64 helper_fabsd(float64 src) { - DT0 = float64_abs(DT1); + return float64_abs(src); } void helper_fabsq(CPUState *env) @@ -196,17 +310,27 @@ void helper_fabsq(CPUState *env) float32 helper_fsqrts(CPUState *env, float32 src) { - return float32_sqrt(src, &env->fp_status); + float32 ret; + clear_float_exceptions(env); + ret = float32_sqrt(src, &env->fp_status); + check_ieee_exceptions(env); + return ret; } -void helper_fsqrtd(CPUState *env) +float64 helper_fsqrtd(CPUState *env, float64 src) { - DT0 = float64_sqrt(DT1, &env->fp_status); + float64 ret; + clear_float_exceptions(env); + ret = float64_sqrt(src, &env->fp_status); + check_ieee_exceptions(env); + return ret; } void helper_fsqrtq(CPUState *env) { + clear_float_exceptions(env); QT0 = float128_sqrt(QT1, &env->fp_status); + check_ieee_exceptions(env); } #define GEN_FCMP(name, size, reg1, reg2, FS, E) \ @@ -245,8 +369,8 @@ void helper_fsqrtq(CPUState *env) break; \ } \ } -#define GEN_FCMPS(name, size, FS, E) \ - void glue(helper_, name)(CPUState *env, float32 src1, float32 src2) \ +#define GEN_FCMP_T(name, size, FS, E) \ + void glue(helper_, name)(CPUState *env, size src1, size src2) \ { \ env->fsr &= FSR_FTT_NMASK; \ if (E && (glue(size, _is_any_nan)(src1) || \ @@ -282,80 +406,42 @@ void helper_fsqrtq(CPUState *env) } \ } -GEN_FCMPS(fcmps, float32, 0, 0); -GEN_FCMP(fcmpd, float64, DT0, DT1, 0, 0); +GEN_FCMP_T(fcmps, float32, 0, 0); +GEN_FCMP_T(fcmpd, float64, 0, 0); -GEN_FCMPS(fcmpes, float32, 0, 1); -GEN_FCMP(fcmped, float64, DT0, DT1, 0, 1); +GEN_FCMP_T(fcmpes, float32, 0, 1); +GEN_FCMP_T(fcmped, float64, 0, 1); GEN_FCMP(fcmpq, float128, QT0, QT1, 0, 0); GEN_FCMP(fcmpeq, float128, QT0, QT1, 0, 1); #ifdef TARGET_SPARC64 -GEN_FCMPS(fcmps_fcc1, float32, 22, 0); -GEN_FCMP(fcmpd_fcc1, float64, DT0, DT1, 22, 0); +GEN_FCMP_T(fcmps_fcc1, float32, 22, 0); +GEN_FCMP_T(fcmpd_fcc1, float64, 22, 0); GEN_FCMP(fcmpq_fcc1, float128, QT0, QT1, 22, 0); -GEN_FCMPS(fcmps_fcc2, float32, 24, 0); -GEN_FCMP(fcmpd_fcc2, float64, DT0, DT1, 24, 0); +GEN_FCMP_T(fcmps_fcc2, float32, 24, 0); +GEN_FCMP_T(fcmpd_fcc2, float64, 24, 0); GEN_FCMP(fcmpq_fcc2, float128, QT0, QT1, 24, 0); -GEN_FCMPS(fcmps_fcc3, float32, 26, 0); -GEN_FCMP(fcmpd_fcc3, float64, DT0, DT1, 26, 0); +GEN_FCMP_T(fcmps_fcc3, float32, 26, 0); +GEN_FCMP_T(fcmpd_fcc3, float64, 26, 0); GEN_FCMP(fcmpq_fcc3, float128, QT0, QT1, 26, 0); -GEN_FCMPS(fcmpes_fcc1, float32, 22, 1); -GEN_FCMP(fcmped_fcc1, float64, DT0, DT1, 22, 1); +GEN_FCMP_T(fcmpes_fcc1, float32, 22, 1); +GEN_FCMP_T(fcmped_fcc1, float64, 22, 1); GEN_FCMP(fcmpeq_fcc1, float128, QT0, QT1, 22, 1); -GEN_FCMPS(fcmpes_fcc2, float32, 24, 1); -GEN_FCMP(fcmped_fcc2, float64, DT0, DT1, 24, 1); +GEN_FCMP_T(fcmpes_fcc2, float32, 24, 1); +GEN_FCMP_T(fcmped_fcc2, float64, 24, 1); GEN_FCMP(fcmpeq_fcc2, float128, QT0, QT1, 24, 1); -GEN_FCMPS(fcmpes_fcc3, float32, 26, 1); -GEN_FCMP(fcmped_fcc3, float64, DT0, DT1, 26, 1); +GEN_FCMP_T(fcmpes_fcc3, float32, 26, 1); +GEN_FCMP_T(fcmped_fcc3, float64, 26, 1); GEN_FCMP(fcmpeq_fcc3, float128, QT0, QT1, 26, 1); #endif -#undef GEN_FCMPS - -void helper_check_ieee_exceptions(CPUState *env) -{ - target_ulong status; - - status = get_float_exception_flags(&env->fp_status); - if (status) { - /* Copy IEEE 754 flags into FSR */ - if (status & float_flag_invalid) { - env->fsr |= FSR_NVC; - } - if (status & float_flag_overflow) { - env->fsr |= FSR_OFC; - } - if (status & float_flag_underflow) { - env->fsr |= FSR_UFC; - } - if (status & float_flag_divbyzero) { - env->fsr |= FSR_DZC; - } - if (status & float_flag_inexact) { - env->fsr |= FSR_NXC; - } - - if ((env->fsr & FSR_CEXC_MASK) & ((env->fsr & FSR_TEM_MASK) >> 23)) { - /* Unmasked exception, generate a trap */ - env->fsr |= FSR_FTT_IEEE_EXCP; - helper_raise_exception(env, TT_FP_EXCP); - } else { - /* Accumulate exceptions */ - env->fsr |= (env->fsr & FSR_CEXC_MASK) << 5; - } - } -} - -void helper_clear_float_exceptions(CPUState *env) -{ - set_float_exception_flags(0, &env->fp_status); -} +#undef GEN_FCMP_T +#undef GEN_FCMP static inline void set_fsr(CPUState *env) { |