diff options
Diffstat (limited to 'target-ppc')
| -rw-r--r-- | target-ppc/op_helper.c | 1245 |
1 files changed, 725 insertions, 520 deletions
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c index 4ef2332a5a..d9f7a8beda 100644 --- a/target-ppc/op_helper.c +++ b/target-ppc/op_helper.c @@ -1,5 +1,5 @@ /* - * PowerPC emulation helpers for qemu. + * PowerPC emulation helpers for QEMU. * * Copyright (c) 2003-2007 Jocelyn Mayer * @@ -42,7 +42,7 @@ /*****************************************************************************/ /* Exceptions processing helpers */ -void helper_raise_exception_err (uint32_t exception, uint32_t error_code) +void helper_raise_exception_err(uint32_t exception, uint32_t error_code) { #if 0 printf("Raise exception %3x code : %d\n", exception, error_code); @@ -52,116 +52,116 @@ void helper_raise_exception_err (uint32_t exception, uint32_t error_code) cpu_loop_exit(env); } -void helper_raise_exception (uint32_t exception) +void helper_raise_exception(uint32_t exception) { helper_raise_exception_err(exception, 0); } /*****************************************************************************/ /* SPR accesses */ -void helper_load_dump_spr (uint32_t sprn) +void helper_load_dump_spr(uint32_t sprn) { qemu_log("Read SPR %d %03x => " TARGET_FMT_lx "\n", sprn, sprn, env->spr[sprn]); } -void helper_store_dump_spr (uint32_t sprn) +void helper_store_dump_spr(uint32_t sprn) { qemu_log("Write SPR %d %03x <= " TARGET_FMT_lx "\n", sprn, sprn, env->spr[sprn]); } -target_ulong helper_load_tbl (void) +target_ulong helper_load_tbl(void) { return (target_ulong)cpu_ppc_load_tbl(env); } -target_ulong helper_load_tbu (void) +target_ulong helper_load_tbu(void) { return cpu_ppc_load_tbu(env); } -target_ulong helper_load_atbl (void) +target_ulong helper_load_atbl(void) { return (target_ulong)cpu_ppc_load_atbl(env); } -target_ulong helper_load_atbu (void) +target_ulong helper_load_atbu(void) { return cpu_ppc_load_atbu(env); } #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY) -target_ulong helper_load_purr (void) +target_ulong helper_load_purr(void) { return (target_ulong)cpu_ppc_load_purr(env); } #endif -target_ulong helper_load_601_rtcl (void) +target_ulong helper_load_601_rtcl(void) { return cpu_ppc601_load_rtcl(env); } -target_ulong helper_load_601_rtcu (void) +target_ulong helper_load_601_rtcu(void) { return cpu_ppc601_load_rtcu(env); } #if !defined(CONFIG_USER_ONLY) -#if defined (TARGET_PPC64) -void helper_store_asr (target_ulong val) +#if defined(TARGET_PPC64) +void helper_store_asr(target_ulong val) { ppc_store_asr(env, val); } #endif -void helper_store_sdr1 (target_ulong val) +void helper_store_sdr1(target_ulong val) { ppc_store_sdr1(env, val); } -void helper_store_tbl (target_ulong val) +void helper_store_tbl(target_ulong val) { cpu_ppc_store_tbl(env, val); } -void helper_store_tbu (target_ulong val) +void helper_store_tbu(target_ulong val) { cpu_ppc_store_tbu(env, val); } -void helper_store_atbl (target_ulong val) +void helper_store_atbl(target_ulong val) { cpu_ppc_store_atbl(env, val); } -void helper_store_atbu (target_ulong val) +void helper_store_atbu(target_ulong val) { cpu_ppc_store_atbu(env, val); } -void helper_store_601_rtcl (target_ulong val) +void helper_store_601_rtcl(target_ulong val) { cpu_ppc601_store_rtcl(env, val); } -void helper_store_601_rtcu (target_ulong val) +void helper_store_601_rtcu(target_ulong val) { cpu_ppc601_store_rtcu(env, val); } -target_ulong helper_load_decr (void) +target_ulong helper_load_decr(void) { return cpu_ppc_load_decr(env); } -void helper_store_decr (target_ulong val) +void helper_store_decr(target_ulong val) { cpu_ppc_store_decr(env, val); } -void helper_store_hid0_601 (target_ulong val) +void helper_store_hid0_601(target_ulong val) { target_ulong hid0; @@ -178,7 +178,7 @@ void helper_store_hid0_601 (target_ulong val) env->spr[SPR_HID0] = (uint32_t)val; } -void helper_store_403_pbr (uint32_t num, target_ulong value) +void helper_store_403_pbr(uint32_t num, target_ulong value) { if (likely(env->pb[num] != value)) { env->pb[num] = value; @@ -187,62 +187,62 @@ void helper_store_403_pbr (uint32_t num, target_ulong value) } } -target_ulong helper_load_40x_pit (void) +target_ulong helper_load_40x_pit(void) { return load_40x_pit(env); } -void helper_store_40x_pit (target_ulong val) +void helper_store_40x_pit(target_ulong val) { store_40x_pit(env, val); } -void helper_store_40x_dbcr0 (target_ulong val) +void helper_store_40x_dbcr0(target_ulong val) { store_40x_dbcr0(env, val); } -void helper_store_40x_sler (target_ulong val) +void helper_store_40x_sler(target_ulong val) { store_40x_sler(env, val); } -void helper_store_booke_tcr (target_ulong val) +void helper_store_booke_tcr(target_ulong val) { store_booke_tcr(env, val); } -void helper_store_booke_tsr (target_ulong val) +void helper_store_booke_tsr(target_ulong val) { store_booke_tsr(env, val); } -void helper_store_ibatu (uint32_t nr, target_ulong val) +void helper_store_ibatu(uint32_t nr, target_ulong val) { ppc_store_ibatu(env, nr, val); } -void helper_store_ibatl (uint32_t nr, target_ulong val) +void helper_store_ibatl(uint32_t nr, target_ulong val) { ppc_store_ibatl(env, nr, val); } -void helper_store_dbatu (uint32_t nr, target_ulong val) +void helper_store_dbatu(uint32_t nr, target_ulong val) { ppc_store_dbatu(env, nr, val); } -void helper_store_dbatl (uint32_t nr, target_ulong val) +void helper_store_dbatl(uint32_t nr, target_ulong val) { ppc_store_dbatl(env, nr, val); } -void helper_store_601_batl (uint32_t nr, target_ulong val) +void helper_store_601_batl(uint32_t nr, target_ulong val) { ppc_store_ibatl_601(env, nr, val); } -void helper_store_601_batu (uint32_t nr, target_ulong val) +void helper_store_601_batu(uint32_t nr, target_ulong val) { ppc_store_ibatu_601(env, nr, val); } @@ -254,48 +254,53 @@ void helper_store_601_batu (uint32_t nr, target_ulong val) static inline target_ulong addr_add(target_ulong addr, target_long arg) { #if defined(TARGET_PPC64) - if (!msr_sf) - return (uint32_t)(addr + arg); - else + if (!msr_sf) { + return (uint32_t)(addr + arg); + } else #endif - return addr + arg; + { + return addr + arg; + } } -void helper_lmw (target_ulong addr, uint32_t reg) +void helper_lmw(target_ulong addr, uint32_t reg) { for (; reg < 32; reg++) { - if (msr_le) + if (msr_le) { env->gpr[reg] = bswap32(ldl(addr)); - else + } else { env->gpr[reg] = ldl(addr); - addr = addr_add(addr, 4); + } + addr = addr_add(addr, 4); } } -void helper_stmw (target_ulong addr, uint32_t reg) +void helper_stmw(target_ulong addr, uint32_t reg) { for (; reg < 32; reg++) { - if (msr_le) + if (msr_le) { stl(addr, bswap32((uint32_t)env->gpr[reg])); - else + } else { stl(addr, (uint32_t)env->gpr[reg]); - addr = addr_add(addr, 4); + } + addr = addr_add(addr, 4); } } void helper_lsw(target_ulong addr, uint32_t nb, uint32_t reg) { int sh; + for (; nb > 3; nb -= 4) { env->gpr[reg] = ldl(addr); reg = (reg + 1) % 32; - addr = addr_add(addr, 4); + addr = addr_add(addr, 4); } if (unlikely(nb > 0)) { env->gpr[reg] = 0; for (sh = 24; nb > 0; nb--, sh -= 8) { env->gpr[reg] |= ldub(addr) << sh; - addr = addr_add(addr, 1); + addr = addr_add(addr, 1); } } } @@ -321,10 +326,11 @@ void helper_lswx(target_ulong addr, uint32_t reg, uint32_t ra, uint32_t rb) void helper_stsw(target_ulong addr, uint32_t nb, uint32_t reg) { int sh; + for (; nb > 3; nb -= 4) { stl(addr, env->gpr[reg]); reg = (reg + 1) % 32; - addr = addr_add(addr, 4); + addr = addr_add(addr, 4); } if (unlikely(nb > 0)) { for (sh = 24; nb > 0; nb--, sh -= 8) { @@ -336,13 +342,15 @@ void helper_stsw(target_ulong addr, uint32_t nb, uint32_t reg) static void do_dcbz(target_ulong addr, int dcache_line_size) { - addr &= ~(dcache_line_size - 1); int i; - for (i = 0 ; i < dcache_line_size ; i += 4) { - stl(addr + i , 0); + + addr &= ~(dcache_line_size - 1); + for (i = 0; i < dcache_line_size; i += 4) { + stl(addr + i, 0); } - if (env->reserve_addr == addr) + if (env->reserve_addr == addr) { env->reserve_addr = (target_ulong)-1ULL; + } } void helper_dcbz(target_ulong addr) @@ -352,10 +360,11 @@ void helper_dcbz(target_ulong addr) void helper_dcbz_970(target_ulong addr) { - if (((env->spr[SPR_970_HID5] >> 7) & 0x3) == 1) + if (((env->spr[SPR_970_HID5] >> 7) & 0x3) == 1) { do_dcbz(addr, 32); - else + } else { do_dcbz(addr, env->dcache_line_size); + } } void helper_icbi(target_ulong addr) @@ -369,20 +378,23 @@ void helper_icbi(target_ulong addr) ldl(addr); } -// XXX: to be tested -target_ulong helper_lscbx (target_ulong addr, uint32_t reg, uint32_t ra, uint32_t rb) +/* XXX: to be tested */ +target_ulong helper_lscbx(target_ulong addr, uint32_t reg, uint32_t ra, + uint32_t rb) { int i, c, d; + d = 24; for (i = 0; i < xer_bc; i++) { c = ldub(addr); - addr = addr_add(addr, 1); + addr = addr_add(addr, 1); /* ra (if not 0) and rb are never modified */ if (likely(reg != rb && (ra == 0 || reg != ra))) { env->gpr[reg] = (env->gpr[reg] & ~(0xFF << d)) | (c << d); } - if (unlikely(c == xer_cmp)) + if (unlikely(c == xer_cmp)) { break; + } if (likely(d != 0)) { d -= 8; } else { @@ -399,7 +411,7 @@ target_ulong helper_lscbx (target_ulong addr, uint32_t reg, uint32_t ra, uint32_ #if defined(TARGET_PPC64) /* multiply high word */ -uint64_t helper_mulhd (uint64_t arg1, uint64_t arg2) +uint64_t helper_mulhd(uint64_t arg1, uint64_t arg2) { uint64_t tl, th; @@ -408,7 +420,7 @@ uint64_t helper_mulhd (uint64_t arg1, uint64_t arg2) } /* multiply high word unsigned */ -uint64_t helper_mulhdu (uint64_t arg1, uint64_t arg2) +uint64_t helper_mulhdu(uint64_t arg1, uint64_t arg2) { uint64_t tl, th; @@ -416,7 +428,7 @@ uint64_t helper_mulhdu (uint64_t arg1, uint64_t arg2) return th; } -uint64_t helper_mulldo (uint64_t arg1, uint64_t arg2) +uint64_t helper_mulldo(uint64_t arg1, uint64_t arg2) { int64_t th; uint64_t tl; @@ -432,20 +444,20 @@ uint64_t helper_mulldo (uint64_t arg1, uint64_t arg2) } #endif -target_ulong helper_cntlzw (target_ulong t) +target_ulong helper_cntlzw(target_ulong t) { return clz32(t); } #if defined(TARGET_PPC64) -target_ulong helper_cntlzd (target_ulong t) +target_ulong helper_cntlzd(target_ulong t) { return clz64(t); } #endif /* shift right arithmetic helper */ -target_ulong helper_sraw (target_ulong value, target_ulong shift) +target_ulong helper_sraw(target_ulong value, target_ulong shift) { int32_t ret; @@ -474,7 +486,7 @@ target_ulong helper_sraw (target_ulong value, target_ulong shift) } #if defined(TARGET_PPC64) -target_ulong helper_srad (target_ulong value, target_ulong shift) +target_ulong helper_srad(target_ulong value, target_ulong shift) { int64_t ret; @@ -504,7 +516,7 @@ target_ulong helper_srad (target_ulong value, target_ulong shift) #endif #if defined(TARGET_PPC64) -target_ulong helper_popcntb (target_ulong val) +target_ulong helper_popcntb(target_ulong val) { val = (val & 0x5555555555555555ULL) + ((val >> 1) & 0x5555555555555555ULL); @@ -515,7 +527,7 @@ target_ulong helper_popcntb (target_ulong val) return val; } -target_ulong helper_popcntw (target_ulong val) +target_ulong helper_popcntw(target_ulong val) { val = (val & 0x5555555555555555ULL) + ((val >> 1) & 0x5555555555555555ULL); @@ -530,12 +542,12 @@ target_ulong helper_popcntw (target_ulong val) return val; } -target_ulong helper_popcntd (target_ulong val) +target_ulong helper_popcntd(target_ulong val) { return ctpop64(val); } #else -target_ulong helper_popcntb (target_ulong val) +target_ulong helper_popcntb(target_ulong val) { val = (val & 0x55555555) + ((val >> 1) & 0x55555555); val = (val & 0x33333333) + ((val >> 2) & 0x33333333); @@ -543,7 +555,7 @@ target_ulong helper_popcntb (target_ulong val) return val; } -target_ulong helper_popcntw (target_ulong val) +target_ulong helper_popcntw(target_ulong val) { val = (val & 0x55555555) + ((val >> 1) & 0x55555555); val = (val & 0x33333333) + ((val >> 2) & 0x33333333); @@ -560,6 +572,7 @@ uint64_t helper_float32_to_float64(uint32_t arg) { CPU_FloatU f; CPU_DoubleU d; + f.l = arg; d.d = float32_to_float64(f.f, &env->fp_status); return d.ll; @@ -569,6 +582,7 @@ uint32_t helper_float64_to_float32(uint64_t arg) { CPU_FloatU f; CPU_DoubleU d; + d.ll = arg; f.f = float64_to_float32(d.d, &env->fp_status); return f.l; @@ -583,11 +597,12 @@ static inline int isden(float64 d) return ((u.ll >> 52) & 0x7FF) == 0; } -uint32_t helper_compute_fprf (uint64_t arg, uint32_t set_fprf) +uint32_t helper_compute_fprf(uint64_t arg, uint32_t set_fprf) { CPU_DoubleU farg; int isneg; int ret; + farg.ll = arg; isneg = float64_is_neg(farg.d); if (unlikely(float64_is_any_nan(farg.d))) { @@ -600,17 +615,19 @@ uint32_t helper_compute_fprf (uint64_t arg, uint32_t set_fprf) } } else if (unlikely(float64_is_infinity(farg.d))) { /* +/- infinity */ - if (isneg) + if (isneg) { ret = 0x09; - else + } else { ret = 0x05; + } } else { if (float64_is_zero(farg.d)) { /* +/- zero */ - if (isneg) + if (isneg) { ret = 0x12; - else + } else { ret = 0x02; + } } else { if (isden(farg.d)) { /* Denormalized numbers */ @@ -645,10 +662,10 @@ static inline uint64_t fload_invalid_op_excp(int op) switch (op) { case POWERPC_EXCP_FP_VXSNAN: env->fpscr |= 1 << FPSCR_VXSNAN; - break; + break; case POWERPC_EXCP_FP_VXSOFT: env->fpscr |= 1 << FPSCR_VXSOFT; - break; + break; case POWERPC_EXCP_FP_VXISI: /* Magnitude subtraction of infinities */ env->fpscr |= 1 << FPSCR_VXISI; @@ -711,8 +728,10 @@ static inline uint64_t fload_invalid_op_excp(int op) if (ve != 0) { /* Update the floating-point enabled exception summary */ env->fpscr |= 1 << FPSCR_FEX; - if (msr_fe0 != 0 || msr_fe1 != 0) - helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_FP | op); + if (msr_fe0 != 0 || msr_fe1 != 0) { + helper_raise_exception_err(POWERPC_EXCP_PROGRAM, + POWERPC_EXCP_FP | op); + } } return ret; } @@ -807,7 +826,7 @@ static inline void fpscr_set_rounding_mode(void) set_float_rounding_mode(rnd_type, &env->fp_status); } -void helper_fpscr_clrbit (uint32_t bit) +void helper_fpscr_clrbit(uint32_t bit) { int prev; @@ -825,7 +844,7 @@ void helper_fpscr_clrbit (uint32_t bit) } } -void helper_fpscr_setbit (uint32_t bit) +void helper_fpscr_setbit(uint32_t bit) { int prev; @@ -835,27 +854,32 @@ void helper_fpscr_setbit (uint32_t bit) switch (bit) { case FPSCR_VX: env->fpscr |= 1 << FPSCR_FX; - if (fpscr_ve) + if (fpscr_ve) { goto raise_ve; + } case FPSCR_OX: env->fpscr |= 1 << FPSCR_FX; - if (fpscr_oe) + if (fpscr_oe) { goto raise_oe; + } break; case FPSCR_UX: env->fpscr |= 1 << FPSCR_FX; - if (fpscr_ue) + if (fpscr_ue) { goto raise_ue; + } break; case FPSCR_ZX: env->fpscr |= 1 << FPSCR_FX; - if (fpscr_ze) + if (fpscr_ze) { goto raise_ze; + } break; case FPSCR_XX: env->fpscr |= 1 << FPSCR_FX; - if (fpscr_xe) + if (fpscr_xe) { goto raise_xe; + } break; case FPSCR_VXSNAN: case FPSCR_VXISI: @@ -868,31 +892,41 @@ void helper_fpscr_setbit (uint32_t bit) case FPSCR_VXCVI: env->fpscr |= 1 << FPSCR_VX; env->fpscr |= 1 << FPSCR_FX; - if (fpscr_ve != 0) + if (fpscr_ve != 0) { goto raise_ve; + } break; case FPSCR_VE: if (fpscr_vx != 0) { raise_ve: env->error_code = POWERPC_EXCP_FP; - if (fpscr_vxsnan) + if (fpscr_vxsnan) { env->error_code |= POWERPC_EXCP_FP_VXSNAN; - if (fpscr_vxisi) + } + if (fpscr_vxisi) { env->error_code |= POWERPC_EXCP_FP_VXISI; - if (fpscr_vxidi) + } + if (fpscr_vxidi) { env->error_code |= POWERPC_EXCP_FP_VXIDI; - if (fpscr_vxzdz) + } + if (fpscr_vxzdz) { env->error_code |= POWERPC_EXCP_FP_VXZDZ; - if (fpscr_vximz) + } + if (fpscr_vximz) { env->error_code |= POWERPC_EXCP_FP_VXIMZ; - if (fpscr_vxvc) + } + if (fpscr_vxvc) { env->error_code |= POWERPC_EXCP_FP_VXVC; - if (fpscr_vxsoft) + } + if (fpscr_vxsoft) { env->error_code |= POWERPC_EXCP_FP_VXSOFT; - if (fpscr_vxsqrt) + } + if (fpscr_vxsqrt) { env->error_code |= POWERPC_EXCP_FP_VXSQRT; - if (fpscr_vxcvi) + } + if (fpscr_vxcvi) { env->error_code |= POWERPC_EXCP_FP_VXCVI; + } goto raise_excp; } break; @@ -933,14 +967,14 @@ void helper_fpscr_setbit (uint32_t bit) raise_excp: /* Update the floating-point enabled exception summary */ env->fpscr |= 1 << FPSCR_FEX; - /* We have to update Rc1 before raising the exception */ + /* We have to update Rc1 before raising the exception */ env->exception_index = POWERPC_EXCP_PROGRAM; break; } } } -void helper_store_fpscr (uint64_t arg, uint32_t mask) +void helper_store_fpscr(uint64_t arg, uint32_t mask) { /* * We use only the 32 LSB of the incoming fpr @@ -959,28 +993,30 @@ void helper_store_fpscr (uint64_t arg, uint32_t mask) } } /* Update VX and FEX */ - if (fpscr_ix != 0) + if (fpscr_ix != 0) { env->fpscr |= 1 << FPSCR_VX; - else + } else { env->fpscr &= ~(1 << FPSCR_VX); + } if ((fpscr_ex & fpscr_eex) != 0) { env->fpscr |= 1 << FPSCR_FEX; env->exception_index = POWERPC_EXCP_PROGRAM; /* XXX: we should compute it properly */ env->error_code = POWERPC_EXCP_FP; - } - else + } else { env->fpscr &= ~(1 << FPSCR_FEX); + } fpscr_set_rounding_mode(); } -void helper_float_check_status (void) +void helper_float_check_status(void) { if (env->exception_index == POWERPC_EXCP_PROGRAM && (env->error_code & POWERPC_EXCP_FP)) { /* Differred floating-point exception after target FPR update */ - if (msr_fe0 != 0 || msr_fe1 != 0) + if (msr_fe0 != 0 || msr_fe1 != 0) { helper_raise_exception_err(env->exception_index, env->error_code); + } } else { int status = get_float_exception_flags(&env->fp_status); if (status & float_flag_divbyzero) { @@ -995,13 +1031,13 @@ void helper_float_check_status (void) } } -void helper_reset_fpstatus (void) +void helper_reset_fpstatus(void) { set_float_exception_flags(0, &env->fp_status); } /* fadd - fadd. */ -uint64_t helper_fadd (uint64_t arg1, uint64_t arg2) +uint64_t helper_fadd(uint64_t arg1, uint64_t arg2) { CPU_DoubleU farg1, farg2; @@ -1025,7 +1061,7 @@ uint64_t helper_fadd (uint64_t arg1, uint64_t arg2) } /* fsub - fsub. */ -uint64_t helper_fsub (uint64_t arg1, uint64_t arg2) +uint64_t helper_fsub(uint64_t arg1, uint64_t arg2) { CPU_DoubleU farg1, farg2; @@ -1049,7 +1085,7 @@ uint64_t helper_fsub (uint64_t arg1, uint64_t arg2) } /* fmul - fmul. */ -uint64_t helper_fmul (uint64_t arg1, uint64_t arg2) +uint64_t helper_fmul(uint64_t arg1, uint64_t arg2) { CPU_DoubleU farg1, farg2; @@ -1073,14 +1109,15 @@ uint64_t helper_fmul (uint64_t arg1, uint64_t arg2) } /* fdiv - fdiv. */ -uint64_t helper_fdiv (uint64_t arg1, uint64_t arg2) +uint64_t helper_fdiv(uint64_t arg1, uint64_t arg2) { CPU_DoubleU farg1, farg2; farg1.ll = arg1; farg2.ll = arg2; - if (unlikely(float64_is_infinity(farg1.d) && float64_is_infinity(farg2.d))) { + if (unlikely(float64_is_infinity(farg1.d) && + float64_is_infinity(farg2.d))) { /* Division of infinity by infinity */ farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIDI); } else if (unlikely(float64_is_zero(farg1.d) && float64_is_zero(farg2.d))) { @@ -1099,7 +1136,7 @@ uint64_t helper_fdiv (uint64_t arg1, uint64_t arg2) } /* fabs */ -uint64_t helper_fabs (uint64_t arg) +uint64_t helper_fabs(uint64_t arg) { CPU_DoubleU farg; @@ -1109,7 +1146,7 @@ uint64_t helper_fabs (uint64_t arg) } /* fnabs */ -uint64_t helper_fnabs (uint64_t arg) +uint64_t helper_fnabs(uint64_t arg) { CPU_DoubleU farg; @@ -1120,7 +1157,7 @@ uint64_t helper_fnabs (uint64_t arg) } /* fneg */ -uint64_t helper_fneg (uint64_t arg) +uint64_t helper_fneg(uint64_t arg) { CPU_DoubleU farg; @@ -1130,15 +1167,18 @@ uint64_t helper_fneg (uint64_t arg) } /* fctiw - fctiw. */ -uint64_t helper_fctiw (uint64_t arg) +uint64_t helper_fctiw(uint64_t arg) { CPU_DoubleU farg; + farg.ll = arg; if (unlikely(float64_is_signaling_nan(farg.d))) { /* sNaN conversion */ - farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXCVI); - } else if (unlikely(float64_is_quiet_nan(farg.d) || float64_is_infinity(farg.d))) { + farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | + POWERPC_EXCP_FP_VXCVI); + } else if (unlikely(float64_is_quiet_nan(farg.d) || + float64_is_infinity(farg.d))) { /* qNan / infinity conversion */ farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); } else { @@ -1152,15 +1192,18 @@ uint64_t helper_fctiw (uint64_t arg) } /* fctiwz - fctiwz. */ -uint64_t helper_fctiwz (uint64_t arg) +uint64_t helper_fctiwz(uint64_t arg) { CPU_DoubleU farg; + farg.ll = arg; if (unlikely(float64_is_signaling_nan(farg.d))) { /* sNaN conversion */ - farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXCVI); - } else if (unlikely(float64_is_quiet_nan(farg.d) || float64_is_infinity(farg.d))) { + farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | + POWERPC_EXCP_FP_VXCVI); + } else if (unlikely(float64_is_quiet_nan(farg.d) || + float64_is_infinity(farg.d))) { /* qNan / infinity conversion */ farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); } else { @@ -1175,23 +1218,27 @@ uint64_t helper_fctiwz (uint64_t arg) #if defined(TARGET_PPC64) /* fcfid - fcfid. */ -uint64_t helper_fcfid (uint64_t arg) +uint64_t helper_fcfid(uint64_t arg) { CPU_DoubleU farg; + farg.d = int64_to_float64(arg, &env->fp_status); return farg.ll; } /* fctid - fctid. */ -uint64_t helper_fctid (uint64_t arg) +uint64_t helper_fctid(uint64_t arg) { CPU_DoubleU farg; + farg.ll = arg; if (unlikely(float64_is_signaling_nan(farg.d))) { /* sNaN conversion */ - farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXCVI); - } else if (unlikely(float64_is_quiet_nan(farg.d) || float64_is_infinity(farg.d))) { + farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | + POWERPC_EXCP_FP_VXCVI); + } else if (unlikely(float64_is_quiet_nan(farg.d) || + float64_is_infinity(farg.d))) { /* qNan / infinity conversion */ farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); } else { @@ -1201,15 +1248,18 @@ uint64_t helper_fctid (uint64_t arg) } /* fctidz - fctidz. */ -uint64_t helper_fctidz (uint64_t arg) +uint64_t helper_fctidz(uint64_t arg) { CPU_DoubleU farg; + farg.ll = arg; if (unlikely(float64_is_signaling_nan(farg.d))) { /* sNaN conversion */ - farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXCVI); - } else if (unlikely(float64_is_quiet_nan(farg.d) || float64_is_infinity(farg.d))) { + farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | + POWERPC_EXCP_FP_VXCVI); + } else if (unlikely(float64_is_quiet_nan(farg.d) || + float64_is_infinity(farg.d))) { /* qNan / infinity conversion */ farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); } else { @@ -1223,12 +1273,15 @@ uint64_t helper_fctidz (uint64_t arg) static inline uint64_t do_fri(uint64_t arg, int rounding_mode) { CPU_DoubleU farg; + farg.ll = arg; if (unlikely(float64_is_signaling_nan(farg.d))) { /* sNaN round */ - farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | POWERPC_EXCP_FP_VXCVI); - } else if (unlikely(float64_is_quiet_nan(farg.d) || float64_is_infinity(farg.d))) { + farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN | + POWERPC_EXCP_FP_VXCVI); + } else if (unlikely(float64_is_quiet_nan(farg.d) || + float64_is_infinity(farg.d))) { /* qNan / infinity round */ farg.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXCVI); } else { @@ -1240,28 +1293,28 @@ static inline uint64_t do_fri(uint64_t arg, int rounding_mode) return farg.ll; } -uint64_t helper_frin (uint64_t arg) +uint64_t helper_frin(uint64_t arg) { return do_fri(arg, float_round_nearest_even); } -uint64_t helper_friz (uint64_t arg) +uint64_t helper_friz(uint64_t arg) { return do_fri(arg, float_round_to_zero); } -uint64_t helper_frip (uint64_t arg) +uint64_t helper_frip(uint64_t arg) { return do_fri(arg, float_round_up); } -uint64_t helper_frim (uint64_t arg) +uint64_t helper_frim(uint64_t arg) { return do_fri(arg, float_round_down); } /* fmadd - fmadd. */ -uint64_t helper_fmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3) +uint64_t helper_fmadd(uint64_t arg1, uint64_t arg2, uint64_t arg3) { CPU_DoubleU farg1, farg2, farg3; @@ -1286,7 +1339,8 @@ uint64_t helper_fmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3) ft0_128 = float64_to_float128(farg1.d, &env->fp_status); ft1_128 = float64_to_float128(farg2.d, &env->fp_status); ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); - if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) && + if (unlikely(float128_is_infinity(ft0_128) && + float64_is_infinity(farg3.d) && float128_is_neg(ft0_128) != float64_is_neg(farg3.d))) { /* Magnitude subtraction of infinities */ farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); @@ -1301,7 +1355,7 @@ uint64_t helper_fmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3) } /* fmsub - fmsub. */ -uint64_t helper_fmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3) +uint64_t helper_fmsub(uint64_t arg1, uint64_t arg2, uint64_t arg3) { CPU_DoubleU farg1, farg2, farg3; @@ -1310,7 +1364,8 @@ uint64_t helper_fmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3) farg3.ll = arg3; if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || - (float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) { + (float64_is_zero(farg1.d) && + float64_is_infinity(farg2.d)))) { /* Multiplication of zero by infinity */ farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); } else { @@ -1326,7 +1381,8 @@ uint64_t helper_fmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3) ft0_128 = float64_to_float128(farg1.d, &env->fp_status); ft1_128 = float64_to_float128(farg2.d, &env->fp_status); ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); - if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) && + if (unlikely(float128_is_infinity(ft0_128) && + float64_is_infinity(farg3.d) && float128_is_neg(ft0_128) == float64_is_neg(farg3.d))) { /* Magnitude subtraction of infinities */ farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); @@ -1340,7 +1396,7 @@ uint64_t helper_fmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3) } /* fnmadd - fnmadd. */ -uint64_t helper_fnmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3) +uint64_t helper_fnmadd(uint64_t arg1, uint64_t arg2, uint64_t arg3) { CPU_DoubleU farg1, farg2, farg3; @@ -1365,7 +1421,8 @@ uint64_t helper_fnmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3) ft0_128 = float64_to_float128(farg1.d, &env->fp_status); ft1_128 = float64_to_float128(farg2.d, &env->fp_status); ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); - if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) && + if (unlikely(float128_is_infinity(ft0_128) && + float64_is_infinity(farg3.d) && float128_is_neg(ft0_128) != float64_is_neg(farg3.d))) { /* Magnitude subtraction of infinities */ farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); @@ -1382,7 +1439,7 @@ uint64_t helper_fnmadd (uint64_t arg1, uint64_t arg2, uint64_t arg3) } /* fnmsub - fnmsub. */ -uint64_t helper_fnmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3) +uint64_t helper_fnmsub(uint64_t arg1, uint64_t arg2, uint64_t arg3) { CPU_DoubleU farg1, farg2, farg3; @@ -1391,7 +1448,8 @@ uint64_t helper_fnmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3) farg3.ll = arg3; if (unlikely((float64_is_infinity(farg1.d) && float64_is_zero(farg2.d)) || - (float64_is_zero(farg1.d) && float64_is_infinity(farg2.d)))) { + (float64_is_zero(farg1.d) && + float64_is_infinity(farg2.d)))) { /* Multiplication of zero by infinity */ farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXIMZ); } else { @@ -1407,7 +1465,8 @@ uint64_t helper_fnmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3) ft0_128 = float64_to_float128(farg1.d, &env->fp_status); ft1_128 = float64_to_float128(farg2.d, &env->fp_status); ft0_128 = float128_mul(ft0_128, ft1_128, &env->fp_status); - if (unlikely(float128_is_infinity(ft0_128) && float64_is_infinity(farg3.d) && + if (unlikely(float128_is_infinity(ft0_128) && + float64_is_infinity(farg3.d) && float128_is_neg(ft0_128) == float64_is_neg(farg3.d))) { /* Magnitude subtraction of infinities */ farg1.ll = fload_invalid_op_excp(POWERPC_EXCP_FP_VXISI); @@ -1424,15 +1483,16 @@ uint64_t helper_fnmsub (uint64_t arg1, uint64_t arg2, uint64_t arg3) } /* frsp - frsp. */ -uint64_t helper_frsp (uint64_t arg) +uint64_t helper_frsp(uint64_t arg) { CPU_DoubleU farg; float32 f32; + farg.ll = arg; if (unlikely(float64_is_signaling_nan(farg.d))) { /* sNaN square root */ - fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); + fload_invalid_op_excp(POWERPC_EXCP_FP_VXSNAN); } f32 = float64_to_float32(farg.d, &env->fp_status); farg.d = float32_to_float64(f32, &env->fp_status); @@ -1441,9 +1501,10 @@ uint64_t helper_frsp (uint64_t arg) } /* fsqrt - fsqrt. */ -uint64_t helper_fsqrt (uint64_t arg) +uint64_t helper_fsqrt(uint64_t arg) { CPU_DoubleU farg; + farg.ll = arg; if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d))) { @@ -1460,9 +1521,10 @@ uint64_t helper_fsqrt (uint64_t arg) } /* fre - fre. */ -uint64_t helper_fre (uint64_t arg) +uint64_t helper_fre(uint64_t arg) { CPU_DoubleU farg; + farg.ll = arg; if (unlikely(float64_is_signaling_nan(farg.d))) { @@ -1474,10 +1536,11 @@ uint64_t helper_fre (uint64_t arg) } /* fres - fres. */ -uint64_t helper_fres (uint64_t arg) +uint64_t helper_fres(uint64_t arg) { CPU_DoubleU farg; float32 f32; + farg.ll = arg; if (unlikely(float64_is_signaling_nan(farg.d))) { @@ -1492,10 +1555,11 @@ uint64_t helper_fres (uint64_t arg) } /* frsqrte - frsqrte. */ -uint64_t helper_frsqrte (uint64_t arg) +uint64_t helper_frsqrte(uint64_t arg) { CPU_DoubleU farg; float32 f32; + farg.ll = arg; if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d))) { @@ -1515,23 +1579,25 @@ uint64_t helper_frsqrte (uint64_t arg) } /* fsel - fsel. */ -uint64_t helper_fsel (uint64_t arg1, uint64_t arg2, uint64_t arg3) +uint64_t helper_fsel(uint64_t arg1, uint64_t arg2, uint64_t arg3) { CPU_DoubleU farg1; farg1.ll = arg1; - if ((!float64_is_neg(farg1.d) || float64_is_zero(farg1.d)) && !float64_is_any_nan(farg1.d)) { + if ((!float64_is_neg(farg1.d) || float64_is_zero(farg1.d)) && + !float64_is_any_nan(farg1.d)) { return arg2; } else { return arg3; } } -void helper_fcmpu (uint64_t arg1, uint64_t arg2, uint32_t crfD) +void helper_fcmpu(uint64_t arg1, uint64_t arg2, uint32_t crfD) { CPU_DoubleU farg1, farg2; uint32_t ret = 0; + farg1.ll = arg1; farg2.ll = arg2; @@ -1557,10 +1623,11 @@ void helper_fcmpu (uint64_t arg1, uint64_t arg2, uint32_t crfD) } } -void helper_fcmpo (uint64_t arg1, uint64_t arg2, uint32_t crfD) +void helper_fcmpo(uint64_t arg1, uint64_t arg2, uint32_t crfD) { CPU_DoubleU farg1, farg2; uint32_t ret = 0; + farg1.ll = arg1; farg2.ll = arg2; @@ -1578,7 +1645,7 @@ void helper_fcmpo (uint64_t arg1, uint64_t arg2, uint32_t crfD) env->fpscr &= ~(0x0F << FPSCR_FPRF); env->fpscr |= ret << FPSCR_FPRF; env->crf[crfD] = ret; - if (unlikely (ret == 0x01UL)) { + if (unlikely(ret == 0x01UL)) { if (float64_is_signaling_nan(farg1.d) || float64_is_signaling_nan(farg2.d)) { /* sNaN comparison */ @@ -1591,8 +1658,8 @@ void helper_fcmpo (uint64_t arg1, uint64_t arg2, uint32_t crfD) } } -#if !defined (CONFIG_USER_ONLY) -void helper_store_msr (target_ulong val) +#if !defined(CONFIG_USER_ONLY) +void helper_store_msr(target_ulong val) { val = hreg_store_msr(env, val, 0); if (val != 0) { @@ -1611,8 +1678,9 @@ static inline void do_rfi(target_ulong nip, target_ulong msr, } else { nip = (uint32_t)nip; msr = (uint32_t)(msr & msrm); - if (keep_msrh) + if (keep_msrh) { msr |= env->msr & ~((uint64_t)0xFFFFFFFF); + } } #else nip = (uint32_t)nip; @@ -1621,7 +1689,7 @@ static inline void do_rfi(target_ulong nip, target_ulong msr, /* XXX: beware: this is false if VLE is supported */ env->nip = nip & ~((target_ulong)0x00000003); hreg_store_msr(env, msr, 1); -#if defined (DEBUG_OP) +#if defined(DEBUG_OP) cpu_dump_rfi(env->nip, env->msr); #endif /* No need to raise an exception here, @@ -1630,20 +1698,20 @@ static inline void do_rfi(target_ulong nip, target_ulong msr, env->interrupt_request |= CPU_INTERRUPT_EXITTB; } -void helper_rfi (void) +void helper_rfi(void) { do_rfi(env->spr[SPR_SRR0], env->spr[SPR_SRR1], ~((target_ulong)0x783F0000), 1); } #if defined(TARGET_PPC64) -void helper_rfid (void) +void helper_rfid(void) { do_rfi(env->spr[SPR_SRR0], env->spr[SPR_SRR1], ~((target_ulong)0x783F0000), 0); } -void helper_hrfid (void) +void helper_hrfid(void) { do_rfi(env->spr[SPR_HSRR0], env->spr[SPR_HSRR1], ~((target_ulong)0x783F0000), 0); @@ -1651,7 +1719,7 @@ void helper_hrfid (void) #endif #endif -void helper_tw (target_ulong arg1, target_ulong arg2, uint32_t flags) +void helper_tw(target_ulong arg1, target_ulong arg2, uint32_t flags) { if (!likely(!(((int32_t)arg1 < (int32_t)arg2 && (flags & 0x10)) || ((int32_t)arg1 > (int32_t)arg2 && (flags & 0x08)) || @@ -1663,21 +1731,22 @@ void helper_tw (target_ulong arg1, target_ulong arg2, uint32_t flags) } #if defined(TARGET_PPC64) -void helper_td (target_ulong arg1, target_ulong arg2, uint32_t flags) +void helper_td(target_ulong arg1, target_ulong arg2, uint32_t flags) { if (!likely(!(((int64_t)arg1 < (int64_t)arg2 && (flags & 0x10)) || ((int64_t)arg1 > (int64_t)arg2 && (flags & 0x08)) || ((int64_t)arg1 == (int64_t)arg2 && (flags & 0x04)) || ((uint64_t)arg1 < (uint64_t)arg2 && (flags & 0x02)) || - ((uint64_t)arg1 > (uint64_t)arg2 && (flags & 0x01))))) + ((uint64_t)arg1 > (uint64_t)arg2 && (flags & 0x01))))) { helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_TRAP); + } } #endif /*****************************************************************************/ /* PowerPC 601 specific instructions (POWER bridge) */ -target_ulong helper_clcs (uint32_t arg) +target_ulong helper_clcs(uint32_t arg) { switch (arg) { case 0x0CUL: @@ -1691,12 +1760,12 @@ target_ulong helper_clcs (uint32_t arg) case 0x0EUL: /* Minimum cache line size */ return (env->icache_line_size < env->dcache_line_size) ? - env->icache_line_size : env->dcache_line_size; + env->icache_line_size : env->dcache_line_size; break; case 0x0FUL: /* Maximum cache line size */ return (env->icache_line_size > env->dcache_line_size) ? - env->icache_line_size : env->dcache_line_size; + env->icache_line_size : env->dcache_line_size; break; default: /* Undefined */ @@ -1705,7 +1774,7 @@ target_ulong helper_clcs (uint32_t arg) } } -target_ulong helper_div (target_ulong arg1, target_ulong arg2) +target_ulong helper_div(target_ulong arg1, target_ulong arg2) { uint64_t tmp = (uint64_t)arg1 << 32 | env->spr[SPR_MQ]; @@ -1719,7 +1788,7 @@ target_ulong helper_div (target_ulong arg1, target_ulong arg2) } } -target_ulong helper_divo (target_ulong arg1, target_ulong arg2) +target_ulong helper_divo(target_ulong arg1, target_ulong arg2) { uint64_t tmp = (uint64_t)arg1 << 32 | env->spr[SPR_MQ]; @@ -1731,7 +1800,7 @@ target_ulong helper_divo (target_ulong arg1, target_ulong arg2) } else { env->spr[SPR_MQ] = tmp % arg2; tmp /= (int32_t)arg2; - if ((int32_t)tmp != tmp) { + if ((int32_t)tmp != tmp) { env->xer |= (1 << XER_OV) | (1 << XER_SO); } else { env->xer &= ~(1 << XER_OV); @@ -1740,7 +1809,7 @@ target_ulong helper_divo (target_ulong arg1, target_ulong arg2) } } -target_ulong helper_divs (target_ulong arg1, target_ulong arg2) +target_ulong helper_divs(target_ulong arg1, target_ulong arg2) { if (((int32_t)arg1 == INT32_MIN && (int32_t)arg2 == (int32_t)-1) || (int32_t)arg2 == 0) { @@ -1752,7 +1821,7 @@ target_ulong helper_divs (target_ulong arg1, target_ulong arg2) } } -target_ulong helper_divso (target_ulong arg1, target_ulong arg2) +target_ulong helper_divso(target_ulong arg1, target_ulong arg2) { if (((int32_t)arg1 == INT32_MIN && (int32_t)arg2 == (int32_t)-1) || (int32_t)arg2 == 0) { @@ -1766,8 +1835,8 @@ target_ulong helper_divso (target_ulong arg1, target_ulong arg2) } } -#if !defined (CONFIG_USER_ONLY) -target_ulong helper_rac (target_ulong addr) +#if !defined(CONFIG_USER_ONLY) +target_ulong helper_rac(target_ulong addr) { mmu_ctx_t ctx; int nb_BATs; @@ -1779,13 +1848,14 @@ target_ulong helper_rac (target_ulong addr) /* XXX: FIX THIS: Pretend we have no BAT */ nb_BATs = env->nb_BATs; env->nb_BATs = 0; - if (get_physical_address(env, &ctx, addr, 0, ACCESS_INT) == 0) + if (get_physical_address(env, &ctx, addr, 0, ACCESS_INT) == 0) { ret = ctx.raddr; + } env->nb_BATs = nb_BATs; return ret; } -void helper_rfsvc (void) +void helper_rfsvc(void) { do_rfi(env->lr, env->ctr, 0x0000FFFF, 0); } @@ -1799,8 +1869,8 @@ void helper_rfsvc (void) * -arg / 256 * return 256 * log10(10 + 1.0) + 0.5 */ -#if !defined (CONFIG_USER_ONLY) -target_ulong helper_602_mfrom (target_ulong arg) +#if !defined(CONFIG_USER_ONLY) +target_ulong helper_602_mfrom(target_ulong arg) { if (likely(arg < 602)) { #include "mfrom_table.c" @@ -1815,15 +1885,17 @@ target_ulong helper_602_mfrom (target_ulong arg) /* Embedded PowerPC specific helpers */ /* XXX: to be improved to check access rights when in user-mode */ -target_ulong helper_load_dcr (target_ulong dcrn) +target_ulong helper_load_dcr(target_ulong dcrn) { uint32_t val = 0; if (unlikely(env->dcr_env == NULL)) { qemu_log("No DCR environment\n"); helper_raise_exception_err(POWERPC_EXCP_PROGRAM, - POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); - } else if (unlikely(ppc_dcr_read(env->dcr_env, (uint32_t)dcrn, &val) != 0)) { + POWERPC_EXCP_INVAL | + POWERPC_EXCP_INVAL_INVAL); + } else if (unlikely(ppc_dcr_read(env->dcr_env, + (uint32_t)dcrn, &val) != 0)) { qemu_log("DCR read error %d %03x\n", (uint32_t)dcrn, (uint32_t)dcrn); helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); @@ -1831,13 +1903,15 @@ target_ulong helper_load_dcr (target_ulong dcrn) return val; } -void helper_store_dcr (target_ulong dcrn, target_ulong val) +void helper_store_dcr(target_ulong dcrn, target_ulong val) { if (unlikely(env->dcr_env == NULL)) { qemu_log("No DCR environment\n"); helper_raise_exception_err(POWERPC_EXCP_PROGRAM, - POWERPC_EXCP_INVAL | POWERPC_EXCP_INVAL_INVAL); - } else if (unlikely(ppc_dcr_write(env->dcr_env, (uint32_t)dcrn, (uint32_t)val) != 0)) { + POWERPC_EXCP_INVAL | + POWERPC_EXCP_INVAL_INVAL); + } else if (unlikely(ppc_dcr_write(env->dcr_env, (uint32_t)dcrn, + (uint32_t)val) != 0)) { qemu_log("DCR write error %d %03x\n", (uint32_t)dcrn, (uint32_t)dcrn); helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_INVAL | POWERPC_EXCP_PRIV_REG); @@ -1845,25 +1919,25 @@ void helper_store_dcr (target_ulong dcrn, target_ulong val) } #if !defined(CONFIG_USER_ONLY) -void helper_40x_rfci (void) +void helper_40x_rfci(void) { do_rfi(env->spr[SPR_40x_SRR2], env->spr[SPR_40x_SRR3], ~((target_ulong)0xFFFF0000), 0); } -void helper_rfci (void) +void helper_rfci(void) { do_rfi(env->spr[SPR_BOOKE_CSRR0], SPR_BOOKE_CSRR1, ~((target_ulong)0x3FFF0000), 0); } -void helper_rfdi (void) +void helper_rfdi(void) { do_rfi(env->spr[SPR_BOOKE_DSRR0], SPR_BOOKE_DSRR1, ~((target_ulong)0x3FFF0000), 0); } -void helper_rfmci (void) +void helper_rfmci(void) { do_rfi(env->spr[SPR_BOOKE_MCSRR0], SPR_BOOKE_MCSRR1, ~((target_ulong)0x3FFF0000), 0); @@ -1871,7 +1945,8 @@ void helper_rfmci (void) #endif /* 440 specific */ -target_ulong helper_dlmzb (target_ulong high, target_ulong low, uint32_t update_Rc) +target_ulong helper_dlmzb(target_ulong high, target_ulong low, + uint32_t update_Rc) { target_ulong mask; int i; @@ -1917,57 +1992,59 @@ target_ulong helper_dlmzb (target_ulong high, target_ulong low, uint32_t update_ #endif #if defined(HOST_WORDS_BIGENDIAN) -#define VECTOR_FOR_INORDER_I(index, element) \ +#define VECTOR_FOR_INORDER_I(index, element) \ for (index = 0; index < ARRAY_SIZE(r->element); index++) #else -#define VECTOR_FOR_INORDER_I(index, element) \ - for (index = ARRAY_SIZE(r->element)-1; index >= 0; index--) +#define VECTOR_FOR_INORDER_I(index, element) \ + for (index = ARRAY_SIZE(r->element)-1; index >= 0; index--) #endif /* If X is a NaN, store the corresponding QNaN into RESULT. Otherwise, * execute the following block. */ -#define DO_HANDLE_NAN(result, x) \ - if (float32_is_any_nan(x)) { \ - CPU_FloatU __f; \ - __f.f = x; \ - __f.l = __f.l | (1 << 22); /* Set QNaN bit. */ \ - result = __f.f; \ +#define DO_HANDLE_NAN(result, x) \ + if (float32_is_any_nan(x)) { \ + CPU_FloatU __f; \ + __f.f = x; \ + __f.l = __f.l | (1 << 22); /* Set QNaN bit. */ \ + result = __f.f; \ } else #define HANDLE_NAN1(result, x) \ DO_HANDLE_NAN(result, x) -#define HANDLE_NAN2(result, x, y) \ +#define HANDLE_NAN2(result, x, y) \ DO_HANDLE_NAN(result, x) DO_HANDLE_NAN(result, y) -#define HANDLE_NAN3(result, x, y, z) \ +#define HANDLE_NAN3(result, x, y, z) \ DO_HANDLE_NAN(result, x) DO_HANDLE_NAN(result, y) DO_HANDLE_NAN(result, z) /* Saturating arithmetic helpers. */ -#define SATCVT(from, to, from_type, to_type, min, max) \ - static inline to_type cvt##from##to(from_type x, int *sat) \ - { \ - to_type r; \ - if (x < (from_type)min) { \ - r = min; \ - *sat = 1; \ - } else if (x > (from_type)max) { \ - r = max; \ - *sat = 1; \ - } else { \ - r = x; \ - } \ - return r; \ +#define SATCVT(from, to, from_type, to_type, min, max) \ + static inline to_type cvt##from##to(from_type x, int *sat) \ + { \ + to_type r; \ + \ + if (x < (from_type)min) { \ + r = min; \ + *sat = 1; \ + } else if (x > (from_type)max) { \ + r = max; \ + *sat = 1; \ + } else { \ + r = x; \ + } \ + return r; \ } -#define SATCVTU(from, to, from_type, to_type, min, max) \ - static inline to_type cvt##from##to(from_type x, int *sat) \ - { \ - to_type r; \ - if (x > (from_type)max) { \ - r = max; \ - *sat = 1; \ - } else { \ - r = x; \ - } \ - return r; \ +#define SATCVTU(from, to, from_type, to_type, min, max) \ + static inline to_type cvt##from##to(from_type x, int *sat) \ + { \ + to_type r; \ + \ + if (x > (from_type)max) { \ + r = max; \ + *sat = 1; \ + } else { \ + r = x; \ + } \ + return r; \ } SATCVT(sh, sb, int16_t, int8_t, INT8_MIN, INT8_MAX) SATCVT(sw, sh, int32_t, int16_t, INT16_MIN, INT16_MAX) @@ -1983,17 +2060,20 @@ SATCVT(sd, uw, int64_t, uint32_t, 0, UINT32_MAX) #undef SATCVTU #define LVE(name, access, swap, element) \ - void helper_##name (ppc_avr_t *r, target_ulong addr) \ + void helper_##name(ppc_avr_t *r, target_ulong addr) \ { \ size_t n_elems = ARRAY_SIZE(r->element); \ - int adjust = HI_IDX*(n_elems-1); \ + int adjust = HI_IDX*(n_elems - 1); \ int sh = sizeof(r->element[0]) >> 1; \ int index = (addr & 0xf) >> sh; \ - if(msr_le) { \ - r->element[LO_IDX ? index : (adjust - index)] = swap(access(addr)); \ - } else { \ - r->element[LO_IDX ? index : (adjust - index)] = access(addr); \ - } \ + \ + if (msr_le) { \ + r->element[LO_IDX ? index : (adjust - index)] = \ + swap(access(addr)); \ + } else { \ + r->element[LO_IDX ? index : (adjust - index)] = \ + access(addr); \ + } \ } #define I(x) (x) LVE(lvebx, ldub, I, u8) @@ -2002,32 +2082,33 @@ LVE(lvewx, ldl, bswap32, u32) #undef I #undef LVE -void helper_lvsl (ppc_avr_t *r, target_ulong sh) +void helper_lvsl(ppc_avr_t *r, target_ulong sh) { int i, j = (sh & 0xf); - VECTOR_FOR_INORDER_I (i, u8) { + VECTOR_FOR_INORDER_I(i, u8) { r->u8[i] = j++; } } -void helper_lvsr (ppc_avr_t *r, target_ulong sh) +void helper_lvsr(ppc_avr_t *r, target_ulong sh) { int i, j = 0x10 - (sh & 0xf); - VECTOR_FOR_INORDER_I (i, u8) { + VECTOR_FOR_INORDER_I(i, u8) { r->u8[i] = j++; } } -#define STVE(name, access, swap, element) \ - void helper_##name (ppc_avr_t *r, target_ulong addr) \ - { \ - size_t n_elems = ARRAY_SIZE(r->element); \ - int adjust = HI_IDX*(n_elems-1); \ - int sh = sizeof(r->element[0]) >> 1; \ - int index = (addr & 0xf) >> sh; \ - if(msr_le) { \ +#define STVE(name, access, swap, element) \ + void helper_##name(ppc_avr_t *r, target_ulong addr) \ + { \ + size_t n_elems = ARRAY_SIZE(r->element); \ + int adjust = HI_IDX * (n_elems - 1); \ + int sh = sizeof(r->element[0]) >> 1; \ + int index = (addr & 0xf) >> sh; \ + \ + if (msr_le) { \ access(addr, swap(r->element[LO_IDX ? index : (adjust - index)])); \ } else { \ access(addr, r->element[LO_IDX ? index : (adjust - index)]); \ @@ -2040,7 +2121,7 @@ STVE(stvewx, stl, bswap32, u32) #undef I #undef LVE -void helper_mtvscr (ppc_avr_t *r) +void helper_mtvscr(ppc_avr_t *r) { #if defined(HOST_WORDS_BIGENDIAN) env->vscr = r->u32[3]; @@ -2050,25 +2131,27 @@ void helper_mtvscr (ppc_avr_t *r) set_flush_to_zero(vscr_nj, &env->vec_status); } -void helper_vaddcuw (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vaddcuw(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { int i; + for (i = 0; i < ARRAY_SIZE(r->u32); i++) { r->u32[i] = ~a->u32[i] < b->u32[i]; } } -#define VARITH_DO(name, op, element) \ -void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ -{ \ - int i; \ - for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ - r->element[i] = a->element[i] op b->element[i]; \ - } \ -} -#define VARITH(suffix, element) \ - VARITH_DO(add##suffix, +, element) \ - VARITH_DO(sub##suffix, -, element) +#define VARITH_DO(name, op, element) \ + void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + { \ + int i; \ + \ + for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ + r->element[i] = a->element[i] op b->element[i]; \ + } \ + } +#define VARITH(suffix, element) \ + VARITH_DO(add##suffix, +, element) \ + VARITH_DO(sub##suffix, -, element) VARITH(ubm, u8) VARITH(uhm, u16) VARITH(uwm, u32) @@ -2076,9 +2159,10 @@ VARITH(uwm, u32) #undef VARITH #define VARITHFP(suffix, func) \ - void helper_v##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_v##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ int i; \ + \ for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ HANDLE_NAN2(r->f[i], a->f[i], b->f[i]) { \ r->f[i] = func(a->f[i], b->f[i], &env->vec_status); \ @@ -2096,26 +2180,33 @@ VARITHFP(subfp, float32_sub) } #define VARITHSAT_DO(name, op, optype, cvt, element) \ - void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ int sat = 0; \ int i; \ + \ for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ switch (sizeof(r->element[0])) { \ - case 1: VARITHSAT_CASE(optype, op, cvt, element); break; \ - case 2: VARITHSAT_CASE(optype, op, cvt, element); break; \ - case 4: VARITHSAT_CASE(optype, op, cvt, element); break; \ + case 1: \ + VARITHSAT_CASE(optype, op, cvt, element); \ + break; \ + case 2: \ + VARITHSAT_CASE(optype, op, cvt, element); \ + break; \ + case 4: \ + VARITHSAT_CASE(optype, op, cvt, element); \ + break; \ } \ } \ if (sat) { \ env->vscr |= (1 << VSCR_SAT); \ } \ } -#define VARITHSAT_SIGNED(suffix, element, optype, cvt) \ - VARITHSAT_DO(adds##suffix##s, +, optype, cvt, element) \ +#define VARITHSAT_SIGNED(suffix, element, optype, cvt) \ + VARITHSAT_DO(adds##suffix##s, +, optype, cvt, element) \ VARITHSAT_DO(subs##suffix##s, -, optype, cvt, element) -#define VARITHSAT_UNSIGNED(suffix, element, optype, cvt) \ - VARITHSAT_DO(addu##suffix##s, +, optype, cvt, element) \ +#define VARITHSAT_UNSIGNED(suffix, element, optype, cvt) \ + VARITHSAT_DO(addu##suffix##s, +, optype, cvt, element) \ VARITHSAT_DO(subu##suffix##s, -, optype, cvt, element) VARITHSAT_SIGNED(b, s8, int16_t, cvtshsb) VARITHSAT_SIGNED(h, s16, int32_t, cvtswsh) @@ -2129,16 +2220,18 @@ VARITHSAT_UNSIGNED(w, u32, uint64_t, cvtsduw) #undef VARITHSAT_UNSIGNED #define VAVG_DO(name, element, etype) \ - void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ int i; \ + \ for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ etype x = (etype)a->element[i] + (etype)b->element[i] + 1; \ r->element[i] = x >> 1; \ } \ } -#define VAVG(type, signed_element, signed_type, unsigned_element, unsigned_type) \ +#define VAVG(type, signed_element, signed_type, unsigned_element, \ + unsigned_type) \ VAVG_DO(avgs##type, signed_element, signed_type) \ VAVG_DO(avgu##type, unsigned_element, unsigned_type) VAVG(b, s8, int16_t, u8, uint16_t) @@ -2148,12 +2241,13 @@ VAVG(w, s32, int64_t, u32, uint64_t) #undef VAVG #define VCF(suffix, cvt, element) \ - void helper_vcf##suffix (ppc_avr_t *r, ppc_avr_t *b, uint32_t uim) \ + void helper_vcf##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t uim) \ { \ int i; \ + \ for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ float32 t = cvt(b->element[i], &env->vec_status); \ - r->f[i] = float32_scalbn (t, -uim, &env->vec_status); \ + r->f[i] = float32_scalbn(t, -uim, &env->vec_status); \ } \ } VCF(ux, uint32_to_float32, u32) @@ -2161,18 +2255,26 @@ VCF(sx, int32_to_float32, s32) #undef VCF #define VCMP_DO(suffix, compare, element, record) \ - void helper_vcmp##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_vcmp##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ uint32_t ones = (uint32_t)-1; \ uint32_t all = ones; \ uint32_t none = 0; \ int i; \ + \ for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ - uint32_t result = (a->element[i] compare b->element[i] ? ones : 0x0); \ - switch (sizeof (a->element[0])) { \ - case 4: r->u32[i] = result; break; \ - case 2: r->u16[i] = result; break; \ - case 1: r->u8[i] = result; break; \ + uint32_t result = (a->element[i] compare b->element[i] ? \ + ones : 0x0); \ + switch (sizeof(a->element[0])) { \ + case 4: \ + r->u32[i] = result; \ + break; \ + case 2: \ + r->u16[i] = result; \ + break; \ + case 1: \ + r->u8[i] = result; \ + break; \ } \ all &= result; \ none |= result; \ @@ -2197,15 +2299,17 @@ VCMP(gtsw, >, s32) #undef VCMP #define VCMPFP_DO(suffix, compare, order, record) \ - void helper_vcmp##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_vcmp##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ uint32_t ones = (uint32_t)-1; \ uint32_t all = ones; \ uint32_t none = 0; \ int i; \ + \ for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ uint32_t result; \ - int rel = float32_compare_quiet(a->f[i], b->f[i], &env->vec_status); \ + int rel = float32_compare_quiet(a->f[i], b->f[i], \ + &env->vec_status); \ if (rel == float_relation_unordered) { \ result = 0; \ } else if (rel compare order) { \ @@ -2221,8 +2325,8 @@ VCMP(gtsw, >, s32) env->crf[6] = ((all != 0) << 3) | ((none == 0) << 1); \ } \ } -#define VCMPFP(suffix, compare, order) \ - VCMPFP_DO(suffix, compare, order, 0) \ +#define VCMPFP(suffix, compare, order) \ + VCMPFP_DO(suffix, compare, order, 0) \ VCMPFP_DO(suffix##_dot, compare, order, 1) VCMPFP(eqfp, ==, float_relation_equal) VCMPFP(gefp, !=, float_relation_less) @@ -2235,6 +2339,7 @@ static inline void vcmpbfp_internal(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, { int i; int all_in = 0; + for (i = 0; i < ARRAY_SIZE(r->f); i++) { int le_rel = float32_compare_quiet(a->f[i], b->f[i], &env->vec_status); if (le_rel == float_relation_unordered) { @@ -2245,6 +2350,7 @@ static inline void vcmpbfp_internal(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, int ge_rel = float32_compare_quiet(a->f[i], bneg, &env->vec_status); int le = le_rel != float_relation_greater; int ge = ge_rel != float_relation_less; + r->u32[i] = ((!le) << 31) | ((!ge) << 30); all_in |= (!le | !ge); } @@ -2254,22 +2360,23 @@ static inline void vcmpbfp_internal(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, } } -void helper_vcmpbfp (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vcmpbfp(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { vcmpbfp_internal(r, a, b, 0); } -void helper_vcmpbfp_dot (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vcmpbfp_dot(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { vcmpbfp_internal(r, a, b, 1); } #define VCT(suffix, satcvt, element) \ - void helper_vct##suffix (ppc_avr_t *r, ppc_avr_t *b, uint32_t uim) \ + void helper_vct##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t uim) \ { \ int i; \ int sat = 0; \ float_status s = env->vec_status; \ + \ set_float_rounding_mode(float_round_to_zero, &s); \ for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ if (float32_is_any_nan(b->f[i])) { \ @@ -2277,6 +2384,7 @@ void helper_vcmpbfp_dot (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) } else { \ float64 t = float32_to_float64(b->f[i], &s); \ int64_t j; \ + \ t = float64_scalbn(t, uim, &s); \ j = float64_to_int64(t, &s); \ r->element[i] = satcvt(j, &sat); \ @@ -2290,14 +2398,16 @@ VCT(uxs, cvtsduw, u32) VCT(sxs, cvtsdsw, s32) #undef VCT -void helper_vmaddfp (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmaddfp(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { int i; + for (i = 0; i < ARRAY_SIZE(r->f); i++) { HANDLE_NAN3(r->f[i], a->f[i], b->f[i], c->f[i]) { /* Need to do the computation in higher precision and round * once at the end. */ float64 af, bf, cf, t; + af = float32_to_float64(a->f[i], &env->vec_status); bf = float32_to_float64(b->f[i], &env->vec_status); cf = float32_to_float64(c->f[i], &env->vec_status); @@ -2308,7 +2418,7 @@ void helper_vmaddfp (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } } -void helper_vmhaddshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmhaddshs(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { int sat = 0; int i; @@ -2316,7 +2426,8 @@ void helper_vmhaddshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) for (i = 0; i < ARRAY_SIZE(r->s16); i++) { int32_t prod = a->s16[i] * b->s16[i]; int32_t t = (int32_t)c->s16[i] + (prod >> 15); - r->s16[i] = cvtswsh (t, &sat); + + r->s16[i] = cvtswsh(t, &sat); } if (sat) { @@ -2324,7 +2435,7 @@ void helper_vmhaddshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } } -void helper_vmhraddshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmhraddshs(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { int sat = 0; int i; @@ -2332,7 +2443,7 @@ void helper_vmhraddshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) for (i = 0; i < ARRAY_SIZE(r->s16); i++) { int32_t prod = a->s16[i] * b->s16[i] + 0x00004000; int32_t t = (int32_t)c->s16[i] + (prod >> 15); - r->s16[i] = cvtswsh (t, &sat); + r->s16[i] = cvtswsh(t, &sat); } if (sat) { @@ -2341,9 +2452,10 @@ void helper_vmhraddshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } #define VMINMAX_DO(name, compare, element) \ - void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ int i; \ + \ for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ if (a->element[i] compare b->element[i]) { \ r->element[i] = b->element[i]; \ @@ -2353,8 +2465,8 @@ void helper_vmhraddshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } \ } #define VMINMAX(suffix, element) \ - VMINMAX_DO(min##suffix, >, element) \ - VMINMAX_DO(max##suffix, <, element) + VMINMAX_DO(min##suffix, >, element) \ + VMINMAX_DO(max##suffix, <, element) VMINMAX(sb, s8) VMINMAX(sh, s16) VMINMAX(sw, s32) @@ -2365,12 +2477,14 @@ VMINMAX(uw, u32) #undef VMINMAX #define VMINMAXFP(suffix, rT, rF) \ - void helper_v##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_v##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ int i; \ + \ for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ HANDLE_NAN2(r->f[i], a->f[i], b->f[i]) { \ - if (float32_lt_quiet(a->f[i], b->f[i], &env->vec_status)) { \ + if (float32_lt_quiet(a->f[i], b->f[i], \ + &env->vec_status)) { \ r->f[i] = rT->f[i]; \ } else { \ r->f[i] = rF->f[i]; \ @@ -2382,9 +2496,10 @@ VMINMAXFP(minfp, a, b) VMINMAXFP(maxfp, b, a) #undef VMINMAXFP -void helper_vmladduhm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmladduhm(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { int i; + for (i = 0; i < ARRAY_SIZE(r->s16); i++) { int32_t prod = a->s16[i] * b->s16[i]; r->s16[i] = (int16_t) (prod + c->s16[i]); @@ -2392,18 +2507,21 @@ void helper_vmladduhm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } #define VMRG_DO(name, element, highp) \ - void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ ppc_avr_t result; \ int i; \ size_t n_elems = ARRAY_SIZE(r->element); \ - for (i = 0; i < n_elems/2; i++) { \ + \ + for (i = 0; i < n_elems / 2; i++) { \ if (highp) { \ result.element[i*2+HI_IDX] = a->element[i]; \ result.element[i*2+LO_IDX] = b->element[i]; \ } else { \ - result.element[n_elems - i*2 - (1+HI_IDX)] = b->element[n_elems - i - 1]; \ - result.element[n_elems - i*2 - (1+LO_IDX)] = a->element[n_elems - i - 1]; \ + result.element[n_elems - i * 2 - (1 + HI_IDX)] = \ + b->element[n_elems - i - 1]; \ + result.element[n_elems - i * 2 - (1 + LO_IDX)] = \ + a->element[n_elems - i - 1]; \ } \ } \ *r = result; \ @@ -2416,8 +2534,8 @@ void helper_vmladduhm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) #define MRGLO 0 #endif #define VMRG(suffix, element) \ - VMRG_DO(mrgl##suffix, element, MRGHI) \ - VMRG_DO(mrgh##suffix, element, MRGLO) + VMRG_DO(mrgl##suffix, element, MRGHI) \ + VMRG_DO(mrgh##suffix, element, MRGLO) VMRG(b, u8) VMRG(h, u16) VMRG(w, u32) @@ -2426,7 +2544,7 @@ VMRG(w, u32) #undef MRGHI #undef MRGLO -void helper_vmsummbm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmsummbm(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { int32_t prod[16]; int i; @@ -2436,11 +2554,12 @@ void helper_vmsummbm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } VECTOR_FOR_INORDER_I(i, s32) { - r->s32[i] = c->s32[i] + prod[4*i] + prod[4*i+1] + prod[4*i+2] + prod[4*i+3]; + r->s32[i] = c->s32[i] + prod[4 * i] + prod[4 * i + 1] + + prod[4 * i + 2] + prod[4 * i + 3]; } } -void helper_vmsumshm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmsumshm(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { int32_t prod[8]; int i; @@ -2450,11 +2569,11 @@ void helper_vmsumshm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } VECTOR_FOR_INORDER_I(i, s32) { - r->s32[i] = c->s32[i] + prod[2*i] + prod[2*i+1]; + r->s32[i] = c->s32[i] + prod[2 * i] + prod[2 * i + 1]; } } -void helper_vmsumshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmsumshs(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { int32_t prod[8]; int i; @@ -2464,8 +2583,9 @@ void helper_vmsumshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) prod[i] = (int32_t)a->s16[i] * b->s16[i]; } - VECTOR_FOR_INORDER_I (i, s32) { - int64_t t = (int64_t)c->s32[i] + prod[2*i] + prod[2*i+1]; + VECTOR_FOR_INORDER_I(i, s32) { + int64_t t = (int64_t)c->s32[i] + prod[2 * i] + prod[2 * i + 1]; + r->u32[i] = cvtsdsw(t, &sat); } @@ -2474,7 +2594,7 @@ void helper_vmsumshs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } } -void helper_vmsumubm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmsumubm(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { uint16_t prod[16]; int i; @@ -2484,11 +2604,12 @@ void helper_vmsumubm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } VECTOR_FOR_INORDER_I(i, u32) { - r->u32[i] = c->u32[i] + prod[4*i] + prod[4*i+1] + prod[4*i+2] + prod[4*i+3]; + r->u32[i] = c->u32[i] + prod[4 * i] + prod[4 * i + 1] + + prod[4 * i + 2] + prod[4 * i + 3]; } } -void helper_vmsumuhm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmsumuhm(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { uint32_t prod[8]; int i; @@ -2498,11 +2619,11 @@ void helper_vmsumuhm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } VECTOR_FOR_INORDER_I(i, u32) { - r->u32[i] = c->u32[i] + prod[2*i] + prod[2*i+1]; + r->u32[i] = c->u32[i] + prod[2 * i] + prod[2 * i + 1]; } } -void helper_vmsumuhs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vmsumuhs(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { uint32_t prod[8]; int i; @@ -2512,8 +2633,9 @@ void helper_vmsumuhs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) prod[i] = a->u16[i] * b->u16[i]; } - VECTOR_FOR_INORDER_I (i, s32) { - uint64_t t = (uint64_t)c->u32[i] + prod[2*i] + prod[2*i+1]; + VECTOR_FOR_INORDER_I(i, s32) { + uint64_t t = (uint64_t)c->u32[i] + prod[2 * i] + prod[2 * i + 1]; + r->u32[i] = cvtuduw(t, &sat); } @@ -2523,20 +2645,23 @@ void helper_vmsumuhs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } #define VMUL_DO(name, mul_element, prod_element, evenp) \ - void helper_v##name (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ int i; \ + \ VECTOR_FOR_INORDER_I(i, prod_element) { \ if (evenp) { \ - r->prod_element[i] = a->mul_element[i*2+HI_IDX] * b->mul_element[i*2+HI_IDX]; \ + r->prod_element[i] = a->mul_element[i * 2 + HI_IDX] * \ + b->mul_element[i * 2 + HI_IDX]; \ } else { \ - r->prod_element[i] = a->mul_element[i*2+LO_IDX] * b->mul_element[i*2+LO_IDX]; \ + r->prod_element[i] = a->mul_element[i * 2 + LO_IDX] * \ + b->mul_element[i * 2 + LO_IDX]; \ } \ } \ } -#define VMUL(suffix, mul_element, prod_element) \ - VMUL_DO(mule##suffix, mul_element, prod_element, 1) \ - VMUL_DO(mulo##suffix, mul_element, prod_element, 0) +#define VMUL(suffix, mul_element, prod_element) \ + VMUL_DO(mule##suffix, mul_element, prod_element, 1) \ + VMUL_DO(mulo##suffix, mul_element, prod_element, 0) VMUL(sb, s8, s16) VMUL(sh, s16, s32) VMUL(ub, u8, u16) @@ -2544,14 +2669,16 @@ VMUL(uh, u16, u32) #undef VMUL_DO #undef VMUL -void helper_vnmsubfp (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vnmsubfp(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { int i; + for (i = 0; i < ARRAY_SIZE(r->f); i++) { HANDLE_NAN3(r->f[i], a->f[i], b->f[i], c->f[i]) { /* Need to do the computation is higher precision and round * once at the end. */ float64 af, bf, cf, t; + af = float32_to_float64(a->f[i], &env->vec_status); bf = float32_to_float64(b->f[i], &env->vec_status); cf = float32_to_float64(c->f[i], &env->vec_status); @@ -2563,17 +2690,19 @@ void helper_vnmsubfp (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) } } -void helper_vperm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vperm(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { ppc_avr_t result; int i; - VECTOR_FOR_INORDER_I (i, u8) { + + VECTOR_FOR_INORDER_I(i, u8) { int s = c->u8[i] & 0x1f; #if defined(HOST_WORDS_BIGENDIAN) int index = s & 0xf; #else int index = 15 - (s & 0xf); #endif + if (s & 0x10) { result.u8[i] = b->u8[index]; } else { @@ -2588,7 +2717,7 @@ void helper_vperm (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) #else #define PKBIG 0 #endif -void helper_vpkpx (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vpkpx(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { int i, j; ppc_avr_t result; @@ -2598,9 +2727,10 @@ void helper_vpkpx (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) const ppc_avr_t *x[2] = { b, a }; #endif - VECTOR_FOR_INORDER_I (i, u64) { - VECTOR_FOR_INORDER_I (j, u32){ + VECTOR_FOR_INORDER_I(i, u64) { + VECTOR_FOR_INORDER_I(j, u32) { uint32_t e = x[i]->u32[j]; + result.u16[4*i+j] = (((e >> 9) & 0xfc00) | ((e >> 6) & 0x3e0) | ((e >> 3) & 0x1f)); @@ -2609,15 +2739,16 @@ void helper_vpkpx (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) *r = result; } -#define VPK(suffix, from, to, cvt, dosat) \ - void helper_vpk##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ +#define VPK(suffix, from, to, cvt, dosat) \ + void helper_vpk##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ int i; \ int sat = 0; \ ppc_avr_t result; \ ppc_avr_t *a0 = PKBIG ? a : b; \ ppc_avr_t *a1 = PKBIG ? b : a; \ - VECTOR_FOR_INORDER_I (i, from) { \ + \ + VECTOR_FOR_INORDER_I(i, from) { \ result.to[i] = cvt(a0->from[i], &sat); \ result.to[i+ARRAY_SIZE(r->from)] = cvt(a1->from[i], &sat); \ } \ @@ -2639,9 +2770,10 @@ VPK(uwum, u32, u16, I, 0) #undef VPK #undef PKBIG -void helper_vrefp (ppc_avr_t *r, ppc_avr_t *b) +void helper_vrefp(ppc_avr_t *r, ppc_avr_t *b) { int i; + for (i = 0; i < ARRAY_SIZE(r->f); i++) { HANDLE_NAN1(r->f[i], b->f[i]) { r->f[i] = float32_div(float32_one, b->f[i], &env->vec_status); @@ -2649,17 +2781,18 @@ void helper_vrefp (ppc_avr_t *r, ppc_avr_t *b) } } -#define VRFI(suffix, rounding) \ - void helper_vrfi##suffix (ppc_avr_t *r, ppc_avr_t *b) \ - { \ - int i; \ - float_status s = env->vec_status; \ - set_float_rounding_mode(rounding, &s); \ - for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ - HANDLE_NAN1(r->f[i], b->f[i]) { \ - r->f[i] = float32_round_to_int (b->f[i], &s); \ - } \ - } \ +#define VRFI(suffix, rounding) \ + void helper_vrfi##suffix(ppc_avr_t *r, ppc_avr_t *b) \ + { \ + int i; \ + float_status s = env->vec_status; \ + \ + set_float_rounding_mode(rounding, &s); \ + for (i = 0; i < ARRAY_SIZE(r->f); i++) { \ + HANDLE_NAN1(r->f[i], b->f[i]) { \ + r->f[i] = float32_round_to_int (b->f[i], &s); \ + } \ + } \ } VRFI(n, float_round_nearest_even) VRFI(m, float_round_down) @@ -2668,13 +2801,17 @@ VRFI(z, float_round_to_zero) #undef VRFI #define VROTATE(suffix, element) \ - void helper_vrl##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_vrl##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ int i; \ + \ for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ - unsigned int mask = ((1 << (3 + (sizeof (a->element[0]) >> 1))) - 1); \ + unsigned int mask = ((1 << \ + (3 + (sizeof(a->element[0]) >> 1))) \ + - 1); \ unsigned int shift = b->element[i] & mask; \ - r->element[i] = (a->element[i] << shift) | (a->element[i] >> (sizeof(a->element[0]) * 8 - shift)); \ + r->element[i] = (a->element[i] << shift) | \ + (a->element[i] >> (sizeof(a->element[0]) * 8 - shift)); \ } \ } VROTATE(b, u8) @@ -2682,26 +2819,29 @@ VROTATE(h, u16) VROTATE(w, u32) #undef VROTATE -void helper_vrsqrtefp (ppc_avr_t *r, ppc_avr_t *b) +void helper_vrsqrtefp(ppc_avr_t *r, ppc_avr_t *b) { int i; + for (i = 0; i < ARRAY_SIZE(r->f); i++) { HANDLE_NAN1(r->f[i], b->f[i]) { float32 t = float32_sqrt(b->f[i], &env->vec_status); + r->f[i] = float32_div(float32_one, t, &env->vec_status); } } } -void helper_vsel (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) +void helper_vsel(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, ppc_avr_t *c) { r->u64[0] = (a->u64[0] & ~c->u64[0]) | (b->u64[0] & c->u64[0]); r->u64[1] = (a->u64[1] & ~c->u64[1]) | (b->u64[1] & c->u64[1]); } -void helper_vexptefp (ppc_avr_t *r, ppc_avr_t *b) +void helper_vexptefp(ppc_avr_t *r, ppc_avr_t *b) { int i; + for (i = 0; i < ARRAY_SIZE(r->f); i++) { HANDLE_NAN1(r->f[i], b->f[i]) { r->f[i] = float32_exp2(b->f[i], &env->vec_status); @@ -2709,9 +2849,10 @@ void helper_vexptefp (ppc_avr_t *r, ppc_avr_t *b) } } -void helper_vlogefp (ppc_avr_t *r, ppc_avr_t *b) +void helper_vlogefp(ppc_avr_t *r, ppc_avr_t *b) { int i; + for (i = 0; i < ARRAY_SIZE(r->f); i++) { HANDLE_NAN1(r->f[i], b->f[i]) { r->f[i] = float32_log2(b->f[i], &env->vec_status); @@ -2730,11 +2871,12 @@ void helper_vlogefp (ppc_avr_t *r, ppc_avr_t *b) * shift counts are not identical. We check to make sure that they are * to conform to what real hardware appears to do. */ #define VSHIFT(suffix, leftp) \ - void helper_vs##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_vs##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ int shift = b->u8[LO_IDX*15] & 0x7; \ int doit = 1; \ int i; \ + \ for (i = 0; i < ARRAY_SIZE(r->u8); i++) { \ doit = doit && ((b->u8[i] & 0x7) == shift); \ } \ @@ -2743,10 +2885,12 @@ void helper_vlogefp (ppc_avr_t *r, ppc_avr_t *b) *r = *a; \ } else if (leftp) { \ uint64_t carry = a->u64[LO_IDX] >> (64 - shift); \ + \ r->u64[HI_IDX] = (a->u64[HI_IDX] << shift) | carry; \ r->u64[LO_IDX] = a->u64[LO_IDX] << shift; \ } else { \ uint64_t carry = a->u64[HI_IDX] << (64 - shift); \ + \ r->u64[LO_IDX] = (a->u64[LO_IDX] >> shift) | carry; \ r->u64[HI_IDX] = a->u64[HI_IDX] >> shift; \ } \ @@ -2759,12 +2903,16 @@ VSHIFT(r, RIGHT) #undef RIGHT #define VSL(suffix, element) \ - void helper_vsl##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_vsl##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ int i; \ + \ for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ - unsigned int mask = ((1 << (3 + (sizeof (a->element[0]) >> 1))) - 1); \ + unsigned int mask = ((1 << \ + (3 + (sizeof(a->element[0]) >> 1))) \ + - 1); \ unsigned int shift = b->element[i] & mask; \ + \ r->element[i] = a->element[i] << shift; \ } \ } @@ -2773,7 +2921,7 @@ VSL(h, u16) VSL(w, u32) #undef VSL -void helper_vsldoi (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift) +void helper_vsldoi(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift) { int sh = shift & 0xf; int i; @@ -2783,7 +2931,7 @@ void helper_vsldoi (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift) for (i = 0; i < ARRAY_SIZE(r->u8); i++) { int index = sh + i; if (index > 0xf) { - result.u8[i] = b->u8[index-0x10]; + result.u8[i] = b->u8[index - 0x10]; } else { result.u8[i] = a->u8[index]; } @@ -2792,7 +2940,7 @@ void helper_vsldoi (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift) for (i = 0; i < ARRAY_SIZE(r->u8); i++) { int index = (16 - sh) + i; if (index > 0xf) { - result.u8[i] = a->u8[index-0x10]; + result.u8[i] = a->u8[index - 0x10]; } else { result.u8[i] = b->u8[index]; } @@ -2801,16 +2949,16 @@ void helper_vsldoi (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t shift) *r = result; } -void helper_vslo (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vslo(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { - int sh = (b->u8[LO_IDX*0xf] >> 3) & 0xf; + int sh = (b->u8[LO_IDX*0xf] >> 3) & 0xf; -#if defined (HOST_WORDS_BIGENDIAN) - memmove (&r->u8[0], &a->u8[sh], 16-sh); - memset (&r->u8[16-sh], 0, sh); +#if defined(HOST_WORDS_BIGENDIAN) + memmove(&r->u8[0], &a->u8[sh], 16 - sh); + memset(&r->u8[16-sh], 0, sh); #else - memmove (&r->u8[sh], &a->u8[0], 16-sh); - memset (&r->u8[0], 0, sh); + memmove(&r->u8[sh], &a->u8[0], 16 - sh); + memset(&r->u8[0], 0, sh); #endif } @@ -2819,13 +2967,15 @@ void helper_vslo (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) #if defined(HOST_WORDS_BIGENDIAN) #define SPLAT_ELEMENT(element) _SPLAT_MASKED(element) #else -#define SPLAT_ELEMENT(element) (ARRAY_SIZE(r->element)-1 - _SPLAT_MASKED(element)) +#define SPLAT_ELEMENT(element) \ + (ARRAY_SIZE(r->element) - 1 - _SPLAT_MASKED(element)) #endif #define VSPLT(suffix, element) \ - void helper_vsplt##suffix (ppc_avr_t *r, ppc_avr_t *b, uint32_t splat) \ + void helper_vsplt##suffix(ppc_avr_t *r, ppc_avr_t *b, uint32_t splat) \ { \ uint32_t s = b->element[SPLAT_ELEMENT(element)]; \ int i; \ + \ for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ r->element[i] = s; \ } \ @@ -2838,10 +2988,11 @@ VSPLT(w, u32) #undef _SPLAT_MASKED #define VSPLTI(suffix, element, splat_type) \ - void helper_vspltis##suffix (ppc_avr_t *r, uint32_t splat) \ + void helper_vspltis##suffix(ppc_avr_t *r, uint32_t splat) \ { \ splat_type x = (int8_t)(splat << 3) >> 3; \ int i; \ + \ for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ r->element[i] = x; \ } \ @@ -2852,12 +3003,16 @@ VSPLTI(w, s32, int32_t) #undef VSPLTI #define VSR(suffix, element) \ - void helper_vsr##suffix (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ + void helper_vsr##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ int i; \ + \ for (i = 0; i < ARRAY_SIZE(r->element); i++) { \ - unsigned int mask = ((1 << (3 + (sizeof (a->element[0]) >> 1))) - 1); \ + unsigned int mask = ((1 << \ + (3 + (sizeof(a->element[0]) >> 1))) \ + - 1); \ unsigned int shift = b->element[i] & mask; \ + \ r->element[i] = a->element[i] >> shift; \ } \ } @@ -2869,28 +3024,29 @@ VSR(h, u16) VSR(w, u32) #undef VSR -void helper_vsro (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vsro(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { - int sh = (b->u8[LO_IDX*0xf] >> 3) & 0xf; + int sh = (b->u8[LO_IDX * 0xf] >> 3) & 0xf; -#if defined (HOST_WORDS_BIGENDIAN) - memmove (&r->u8[sh], &a->u8[0], 16-sh); - memset (&r->u8[0], 0, sh); +#if defined(HOST_WORDS_BIGENDIAN) + memmove(&r->u8[sh], &a->u8[0], 16 - sh); + memset(&r->u8[0], 0, sh); #else - memmove (&r->u8[0], &a->u8[sh], 16-sh); - memset (&r->u8[16-sh], 0, sh); + memmove(&r->u8[0], &a->u8[sh], 16 - sh); + memset(&r->u8[16 - sh], 0, sh); #endif } -void helper_vsubcuw (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vsubcuw(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { int i; + for (i = 0; i < ARRAY_SIZE(r->u32); i++) { r->u32[i] = a->u32[i] >= b->u32[i]; } } -void helper_vsumsws (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vsumsws(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { int64_t t; int i, upper; @@ -2915,7 +3071,7 @@ void helper_vsumsws (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) } } -void helper_vsum2sws (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vsum2sws(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { int i, j, upper; ppc_avr_t result; @@ -2927,12 +3083,13 @@ void helper_vsum2sws (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) upper = 0; #endif for (i = 0; i < ARRAY_SIZE(r->u64); i++) { - int64_t t = (int64_t)b->s32[upper+i*2]; + int64_t t = (int64_t)b->s32[upper + i * 2]; + result.u64[i] = 0; for (j = 0; j < ARRAY_SIZE(r->u64); j++) { - t += a->s32[2*i+j]; + t += a->s32[2 * i + j]; } - result.s32[upper+i*2] = cvtsdsw(t, &sat); + result.s32[upper + i * 2] = cvtsdsw(t, &sat); } *r = result; @@ -2941,15 +3098,16 @@ void helper_vsum2sws (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) } } -void helper_vsum4sbs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vsum4sbs(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { int i, j; int sat = 0; for (i = 0; i < ARRAY_SIZE(r->s32); i++) { int64_t t = (int64_t)b->s32[i]; + for (j = 0; j < ARRAY_SIZE(r->s32); j++) { - t += a->s8[4*i+j]; + t += a->s8[4 * i + j]; } r->s32[i] = cvtsdsw(t, &sat); } @@ -2959,14 +3117,15 @@ void helper_vsum4sbs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) } } -void helper_vsum4shs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vsum4shs(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { int sat = 0; int i; for (i = 0; i < ARRAY_SIZE(r->s32); i++) { int64_t t = (int64_t)b->s32[i]; - t += a->s16[2*i] + a->s16[2*i+1]; + + t += a->s16[2 * i] + a->s16[2 * i + 1]; r->s32[i] = cvtsdsw(t, &sat); } @@ -2975,15 +3134,16 @@ void helper_vsum4shs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) } } -void helper_vsum4ubs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) +void helper_vsum4ubs(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) { int i, j; int sat = 0; for (i = 0; i < ARRAY_SIZE(r->u32); i++) { uint64_t t = (uint64_t)b->u32[i]; + for (j = 0; j < ARRAY_SIZE(r->u32); j++) { - t += a->u8[4*i+j]; + t += a->u8[4 * i + j]; } r->u32[i] = cvtuduw(t, &sat); } @@ -3000,17 +3160,19 @@ void helper_vsum4ubs (ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) #define UPKHI 0 #define UPKLO 1 #endif -#define VUPKPX(suffix, hi) \ - void helper_vupk##suffix (ppc_avr_t *r, ppc_avr_t *b) \ - { \ - int i; \ - ppc_avr_t result; \ - for (i = 0; i < ARRAY_SIZE(r->u32); i++) { \ - uint16_t e = b->u16[hi ? i : i+4]; \ - uint8_t a = (e >> 15) ? 0xff : 0; \ - uint8_t r = (e >> 10) & 0x1f; \ - uint8_t g = (e >> 5) & 0x1f; \ - uint8_t b = e & 0x1f; \ +#define VUPKPX(suffix, hi) \ + void helper_vupk##suffix(ppc_avr_t *r, ppc_avr_t *b) \ + { \ + int i; \ + ppc_avr_t result; \ + \ + for (i = 0; i < ARRAY_SIZE(r->u32); i++) { \ + uint16_t e = b->u16[hi ? i : i+4]; \ + uint8_t a = (e >> 15) ? 0xff : 0; \ + uint8_t r = (e >> 10) & 0x1f; \ + uint8_t g = (e >> 5) & 0x1f; \ + uint8_t b = e & 0x1f; \ + \ result.u32[i] = (a << 24) | (r << 16) | (g << 8) | b; \ } \ *r = result; \ @@ -3020,17 +3182,19 @@ VUPKPX(hpx, UPKHI) #undef VUPKPX #define VUPK(suffix, unpacked, packee, hi) \ - void helper_vupk##suffix (ppc_avr_t *r, ppc_avr_t *b) \ + void helper_vupk##suffix(ppc_avr_t *r, ppc_avr_t *b) \ { \ int i; \ ppc_avr_t result; \ + \ if (hi) { \ for (i = 0; i < ARRAY_SIZE(r->unpacked); i++) { \ result.unpacked[i] = b->packee[i]; \ } \ } else { \ - for (i = ARRAY_SIZE(r->unpacked); i < ARRAY_SIZE(r->packee); i++) { \ - result.unpacked[i-ARRAY_SIZE(r->unpacked)] = b->packee[i]; \ + for (i = ARRAY_SIZE(r->unpacked); i < ARRAY_SIZE(r->packee); \ + i++) { \ + result.unpacked[i - ARRAY_SIZE(r->unpacked)] = b->packee[i]; \ } \ } \ *r = result; \ @@ -3070,8 +3234,8 @@ static inline uint32_t word_reverse(uint32_t val) (byte_reverse(val >> 8) << 16) | (byte_reverse(val) << 24); } -#define MASKBITS 16 // Random value - to be fixed (implementation dependent) -target_ulong helper_brinc (target_ulong arg1, target_ulong arg2) +#define MASKBITS 16 /* Random value - to be fixed (implementation dependent) */ +target_ulong helper_brinc(target_ulong arg1, target_ulong arg2) { uint32_t a, b, d, mask; @@ -3082,15 +3246,16 @@ target_ulong helper_brinc (target_ulong arg1, target_ulong arg2) return (arg1 & ~mask) | (d & b); } -uint32_t helper_cntlsw32 (uint32_t val) +uint32_t helper_cntlsw32(uint32_t val) { - if (val & 0x80000000) + if (val & 0x80000000) { return clz32(~val); - else + } else { return clz32(val); + } } -uint32_t helper_cntlzw32 (uint32_t val) +uint32_t helper_cntlzw32(uint32_t val) { return clz32(val); } @@ -3120,8 +3285,9 @@ static inline int32_t efsctsi(uint32_t val) u.l = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float32_is_quiet_nan(u.f))) + if (unlikely(float32_is_quiet_nan(u.f))) { return 0; + } return float32_to_int32(u.f, &env->vec_status); } @@ -3132,8 +3298,9 @@ static inline uint32_t efsctui(uint32_t val) u.l = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float32_is_quiet_nan(u.f))) + if (unlikely(float32_is_quiet_nan(u.f))) { return 0; + } return float32_to_uint32(u.f, &env->vec_status); } @@ -3144,8 +3311,9 @@ static inline uint32_t efsctsiz(uint32_t val) u.l = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float32_is_quiet_nan(u.f))) + if (unlikely(float32_is_quiet_nan(u.f))) { return 0; + } return float32_to_int32_round_to_zero(u.f, &env->vec_status); } @@ -3156,8 +3324,9 @@ static inline uint32_t efsctuiz(uint32_t val) u.l = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float32_is_quiet_nan(u.f))) + if (unlikely(float32_is_quiet_nan(u.f))) { return 0; + } return float32_to_uint32_round_to_zero(u.f, &env->vec_status); } @@ -3193,8 +3362,9 @@ static inline uint32_t efsctsf(uint32_t val) u.l = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float32_is_quiet_nan(u.f))) + if (unlikely(float32_is_quiet_nan(u.f))) { return 0; + } tmp = uint64_to_float32(1ULL << 32, &env->vec_status); u.f = float32_mul(u.f, tmp, &env->vec_status); @@ -3208,19 +3378,20 @@ static inline uint32_t efsctuf(uint32_t val) u.l = val; /* NaN are not treated the same way IEEE 754 does */ - if (unlikely(float32_is_quiet_nan(u.f))) + if (unlikely(float32_is_quiet_nan(u.f))) { return 0; + } tmp = uint64_to_float32(1ULL << 32, &env->vec_status); u.f = float32_mul(u.f, tmp, &env->vec_status); return float32_to_uint32(u.f, &env->vec_status); } -#define HELPER_SPE_SINGLE_CONV(name) \ -uint32_t helper_e##name (uint32_t val) \ -{ \ - return e##name(val); \ -} +#define HELPER_SPE_SINGLE_CONV(name) \ + uint32_t helper_e##name(uint32_t val) \ + { \ + return e##name(val); \ + } /* efscfsi */ HELPER_SPE_SINGLE_CONV(fscfsi); /* efscfui */ @@ -3242,12 +3413,12 @@ HELPER_SPE_SINGLE_CONV(fsctsf); /* efsctuf */ HELPER_SPE_SINGLE_CONV(fsctuf); -#define HELPER_SPE_VECTOR_CONV(name) \ -uint64_t helper_ev##name (uint64_t val) \ -{ \ - return ((uint64_t)e##name(val >> 32) << 32) | \ - (uint64_t)e##name(val); \ -} +#define HELPER_SPE_VECTOR_CONV(name) \ + uint64_t helper_ev##name(uint64_t val) \ + { \ + return ((uint64_t)e##name(val >> 32) << 32) | \ + (uint64_t)e##name(val); \ + } /* evfscfsi */ HELPER_SPE_VECTOR_CONV(fscfsi); /* evfscfui */ @@ -3273,6 +3444,7 @@ HELPER_SPE_VECTOR_CONV(fsctuf); static inline uint32_t efsadd(uint32_t op1, uint32_t op2) { CPU_FloatU u1, u2; + u1.l = op1; u2.l = op2; u1.f = float32_add(u1.f, u2.f, &env->vec_status); @@ -3282,6 +3454,7 @@ static inline uint32_t efsadd(uint32_t op1, uint32_t op2) static inline uint32_t efssub(uint32_t op1, uint32_t op2) { CPU_FloatU u1, u2; + u1.l = op1; u2.l = op2; u1.f = float32_sub(u1.f, u2.f, &env->vec_status); @@ -3291,6 +3464,7 @@ static inline uint32_t efssub(uint32_t op1, uint32_t op2) static inline uint32_t efsmul(uint32_t op1, uint32_t op2) { CPU_FloatU u1, u2; + u1.l = op1; u2.l = op2; u1.f = float32_mul(u1.f, u2.f, &env->vec_status); @@ -3300,17 +3474,18 @@ static inline uint32_t efsmul(uint32_t op1, uint32_t op2) static inline uint32_t efsdiv(uint32_t op1, uint32_t op2) { CPU_FloatU u1, u2; + u1.l = op1; u2.l = op2; u1.f = float32_div(u1.f, u2.f, &env->vec_status); return u1.l; } -#define HELPER_SPE_SINGLE_ARITH(name) \ -uint32_t helper_e##name (uint32_t op1, uint32_t op2) \ -{ \ - return e##name(op1, op2); \ -} +#define HELPER_SPE_SINGLE_ARITH(name) \ + uint32_t helper_e##name(uint32_t op1, uint32_t op2) \ + { \ + return e##name(op1, op2); \ + } /* efsadd */ HELPER_SPE_SINGLE_ARITH(fsadd); /* efssub */ @@ -3320,12 +3495,12 @@ HELPER_SPE_SINGLE_ARITH(fsmul); /* efsdiv */ HELPER_SPE_SINGLE_ARITH(fsdiv); -#define HELPER_SPE_VECTOR_ARITH(name) \ -uint64_t helper_ev##name (uint64_t op1, uint64_t op2) \ -{ \ - return ((uint64_t)e##name(op1 >> 32, op2 >> 32) << 32) | \ - (uint64_t)e##name(op1, op2); \ -} +#define HELPER_SPE_VECTOR_ARITH(name) \ + uint64_t helper_ev##name(uint64_t op1, uint64_t op2) \ + { \ + return ((uint64_t)e##name(op1 >> 32, op2 >> 32) << 32) | \ + (uint64_t)e##name(op1, op2); \ + } /* evfsadd */ HELPER_SPE_VECTOR_ARITH(fsadd); /* evfssub */ @@ -3339,6 +3514,7 @@ HELPER_SPE_VECTOR_ARITH(fsdiv); static inline uint32_t efscmplt(uint32_t op1, uint32_t op2) { CPU_FloatU u1, u2; + u1.l = op1; u2.l = op2; return float32_lt(u1.f, u2.f, &env->vec_status) ? 4 : 0; @@ -3347,6 +3523,7 @@ static inline uint32_t efscmplt(uint32_t op1, uint32_t op2) static inline uint32_t efscmpgt(uint32_t op1, uint32_t op2) { CPU_FloatU u1, u2; + u1.l = op1; u2.l = op2; return float32_le(u1.f, u2.f, &env->vec_status) ? 0 : 4; @@ -3355,6 +3532,7 @@ static inline uint32_t efscmpgt(uint32_t op1, uint32_t op2) static inline uint32_t efscmpeq(uint32_t op1, uint32_t op2) { CPU_FloatU u1, u2; + u1.l = op1; u2.l = op2; return float32_eq(u1.f, u2.f, &env->vec_status) ? 4 : 0; @@ -3378,11 +3556,11 @@ static inline uint32_t efststeq(uint32_t op1, uint32_t op2) return efscmpeq(op1, op2); } -#define HELPER_SINGLE_SPE_CMP(name) \ -uint32_t helper_e##name (uint32_t op1, uint32_t op2) \ -{ \ - return e##name(op1, op2) << 2; \ -} +#define HELPER_SINGLE_SPE_CMP(name) \ + uint32_t helper_e##name(uint32_t op1, uint32_t op2) \ + { \ + return e##name(op1, op2) << 2; \ + } /* efststlt */ HELPER_SINGLE_SPE_CMP(fststlt); /* efststgt */ @@ -3401,11 +3579,11 @@ static inline uint32_t evcmp_merge(int t0, int t1) return (t0 << 3) | (t1 << 2) | ((t0 | t1) << 1) | (t0 & t1); } -#define HELPER_VECTOR_SPE_CMP(name) \ -uint32_t helper_ev##name (uint64_t op1, uint64_t op2) \ -{ \ - return evcmp_merge(e##name(op1 >> 32, op2 >> 32), e##name(op1, op2)); \ -} +#define HELPER_VECTOR_SPE_CMP(name) \ + uint32_t helper_ev##name(uint64_t op1, uint64_t op2) \ + { \ + return evcmp_merge(e##name(op1 >> 32, op2 >> 32), e##name(op1, op2)); \ + } /* evfststlt */ HELPER_VECTOR_SPE_CMP(fststlt); /* evfststgt */ @@ -3420,7 +3598,7 @@ HELPER_VECTOR_SPE_CMP(fscmpgt); HELPER_VECTOR_SPE_CMP(fscmpeq); /* Double-precision floating-point conversion */ -uint64_t helper_efdcfsi (uint32_t val) +uint64_t helper_efdcfsi(uint32_t val) { CPU_DoubleU u; @@ -3429,7 +3607,7 @@ uint64_t helper_efdcfsi (uint32_t val) return u.ll; } -uint64_t helper_efdcfsid (uint64_t val) +uint64_t helper_efdcfsid(uint64_t val) { CPU_DoubleU u; @@ -3438,7 +3616,7 @@ uint64_t helper_efdcfsid (uint64_t val) return u.ll; } -uint64_t helper_efdcfui (uint32_t val) +uint64_t helper_efdcfui(uint32_t val) { CPU_DoubleU u; @@ -3447,7 +3625,7 @@ uint64_t helper_efdcfui (uint32_t val) return u.ll; } -uint64_t helper_efdcfuid (uint64_t val) +uint64_t helper_efdcfuid(uint64_t val) { CPU_DoubleU u; @@ -3456,7 +3634,7 @@ uint64_t helper_efdcfuid (uint64_t val) return u.ll; } -uint32_t helper_efdctsi (uint64_t val) +uint32_t helper_efdctsi(uint64_t val) { CPU_DoubleU u; @@ -3469,7 +3647,7 @@ uint32_t helper_efdctsi (uint64_t val) return float64_to_int32(u.d, &env->vec_status); } -uint32_t helper_efdctui (uint64_t val) +uint32_t helper_efdctui(uint64_t val) { CPU_DoubleU u; @@ -3482,7 +3660,7 @@ uint32_t helper_efdctui (uint64_t val) return float64_to_uint32(u.d, &env->vec_status); } -uint32_t helper_efdctsiz (uint64_t val) +uint32_t helper_efdctsiz(uint64_t val) { CPU_DoubleU u; @@ -3495,7 +3673,7 @@ uint32_t helper_efdctsiz (uint64_t val) return float64_to_int32_round_to_zero(u.d, &env->vec_status); } -uint64_t helper_efdctsidz (uint64_t val) +uint64_t helper_efdctsidz(uint64_t val) { CPU_DoubleU u; @@ -3508,7 +3686,7 @@ uint64_t helper_efdctsidz (uint64_t val) return float64_to_int64_round_to_zero(u.d, &env->vec_status); } -uint32_t helper_efdctuiz (uint64_t val) +uint32_t helper_efdctuiz(uint64_t val) { CPU_DoubleU u; @@ -3521,7 +3699,7 @@ uint32_t helper_efdctuiz (uint64_t val) return float64_to_uint32_round_to_zero(u.d, &env->vec_status); } -uint64_t helper_efdctuidz (uint64_t val) +uint64_t helper_efdctuidz(uint64_t val) { CPU_DoubleU u; @@ -3534,7 +3712,7 @@ uint64_t helper_efdctuidz (uint64_t val) return float64_to_uint64_round_to_zero(u.d, &env->vec_status); } -uint64_t helper_efdcfsf (uint32_t val) +uint64_t helper_efdcfsf(uint32_t val) { CPU_DoubleU u; float64 tmp; @@ -3546,7 +3724,7 @@ uint64_t helper_efdcfsf (uint32_t val) return u.ll; } -uint64_t helper_efdcfuf (uint32_t val) +uint64_t helper_efdcfuf(uint32_t val) { CPU_DoubleU u; float64 tmp; @@ -3558,7 +3736,7 @@ uint64_t helper_efdcfuf (uint32_t val) return u.ll; } -uint32_t helper_efdctsf (uint64_t val) +uint32_t helper_efdctsf(uint64_t val) { CPU_DoubleU u; float64 tmp; @@ -3574,7 +3752,7 @@ uint32_t helper_efdctsf (uint64_t val) return float64_to_int32(u.d, &env->vec_status); } -uint32_t helper_efdctuf (uint64_t val) +uint32_t helper_efdctuf(uint64_t val) { CPU_DoubleU u; float64 tmp; @@ -3590,7 +3768,7 @@ uint32_t helper_efdctuf (uint64_t val) return float64_to_uint32(u.d, &env->vec_status); } -uint32_t helper_efscfd (uint64_t val) +uint32_t helper_efscfd(uint64_t val) { CPU_DoubleU u1; CPU_FloatU u2; @@ -3601,7 +3779,7 @@ uint32_t helper_efscfd (uint64_t val) return u2.l; } -uint64_t helper_efdcfs (uint32_t val) +uint64_t helper_efdcfs(uint32_t val) { CPU_DoubleU u2; CPU_FloatU u1; @@ -3613,36 +3791,40 @@ uint64_t helper_efdcfs (uint32_t val) } /* Double precision fixed-point arithmetic */ -uint64_t helper_efdadd (uint64_t op1, uint64_t op2) +uint64_t helper_efdadd(uint64_t op1, uint64_t op2) { CPU_DoubleU u1, u2; + u1.ll = op1; u2.ll = op2; u1.d = float64_add(u1.d, u2.d, &env->vec_status); return u1.ll; } -uint64_t helper_efdsub (uint64_t op1, uint64_t op2) +uint64_t helper_efdsub(uint64_t op1, uint64_t op2) { CPU_DoubleU u1, u2; + u1.ll = op1; u2.ll = op2; u1.d = float64_sub(u1.d, u2.d, &env->vec_status); return u1.ll; } -uint64_t helper_efdmul (uint64_t op1, uint64_t op2) +uint64_t helper_efdmul(uint64_t op1, uint64_t op2) { CPU_DoubleU u1, u2; + u1.ll = op1; u2.ll = op2; u1.d = float64_mul(u1.d, u2.d, &env->vec_status); return u1.ll; } -uint64_t helper_efddiv (uint64_t op1, uint64_t op2) +uint64_t helper_efddiv(uint64_t op1, uint64_t op2) { CPU_DoubleU u1, u2; + u1.ll = op1; u2.ll = op2; u1.d = float64_div(u1.d, u2.d, &env->vec_status); @@ -3650,43 +3832,46 @@ uint64_t helper_efddiv (uint64_t op1, uint64_t op2) } /* Double precision floating point helpers */ -uint32_t helper_efdtstlt (uint64_t op1, uint64_t op2) +uint32_t helper_efdtstlt(uint64_t op1, uint64_t op2) { CPU_DoubleU u1, u2; + u1.ll = op1; u2.ll = op2; return float64_lt(u1.d, u2.d, &env->vec_status) ? 4 : 0; } -uint32_t helper_efdtstgt (uint64_t op1, uint64_t op2) +uint32_t helper_efdtstgt(uint64_t op1, uint64_t op2) { CPU_DoubleU u1, u2; + u1.ll = op1; u2.ll = op2; return float64_le(u1.d, u2.d, &env->vec_status) ? 0 : 4; } -uint32_t helper_efdtsteq (uint64_t op1, uint64_t op2) +uint32_t helper_efdtsteq(uint64_t op1, uint64_t op2) { CPU_DoubleU u1, u2; + u1.ll = op1; u2.ll = op2; return float64_eq_quiet(u1.d, u2.d, &env->vec_status) ? 4 : 0; } -uint32_t helper_efdcmplt (uint64_t op1, uint64_t op2) +uint32_t helper_efdcmplt(uint64_t op1, uint64_t op2) { /* XXX: TODO: test special values (NaN, infinites, ...) */ return helper_efdtstlt(op1, op2); } -uint32_t helper_efdcmpgt (uint64_t op1, uint64_t op2) +uint32_t helper_efdcmpgt(uint64_t op1, uint64_t op2) { /* XXX: TODO: test special values (NaN, infinites, ...) */ return helper_efdtstgt(op1, op2); } -uint32_t helper_efdcmpeq (uint64_t op1, uint64_t op2) +uint32_t helper_efdcmpeq(uint64_t op1, uint64_t op2) { /* XXX: TODO: test special values (NaN, infinites, ...) */ return helper_efdtsteq(op1, op2); @@ -3694,7 +3879,7 @@ uint32_t helper_efdcmpeq (uint64_t op1, uint64_t op2) /*****************************************************************************/ /* Softmmu support */ -#if !defined (CONFIG_USER_ONLY) +#if !defined(CONFIG_USER_ONLY) #define MMUSUFFIX _mmu @@ -3740,30 +3925,31 @@ void tlb_fill(CPUPPCState *env1, target_ulong addr, int is_write, int mmu_idx, } /* Segment registers load and store */ -target_ulong helper_load_sr (target_ulong sr_num) +target_ulong helper_load_sr(target_ulong sr_num) { #if defined(TARGET_PPC64) - if (env->mmu_model & POWERPC_MMU_64) + if (env->mmu_model & POWERPC_MMU_64) { return ppc_load_sr(env, sr_num); + } #endif return env->sr[sr_num]; } -void helper_store_sr (target_ulong sr_num, target_ulong val) +void helper_store_sr(target_ulong sr_num, target_ulong val) { ppc_store_sr(env, sr_num, val); } /* SLB management */ #if defined(TARGET_PPC64) -void helper_store_slb (target_ulong rb, target_ulong rs) +void helper_store_slb(target_ulong rb, target_ulong rs) { if (ppc_store_slb(env, rb, rs) < 0) { helper_raise_exception_err(POWERPC_EXCP_PROGRAM, POWERPC_EXCP_INVAL); } } -target_ulong helper_load_slb_esid (target_ulong rb) +target_ulong helper_load_slb_esid(target_ulong rb) { target_ulong rt; @@ -3773,7 +3959,7 @@ target_ulong helper_load_slb_esid (target_ulong rb) return rt; } -target_ulong helper_load_slb_vsid (target_ulong rb) +target_ulong helper_load_slb_vsid(target_ulong rb) { target_ulong rt; @@ -3783,12 +3969,12 @@ target_ulong helper_load_slb_vsid (target_ulong rb) return rt; } -void helper_slbia (void) +void helper_slbia(void) { ppc_slb_invalidate_all(env); } -void helper_slbie (target_ulong addr) +void helper_slbie(target_ulong addr) { ppc_slb_invalidate_one(env, addr); } @@ -3796,19 +3982,19 @@ void helper_slbie (target_ulong addr) #endif /* defined(TARGET_PPC64) */ /* TLB management */ -void helper_tlbia (void) +void helper_tlbia(void) { ppc_tlb_invalidate_all(env); } -void helper_tlbie (target_ulong addr) +void helper_tlbie(target_ulong addr) { ppc_tlb_invalidate_one(env, addr); } /* Software driven TLBs management */ /* PowerPC 602/603 software TLB load instructions helpers */ -static void do_6xx_tlb (target_ulong new_EPN, int is_code) +static void do_6xx_tlb(target_ulong new_EPN, int is_code) { target_ulong RPN, CMP, EPN; int way; @@ -3831,18 +4017,18 @@ static void do_6xx_tlb (target_ulong new_EPN, int is_code) way, is_code, CMP, RPN); } -void helper_6xx_tlbd (target_ulong EPN) +void helper_6xx_tlbd(target_ulong EPN) { do_6xx_tlb(EPN, 0); } -void helper_6xx_tlbi (target_ulong EPN) +void helper_6xx_tlbi(target_ulong EPN) { do_6xx_tlb(EPN, 1); } /* PowerPC 74xx software TLB load instructions helpers */ -static void do_74xx_tlb (target_ulong new_EPN, int is_code) +static void do_74xx_tlb(target_ulong new_EPN, int is_code) { target_ulong RPN, CMP, EPN; int way; @@ -3860,12 +4046,12 @@ static void do_74xx_tlb (target_ulong new_EPN, int is_code) way, is_code, CMP, RPN); } -void helper_74xx_tlbd (target_ulong EPN) +void helper_74xx_tlbd(target_ulong EPN) { do_74xx_tlb(EPN, 0); } -void helper_74xx_tlbi (target_ulong EPN) +void helper_74xx_tlbi(target_ulong EPN) { do_74xx_tlb(EPN, 1); } @@ -3913,7 +4099,7 @@ static inline int booke_page_size_to_tlb(target_ulong page_size) case 0x40000000UL: size = 0xA; break; -#if defined (TARGET_PPC64) +#if defined(TARGET_PPC64) case 0x000100000000ULL: size = 0xB; break; @@ -3954,7 +4140,7 @@ static inline int booke_page_size_to_tlb(target_ulong page_size) #define PPC4XX_TLBLO_ATTR_MASK 0x000000FF #define PPC4XX_TLBLO_RPN_MASK 0xFFFFFC00 -target_ulong helper_4xx_tlbre_hi (target_ulong entry) +target_ulong helper_4xx_tlbre_hi(target_ulong entry) { ppcemb_tlb_t *tlb; target_ulong ret; @@ -3975,7 +4161,7 @@ target_ulong helper_4xx_tlbre_hi (target_ulong entry) return ret; } -target_ulong helper_4xx_tlbre_lo (target_ulong entry) +target_ulong helper_4xx_tlbre_lo(target_ulong entry) { ppcemb_tlb_t *tlb; target_ulong ret; @@ -3992,7 +4178,7 @@ target_ulong helper_4xx_tlbre_lo (target_ulong entry) return ret; } -void helper_4xx_tlbwe_hi (target_ulong entry, target_ulong val) +void helper_4xx_tlbwe_hi(target_ulong entry, target_ulong val) { ppcemb_tlb_t *tlb; target_ulong page, end; @@ -4051,7 +4237,7 @@ void helper_4xx_tlbwe_hi (target_ulong entry, target_ulong val) } } -void helper_4xx_tlbwe_lo (target_ulong entry, target_ulong val) +void helper_4xx_tlbwe_lo(target_ulong entry, target_ulong val) { ppcemb_tlb_t *tlb; @@ -4077,13 +4263,13 @@ void helper_4xx_tlbwe_lo (target_ulong entry, target_ulong val) tlb->prot & PAGE_VALID ? 'v' : '-', (int)tlb->PID); } -target_ulong helper_4xx_tlbsx (target_ulong address) +target_ulong helper_4xx_tlbsx(target_ulong address) { return ppcemb_tlb_search(env, address, env->spr[SPR_40x_PID]); } /* PowerPC 440 TLB management */ -void helper_440_tlbwe (uint32_t word, target_ulong entry, target_ulong value) +void helper_440_tlbwe(uint32_t word, target_ulong entry, target_ulong value) { ppcemb_tlb_t *tlb; target_ulong EPN, RPN, size; @@ -4099,12 +4285,14 @@ void helper_440_tlbwe (uint32_t word, target_ulong entry, target_ulong value) /* Just here to please gcc */ case 0: EPN = value & 0xFFFFFC00; - if ((tlb->prot & PAGE_VALID) && EPN != tlb->EPN) + if ((tlb->prot & PAGE_VALID) && EPN != tlb->EPN) { do_flush_tlbs = 1; + } tlb->EPN = EPN; size = booke_tlb_to_page_size((value >> 4) & 0xF); - if ((tlb->prot & PAGE_VALID) && tlb->size < size) + if ((tlb->prot & PAGE_VALID) && tlb->size < size) { do_flush_tlbs = 1; + } tlb->size = size; tlb->attr &= ~0x1; tlb->attr |= (value >> 8) & 1; @@ -4117,35 +4305,43 @@ void helper_440_tlbwe (uint32_t word, target_ulong entry, target_ulong value) } } tlb->PID = env->spr[SPR_440_MMUCR] & 0x000000FF; - if (do_flush_tlbs) + if (do_flush_tlbs) { tlb_flush(env, 1); + } break; case 1: RPN = value & 0xFFFFFC0F; - if ((tlb->prot & PAGE_VALID) && tlb->RPN != RPN) + if ((tlb->prot & PAGE_VALID) && tlb->RPN != RPN) { tlb_flush(env, 1); + } tlb->RPN = RPN; break; case 2: tlb->attr = (tlb->attr & 0x1) | (value & 0x0000FF00); tlb->prot = tlb->prot & PAGE_VALID; - if (value & 0x1) + if (value & 0x1) { tlb->prot |= PAGE_READ << 4; - if (value & 0x2) + } + if (value & 0x2) { tlb->prot |= PAGE_WRITE << 4; - if (value & 0x4) + } + if (value & 0x4) { tlb->prot |= PAGE_EXEC << 4; - if (value & 0x8) + } + if (value & 0x8) { tlb->prot |= PAGE_READ; - if (value & 0x10) + } + if (value & 0x10) { tlb->prot |= PAGE_WRITE; - if (value & 0x20) + } + if (value & 0x20) { tlb->prot |= PAGE_EXEC; + } break; } } -target_ulong helper_440_tlbre (uint32_t word, target_ulong entry) +target_ulong helper_440_tlbre(uint32_t word, target_ulong entry) { ppcemb_tlb_t *tlb; target_ulong ret; @@ -4159,13 +4355,16 @@ target_ulong helper_440_tlbre (uint32_t word, target_ulong entry) case 0: ret = tlb->EPN; size = booke_page_size_to_tlb(tlb->size); - if (size < 0 || size > 0xF) + if (size < 0 || size > 0xF) { size = 1; + } ret |= size << 4; - if (tlb->attr & 0x1) + if (tlb->attr & 0x1) { ret |= 0x100; - if (tlb->prot & PAGE_VALID) + } + if (tlb->prot & PAGE_VALID) { ret |= 0x200; + } env->spr[SPR_440_MMUCR] &= ~0x000000FF; env->spr[SPR_440_MMUCR] |= tlb->PID; break; @@ -4174,24 +4373,30 @@ target_ulong helper_440_tlbre (uint32_t word, target_ulong entry) break; case 2: ret = tlb->attr & ~0x1; - if (tlb->prot & (PAGE_READ << 4)) + if (tlb->prot & (PAGE_READ << 4)) { ret |= 0x1; - if (tlb->prot & (PAGE_WRITE << 4)) + } + if (tlb->prot & (PAGE_WRITE << 4)) { ret |= 0x2; - if (tlb->prot & (PAGE_EXEC << 4)) + } + if (tlb->prot & (PAGE_EXEC << 4)) { ret |= 0x4; - if (tlb->prot & PAGE_READ) + } + if (tlb->prot & PAGE_READ) { ret |= 0x8; - if (tlb->prot & PAGE_WRITE) + } + if (tlb->prot & PAGE_WRITE) { ret |= 0x10; - if (tlb->prot & PAGE_EXEC) + } + if (tlb->prot & PAGE_EXEC) { ret |= 0x20; + } break; } return ret; } -target_ulong helper_440_tlbsx (target_ulong address) +target_ulong helper_440_tlbsx(target_ulong address) { return ppcemb_tlb_search(env, address, env->spr[SPR_440_MMUCR] & 0xFF); } @@ -4247,7 +4452,7 @@ void helper_booke206_tlbwe(void) } if (((env->spr[SPR_BOOKE_MAS0] & MAS0_ATSEL) == MAS0_ATSEL_LRAT) && - !msr_gs) { + !msr_gs) { /* XXX we don't support direct LRAT setting yet */ fprintf(stderr, "cpu: don't support LRAT setting yet\n"); return; @@ -4278,7 +4483,7 @@ void helper_booke206_tlbwe(void) cpu_abort(env, "missing HV implementation\n"); } tlb->mas7_3 = ((uint64_t)env->spr[SPR_BOOKE_MAS7] << 32) | - env->spr[SPR_BOOKE_MAS3]; + env->spr[SPR_BOOKE_MAS3]; tlb->mas1 = env->spr[SPR_BOOKE_MAS1]; /* MAV 1.0 only */ @@ -4376,7 +4581,7 @@ void helper_booke206_tlbsx(target_ulong address) } env->spr[SPR_BOOKE_MAS1] |= (env->spr[SPR_BOOKE_MAS6] >> 16) - << MAS1_TID_SHIFT; + << MAS1_TID_SHIFT; /* next victim logic */ env->spr[SPR_BOOKE_MAS0] |= env->last_way << MAS0_ESEL_SHIFT; |