diff options
Diffstat (limited to 'target-ppc/helper.c')
-rw-r--r-- | target-ppc/helper.c | 328 |
1 files changed, 105 insertions, 223 deletions
diff --git a/target-ppc/helper.c b/target-ppc/helper.c index 0b5cd3ed4b..60e09e3e5e 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -39,6 +39,58 @@ //#define DEBUG_EXCEPTIONS //#define FLUSH_ALL_TLBS +#ifdef DEBUG_MMU +# define LOG_MMU(...) do { \ + if (loglevel) \ + fprintf(logfile, ## __VA_ARGS__); \ + } while (0) +# define LOG_MMU_STATE(env) do { \ + if (loglevel) \ + cpu_dump_state(env, logfile, fprintf, 0); \ + } while (0) +#else +# define LOG_MMU(...) do { } while (0) +# define LOG_MMU_STATE(...) do { } while (0) +#endif + + +#ifdef DEBUG_SOFTWARE_TLB +# define LOG_SWTLB(...) do { \ + if (loglevel) \ + fprintf(logfile, ## __VA_ARGS__); \ + } while (0) +#else +# define LOG_SWTLB(...) do { } while (0) +#endif + +#ifdef DEBUG_BATS +# define LOG_BATS(...) do { \ + if (loglevel) \ + fprintf(logfile, ## __VA_ARGS__); \ + } while (0) +#else +# define LOG_BATS(...) do { } while (0) +#endif + +#ifdef DEBUG_SLB +# define LOG_SLB(...) do { \ + if (loglevel) \ + fprintf(logfile, ## __VA_ARGS__); \ + } while (0) +#else +# define LOG_SLB(...) do { } while (0) +#endif + +#ifdef DEBUG_EXCEPTIONS +# define LOG_EXCP(...) do { \ + if (loglevel) \ + fprintf(logfile, ## __VA_ARGS__); \ + } while (0) +#else +# define LOG_EXCP(...) do { } while (0) +#endif + + /*****************************************************************************/ /* PowerPC MMU emulation */ @@ -218,16 +270,10 @@ static always_inline int _pte_check (mmu_ctx_t *ctx, int is_64b, ret = check_prot(ctx->prot, rw, type); if (ret == 0) { /* Access granted */ -#if defined (DEBUG_MMU) - if (loglevel != 0) - fprintf(logfile, "PTE access granted !\n"); -#endif + LOG_MMU("PTE access granted !\n"); } else { /* Access right violation */ -#if defined (DEBUG_MMU) - if (loglevel != 0) - fprintf(logfile, "PTE access rejected\n"); -#endif + LOG_MMU("PTE access rejected\n"); } } } @@ -298,11 +344,7 @@ static always_inline void ppc6xx_tlb_invalidate_all (CPUState *env) ppc6xx_tlb_t *tlb; int nr, max; -#if defined (DEBUG_SOFTWARE_TLB) && 0 - if (loglevel != 0) { - fprintf(logfile, "Invalidate all TLBs\n"); - } -#endif + //LOG_SWTLB("Invalidate all TLBs\n"); /* Invalidate all defined software TLB */ max = env->nb_tlb; if (env->id_tlbs == 1) @@ -328,12 +370,8 @@ static always_inline void __ppc6xx_tlb_invalidate_virt (CPUState *env, nr = ppc6xx_tlb_getnum(env, eaddr, way, is_code); tlb = &env->tlb[nr].tlb6; if (pte_is_valid(tlb->pte0) && (match_epn == 0 || eaddr == tlb->EPN)) { -#if defined (DEBUG_SOFTWARE_TLB) - if (loglevel != 0) { - fprintf(logfile, "TLB invalidate %d/%d " ADDRX "\n", + LOG_SWTLB("TLB invalidate %d/%d " ADDRX "\n", nr, env->nb_tlb, eaddr); - } -#endif pte_invalidate(&tlb->pte0); tlb_flush_page(env, tlb->EPN); } @@ -359,12 +397,8 @@ void ppc6xx_tlb_store (CPUState *env, target_ulong EPN, int way, int is_code, nr = ppc6xx_tlb_getnum(env, EPN, way, is_code); tlb = &env->tlb[nr].tlb6; -#if defined (DEBUG_SOFTWARE_TLB) - if (loglevel != 0) { - fprintf(logfile, "Set TLB %d/%d EPN " ADDRX " PTE0 " ADDRX + LOG_SWTLB("Set TLB %d/%d EPN " ADDRX " PTE0 " ADDRX " PTE1 " ADDRX "\n", nr, env->nb_tlb, EPN, pte0, pte1); - } -#endif /* Invalidate any pending reference in Qemu for this virtual address */ __ppc6xx_tlb_invalidate_virt(env, EPN, is_code, 1); tlb->pte0 = pte0; @@ -390,27 +424,19 @@ static always_inline int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx, tlb = &env->tlb[nr].tlb6; /* This test "emulates" the PTE index match for hardware TLBs */ if ((eaddr & TARGET_PAGE_MASK) != tlb->EPN) { -#if defined (DEBUG_SOFTWARE_TLB) - if (loglevel != 0) { - fprintf(logfile, "TLB %d/%d %s [" ADDRX " " ADDRX + LOG_SWTLB("TLB %d/%d %s [" ADDRX " " ADDRX "] <> " ADDRX "\n", nr, env->nb_tlb, pte_is_valid(tlb->pte0) ? "valid" : "inval", tlb->EPN, tlb->EPN + TARGET_PAGE_SIZE, eaddr); - } -#endif continue; } -#if defined (DEBUG_SOFTWARE_TLB) - if (loglevel != 0) { - fprintf(logfile, "TLB %d/%d %s " ADDRX " <> " ADDRX " " ADDRX + LOG_SWTLB("TLB %d/%d %s " ADDRX " <> " ADDRX " " ADDRX " %c %c\n", nr, env->nb_tlb, pte_is_valid(tlb->pte0) ? "valid" : "inval", tlb->EPN, eaddr, tlb->pte1, rw ? 'S' : 'L', access_type == ACCESS_CODE ? 'I' : 'D'); - } -#endif switch (pte32_check(ctx, tlb->pte0, tlb->pte1, 0, rw, access_type)) { case -3: /* TLB inconsistency */ @@ -437,12 +463,8 @@ static always_inline int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx, } if (best != -1) { done: -#if defined (DEBUG_SOFTWARE_TLB) - if (loglevel != 0) { - fprintf(logfile, "found TLB at addr " PADDRX " prot=%01x ret=%d\n", + LOG_SWTLB("found TLB at addr " PADDRX " prot=%01x ret=%d\n", ctx->raddr & TARGET_PAGE_MASK, ctx->prot, ret); - } -#endif /* Update page flags */ pte_update_flags(ctx, &env->tlb[best].tlb6.pte1, ret, rw); } @@ -485,12 +507,8 @@ static always_inline void bat_601_size_prot (CPUState *env,target_ulong *blp, int key, pp, valid, prot; bl = (*BATl & 0x0000003F) << 17; -#if defined (DEBUG_BATS) - if (loglevel != 0) { - fprintf(logfile, "b %02x ==> bl " ADDRX " msk " ADDRX "\n", + LOG_BATS("b %02x ==> bl " ADDRX " msk " ADDRX "\n", (uint8_t)(*BATl & 0x0000003F), bl, ~bl); - } -#endif prot = 0; valid = (*BATl >> 6) & 1; if (valid) { @@ -514,12 +532,8 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx, int i, valid, prot; int ret = -1; -#if defined (DEBUG_BATS) - if (loglevel != 0) { - fprintf(logfile, "%s: %cBAT v " ADDRX "\n", __func__, + LOG_BATS("%s: %cBAT v " ADDRX "\n", __func__, type == ACCESS_CODE ? 'I' : 'D', virtual); - } -#endif switch (type) { case ACCESS_CODE: BATlt = env->IBAT[1]; @@ -541,13 +555,9 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx, } else { bat_size_prot(env, &bl, &valid, &prot, BATu, BATl); } -#if defined (DEBUG_BATS) - if (loglevel != 0) { - fprintf(logfile, "%s: %cBAT%d v " ADDRX " BATu " ADDRX + LOG_BATS("%s: %cBAT%d v " ADDRX " BATu " ADDRX " BATl " ADDRX "\n", __func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual, *BATu, *BATl); - } -#endif if ((virtual & 0xF0000000) == BEPIu && ((virtual & 0x0FFE0000) & ~bl) == BEPIl) { /* BAT matches */ @@ -559,28 +569,25 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx, /* Compute access rights */ ctx->prot = prot; ret = check_prot(ctx->prot, rw, type); -#if defined (DEBUG_BATS) - if (ret == 0 && loglevel != 0) { - fprintf(logfile, "BAT %d match: r " PADDRX " prot=%c%c\n", - i, ctx->raddr, ctx->prot & PAGE_READ ? 'R' : '-', - ctx->prot & PAGE_WRITE ? 'W' : '-'); - } -#endif + if (ret == 0) + LOG_BATS("BAT %d match: r " PADDRX " prot=%c%c\n", + i, ctx->raddr, ctx->prot & PAGE_READ ? 'R' : '-', + ctx->prot & PAGE_WRITE ? 'W' : '-'); break; } } } if (ret < 0) { -#if defined (DEBUG_BATS) - if (loglevel != 0) { - fprintf(logfile, "no BAT match for " ADDRX ":\n", virtual); +#if defined(DEBUG_BATS) + if (IS_LOGGING) { + QEMU_LOG0("no BAT match for " ADDRX ":\n", virtual); for (i = 0; i < 4; i++) { BATu = &BATut[i]; BATl = &BATlt[i]; BEPIu = *BATu & 0xF0000000; BEPIl = *BATu & 0x0FFE0000; bl = (*BATu & 0x00001FFC) << 15; - fprintf(logfile, "%s: %cBAT%d v " ADDRX " BATu " ADDRX + QEMU_LOG0("%s: %cBAT%d v " ADDRX " BATu " ADDRX " BATl " ADDRX " \n\t" ADDRX " " ADDRX " " ADDRX "\n", __func__, type == ACCESS_CODE ? 'I' : 'D', i, virtual, *BATu, *BATl, BEPIu, BEPIl, bl); @@ -588,7 +595,6 @@ static always_inline int get_bat (CPUState *env, mmu_ctx_t *ctx, } #endif } - /* No hit */ return ret; } @@ -609,30 +615,22 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h, pte0 = ldq_phys(base + (i * 16)); pte1 = ldq_phys(base + (i * 16) + 8); r = pte64_check(ctx, pte0, pte1, h, rw, type); -#if defined (DEBUG_MMU) - if (loglevel != 0) { - fprintf(logfile, "Load pte from " ADDRX " => " ADDRX " " ADDRX + LOG_MMU("Load pte from " ADDRX " => " ADDRX " " ADDRX " %d %d %d " ADDRX "\n", base + (i * 16), pte0, pte1, (int)(pte0 & 1), h, (int)((pte0 >> 1) & 1), ctx->ptem); - } -#endif } else #endif { pte0 = ldl_phys(base + (i * 8)); pte1 = ldl_phys(base + (i * 8) + 4); r = pte32_check(ctx, pte0, pte1, h, rw, type); -#if defined (DEBUG_MMU) - if (loglevel != 0) { - fprintf(logfile, "Load pte from " ADDRX " => " ADDRX " " ADDRX + LOG_MMU("Load pte from " ADDRX " => " ADDRX " " ADDRX " %d %d %d " ADDRX "\n", base + (i * 8), pte0, pte1, (int)(pte0 >> 31), h, (int)((pte0 >> 6) & 1), ctx->ptem); - } -#endif } switch (r) { case -3: @@ -660,12 +658,8 @@ static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h, } if (good != -1) { done: -#if defined (DEBUG_MMU) - if (loglevel != 0) { - fprintf(logfile, "found PTE at addr " PADDRX " prot=%01x ret=%d\n", + LOG_MMU("found PTE at addr " PADDRX " prot=%01x ret=%d\n", ctx->raddr, ctx->prot, ret); - } -#endif /* Update page flags */ pte1 = ctx->raddr; if (pte_update_flags(ctx, &pte1, ret, rw) == 1) { @@ -729,22 +723,14 @@ static always_inline int slb_lookup (CPUPPCState *env, target_ulong eaddr, ret = -5; sr_base = env->spr[SPR_ASR]; -#if defined(DEBUG_SLB) - if (loglevel != 0) { - fprintf(logfile, "%s: eaddr " ADDRX " base " PADDRX "\n", + LOG_SLB("%s: eaddr " ADDRX " base " PADDRX "\n", __func__, eaddr, sr_base); - } -#endif mask = 0x0000000000000000ULL; /* Avoid gcc warning */ for (n = 0; n < env->slb_nr; n++) { tmp64 = ldq_phys(sr_base); tmp = ldl_phys(sr_base + 8); -#if defined(DEBUG_SLB) - if (loglevel != 0) { - fprintf(logfile, "%s: seg %d " PADDRX " %016" PRIx64 " %08" + LOG_SLB("%s: seg %d " PADDRX " %016" PRIx64 " %08" PRIx32 "\n", __func__, n, sr_base, tmp64, tmp); - } -#endif if (slb_is_valid(tmp64)) { /* SLB entry is valid */ switch (tmp64 & 0x0000000006000000ULL) { @@ -848,12 +834,8 @@ target_ulong ppc_load_slb (CPUPPCState *env, int slb_nr) } else { rt = 0; } -#if defined(DEBUG_SLB) - if (loglevel != 0) { - fprintf(logfile, "%s: " PADDRX " %016" PRIx64 " %08" PRIx32 " => %d " + LOG_SLB("%s: " PADDRX " %016" PRIx64 " %08" PRIx32 " => %d " ADDRX "\n", __func__, sr_base, tmp64, tmp, slb_nr, rt); - } -#endif return rt; } @@ -875,13 +857,9 @@ void ppc_store_slb (CPUPPCState *env, int slb_nr, target_ulong rs) tmp64 |= 1 << 27; /* Set ESID */ tmp64 |= (uint32_t)slb_nr << 28; -#if defined(DEBUG_SLB) - if (loglevel != 0) { - fprintf(logfile, "%s: %d " ADDRX " => " PADDRX " %016" PRIx64 + LOG_SLB("%s: %d " ADDRX " => " PADDRX " %016" PRIx64 " %08" PRIx32 "\n", __func__, slb_nr, rs, sr_base, tmp64, tmp); - } -#endif /* Write SLB entry to memory */ stq_phys(sr_base, tmp64); stl_phys(sr_base + 8, tmp); @@ -911,11 +889,7 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, pr = msr_pr; #if defined(TARGET_PPC64) if (env->mmu_model & POWERPC_MMU_64) { -#if defined (DEBUG_MMU) - if (loglevel != 0) { - fprintf(logfile, "Check SLBs\n"); - } -#endif + LOG_MMU("Check SLBs\n"); ret = slb_lookup(env, eaddr, &vsid, &page_mask, &attr); if (ret < 0) return ret; @@ -941,22 +915,14 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, vsid_sh = 6; sdr_sh = 16; sdr_mask = 0xFFC0; -#if defined (DEBUG_MMU) - if (loglevel != 0) { - fprintf(logfile, "Check segment v=" ADDRX " %d " ADDRX + LOG_MMU("Check segment v=" ADDRX " %d " ADDRX " nip=" ADDRX " lr=" ADDRX " ir=%d dr=%d pr=%d %d t=%d\n", eaddr, (int)(eaddr >> 28), sr, env->nip, env->lr, (int)msr_ir, (int)msr_dr, pr != 0 ? 1 : 0, rw, type); - } -#endif } -#if defined (DEBUG_MMU) - if (loglevel != 0) { - fprintf(logfile, "pte segment: key=%d ds %d nx %d vsid " ADDRX "\n", + LOG_MMU("pte segment: key=%d ds %d nx %d vsid " ADDRX "\n", ctx->key, ds, ctx->nx, vsid); - } -#endif ret = -1; if (!ds) { /* Check if instruction fetch is allowed, if needed */ @@ -977,23 +943,15 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, hash = ((vsid ^ pgidx) << vsid_sh) & vsid_mask; } mask = (htab_mask << sdr_sh) | sdr_mask; -#if defined (DEBUG_MMU) - if (loglevel != 0) { - fprintf(logfile, "sdr " PADDRX " sh %d hash " PADDRX + LOG_MMU("sdr " PADDRX " sh %d hash " PADDRX " mask " PADDRX " " ADDRX "\n", sdr, sdr_sh, hash, mask, page_mask); - } -#endif ctx->pg_addr[0] = get_pgaddr(sdr, sdr_sh, hash, mask); /* Secondary table address */ hash = (~hash) & vsid_mask; -#if defined (DEBUG_MMU) - if (loglevel != 0) { - fprintf(logfile, "sdr " PADDRX " sh %d hash " PADDRX + LOG_MMU("sdr " PADDRX " sh %d hash " PADDRX " mask " PADDRX "\n", sdr, sdr_sh, hash, mask); - } -#endif ctx->pg_addr[1] = get_pgaddr(sdr, sdr_sh, hash, mask); #if defined(TARGET_PPC64) if (env->mmu_model & POWERPC_MMU_64) { @@ -1011,26 +969,19 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, /* Software TLB search */ ret = ppc6xx_tlb_check(env, ctx, eaddr, rw, type); } else { -#if defined (DEBUG_MMU) - if (loglevel != 0) { - fprintf(logfile, "0 sdr1=" PADDRX " vsid=" ADDRX " " + LOG_MMU("0 sdr1=" PADDRX " vsid=" ADDRX " " "api=" ADDRX " hash=" PADDRX " pg_addr=" PADDRX "\n", sdr, vsid, pgidx, hash, ctx->pg_addr[0]); - } -#endif /* Primary table lookup */ ret = find_pte(env, ctx, 0, rw, type); if (ret < 0) { /* Secondary table lookup */ -#if defined (DEBUG_MMU) - if (eaddr != 0xEFFFFFFF && loglevel != 0) { - fprintf(logfile, "1 sdr1=" PADDRX " vsid=" ADDRX " " + if (eaddr != 0xEFFFFFFF) + LOG_MMU("1 sdr1=" PADDRX " vsid=" ADDRX " " "api=" ADDRX " hash=" PADDRX " pg_addr=" PADDRX "\n", sdr, vsid, pgidx, hash, ctx->pg_addr[1]); - } -#endif ret2 = find_pte(env, ctx, 1, rw, type); if (ret2 != -1) ret = ret2; @@ -1056,17 +1007,11 @@ static always_inline int get_segment (CPUState *env, mmu_ctx_t *ctx, } #endif } else { -#if defined (DEBUG_MMU) - if (loglevel != 0) - fprintf(logfile, "No access allowed\n"); -#endif + LOG_MMU("No access allowed\n"); ret = -3; } } else { -#if defined (DEBUG_MMU) - if (loglevel != 0) - fprintf(logfile, "direct store...\n"); -#endif + LOG_MMU("direct store...\n"); /* Direct-store segment : absolutely *BUGGY* for now */ switch (type) { case ACCESS_INT: @@ -1124,13 +1069,9 @@ static always_inline int ppcemb_tlb_check (CPUState *env, ppcemb_tlb_t *tlb, return -1; } mask = ~(tlb->size - 1); -#if defined (DEBUG_SOFTWARE_TLB) - if (loglevel != 0) { - fprintf(logfile, "%s: TLB %d address " ADDRX " PID %u <=> " ADDRX + LOG_SWTLB("%s: TLB %d address " ADDRX " PID %u <=> " ADDRX " " ADDRX " %u\n", __func__, i, address, pid, tlb->EPN, mask, (uint32_t)tlb->PID); - } -#endif /* Check PID */ if (tlb->PID != 0 && tlb->PID != pid) return -1; @@ -1223,12 +1164,8 @@ static int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx, continue; zsel = (tlb->attr >> 4) & 0xF; zpr = (env->spr[SPR_40x_ZPR] >> (28 - (2 * zsel))) & 0x3; -#if defined (DEBUG_SOFTWARE_TLB) - if (loglevel != 0) { - fprintf(logfile, "%s: TLB %d zsel %d zpr %d rw %d attr %08x\n", + LOG_SWTLB("%s: TLB %d zsel %d zpr %d rw %d attr %08x\n", __func__, i, zsel, zpr, rw, tlb->attr); - } -#endif /* Check execute enable bit */ switch (zpr) { case 0x2: @@ -1258,23 +1195,15 @@ static int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx, } if (ret >= 0) { ctx->raddr = raddr; -#if defined (DEBUG_SOFTWARE_TLB) - if (loglevel != 0) { - fprintf(logfile, "%s: access granted " ADDRX " => " PADDRX + LOG_SWTLB("%s: access granted " ADDRX " => " PADDRX " %d %d\n", __func__, address, ctx->raddr, ctx->prot, ret); - } -#endif return 0; } } -#if defined (DEBUG_SOFTWARE_TLB) - if (loglevel != 0) { - fprintf(logfile, "%s: access refused " ADDRX " => " PADDRX + LOG_SWTLB("%s: access refused " ADDRX " => " PADDRX " %d %d\n", __func__, address, raddr, ctx->prot, ret); - } -#endif return ret; } @@ -1500,10 +1429,7 @@ int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw, ctx.raddr & TARGET_PAGE_MASK, ctx.prot, mmu_idx, is_softmmu); } else if (ret < 0) { -#if defined (DEBUG_MMU) - if (loglevel != 0) - cpu_dump_state(env, logfile, fprintf, 0); -#endif + LOG_MMU_STATE(env); if (access_type == ACCESS_CODE) { switch (ret) { case -1: @@ -1753,30 +1679,19 @@ static always_inline void do_invalidate_BAT (CPUPPCState *env, base = BATu & ~0x0001FFFF; end = base + mask + 0x00020000; -#if defined (DEBUG_BATS) - if (loglevel != 0) { - fprintf(logfile, "Flush BAT from " ADDRX " to " ADDRX " (" ADDRX ")\n", + LOG_BATS("Flush BAT from " ADDRX " to " ADDRX " (" ADDRX ")\n", base, end, mask); - } -#endif for (page = base; page != end; page += TARGET_PAGE_SIZE) tlb_flush_page(env, page); -#if defined (DEBUG_BATS) - if (loglevel != 0) - fprintf(logfile, "Flush done\n"); -#endif + LOG_BATS("Flush done\n"); } #endif static always_inline void dump_store_bat (CPUPPCState *env, char ID, int ul, int nr, target_ulong value) { -#if defined (DEBUG_BATS) - if (loglevel != 0) { - fprintf(logfile, "Set %cBAT%d%c to " ADDRX " (" ADDRX ")\n", + LOG_BATS("Set %cBAT%d%c to " ADDRX " (" ADDRX ")\n", ID, nr, ul == 0 ? 'u' : 'l', value, env->nip); - } -#endif } void ppc_store_ibatu (CPUPPCState *env, int nr, target_ulong value) @@ -2046,11 +1961,7 @@ void ppc_store_asr (CPUPPCState *env, target_ulong value) void ppc_store_sdr1 (CPUPPCState *env, target_ulong value) { -#if defined (DEBUG_MMU) - if (loglevel != 0) { - fprintf(logfile, "%s: " ADDRX "\n", __func__, value); - } -#endif + LOG_MMU("%s: " ADDRX "\n", __func__, value); if (env->sdr1 != value) { /* XXX: for PowerPC 64, should check that the HTABSIZE value * is <= 28 @@ -2062,12 +1973,8 @@ void ppc_store_sdr1 (CPUPPCState *env, target_ulong value) void ppc_store_sr (CPUPPCState *env, int srnum, target_ulong value) { -#if defined (DEBUG_MMU) - if (loglevel != 0) { - fprintf(logfile, "%s: reg=%d " ADDRX " " ADDRX "\n", + LOG_MMU("%s: reg=%d " ADDRX " " ADDRX "\n", __func__, srnum, value, env->sr[srnum]); - } -#endif if (env->sr[srnum] != value) { env->sr[srnum] = value; #if !defined(FLUSH_ALL_TLBS) && 0 @@ -2205,23 +2112,15 @@ static always_inline void powerpc_excp (CPUState *env, } goto store_next; case POWERPC_EXCP_DSI: /* Data storage exception */ -#if defined (DEBUG_EXCEPTIONS) - if (loglevel != 0) { - fprintf(logfile, "DSI exception: DSISR=" ADDRX" DAR=" ADDRX "\n", + LOG_EXCP("DSI exception: DSISR=" ADDRX" DAR=" ADDRX "\n", env->spr[SPR_DSISR], env->spr[SPR_DAR]); - } -#endif new_msr &= ~((target_ulong)1 << MSR_RI); if (lpes1 == 0) new_msr |= (target_ulong)MSR_HVB; goto store_next; case POWERPC_EXCP_ISI: /* Instruction storage exception */ -#if defined (DEBUG_EXCEPTIONS) - if (loglevel != 0) { - fprintf(logfile, "ISI exception: msr=" ADDRX ", nip=" ADDRX "\n", + LOG_EXCP("ISI exception: msr=" ADDRX ", nip=" ADDRX "\n", msr, env->nip); - } -#endif new_msr &= ~((target_ulong)1 << MSR_RI); if (lpes1 == 0) new_msr |= (target_ulong)MSR_HVB; @@ -2244,11 +2143,7 @@ static always_inline void powerpc_excp (CPUState *env, switch (env->error_code & ~0xF) { case POWERPC_EXCP_FP: if ((msr_fe0 == 0 && msr_fe1 == 0) || msr_fp == 0) { -#if defined (DEBUG_EXCEPTIONS) - if (loglevel != 0) { - fprintf(logfile, "Ignore floating point exception\n"); - } -#endif + LOG_EXCP("Ignore floating point exception\n"); env->exception_index = POWERPC_EXCP_NONE; env->error_code = 0; return; @@ -2262,12 +2157,8 @@ static always_inline void powerpc_excp (CPUState *env, msr |= 0x00010000; break; case POWERPC_EXCP_INVAL: -#if defined (DEBUG_EXCEPTIONS) - if (loglevel != 0) { - fprintf(logfile, "Invalid instruction at " ADDRX "\n", + LOG_EXCP("Invalid instruction at " ADDRX "\n", env->nip); - } -#endif new_msr &= ~((target_ulong)1 << MSR_RI); if (lpes1 == 0) new_msr |= (target_ulong)MSR_HVB; @@ -2327,17 +2218,11 @@ static always_inline void powerpc_excp (CPUState *env, goto store_next; case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */ /* FIT on 4xx */ -#if defined (DEBUG_EXCEPTIONS) - if (loglevel != 0) - fprintf(logfile, "FIT exception\n"); -#endif + LOG_EXCP("FIT exception\n"); new_msr &= ~((target_ulong)1 << MSR_RI); /* XXX: check this */ goto store_next; case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */ -#if defined (DEBUG_EXCEPTIONS) - if (loglevel != 0) - fprintf(logfile, "WDT exception\n"); -#endif + LOG_EXCP("WDT exception\n"); switch (excp_model) { case POWERPC_EXCP_BOOKE: srr0 = SPR_BOOKE_CSRR0; @@ -2458,10 +2343,7 @@ static always_inline void powerpc_excp (CPUState *env, new_msr |= (target_ulong)MSR_HVB; goto store_current; case POWERPC_EXCP_PIT: /* Programmable interval timer interrupt */ -#if defined (DEBUG_EXCEPTIONS) - if (loglevel != 0) - fprintf(logfile, "PIT exception\n"); -#endif + LOG_EXCP("PIT exception\n"); new_msr &= ~((target_ulong)1 << MSR_RI); /* XXX: check this */ goto store_next; case POWERPC_EXCP_IO: /* IO error exception */ |