diff options
Diffstat (limited to 'target-ppc/cpu.h')
| -rw-r--r-- | target-ppc/cpu.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index ce3c7903fb..fef8651626 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1466,15 +1466,21 @@ static inline int cpu_mmu_index (CPUPPCState *env) #define SPR_PERF3 (0x303) #define SPR_RCPU_MI_RBA3 (0x303) #define SPR_MPC_MI_EPN (0x303) +#define SPR_POWER_UPMC1 (0x303) #define SPR_PERF4 (0x304) +#define SPR_POWER_UPMC2 (0x304) #define SPR_PERF5 (0x305) #define SPR_MPC_MI_TWC (0x305) +#define SPR_POWER_UPMC3 (0x305) #define SPR_PERF6 (0x306) #define SPR_MPC_MI_RPN (0x306) +#define SPR_POWER_UPMC4 (0x306) #define SPR_PERF7 (0x307) +#define SPR_POWER_UPMC5 (0x307) #define SPR_PERF8 (0x308) #define SPR_RCPU_L2U_RBA0 (0x308) #define SPR_MPC_MD_CTR (0x308) +#define SPR_POWER_UPMC6 (0x308) #define SPR_PERF9 (0x309) #define SPR_RCPU_L2U_RBA1 (0x309) #define SPR_MPC_MD_CASID (0x309) @@ -1484,29 +1490,43 @@ static inline int cpu_mmu_index (CPUPPCState *env) #define SPR_PERFB (0x30B) #define SPR_RCPU_L2U_RBA3 (0x30B) #define SPR_MPC_MD_EPN (0x30B) +#define SPR_POWER_UMMCR0 (0X30B) #define SPR_PERFC (0x30C) #define SPR_MPC_MD_TWB (0x30C) +#define SPR_POWER_USIAR (0X30C) #define SPR_PERFD (0x30D) #define SPR_MPC_MD_TWC (0x30D) +#define SPR_POWER_USDAR (0X30D) #define SPR_PERFE (0x30E) #define SPR_MPC_MD_RPN (0x30E) +#define SPR_POWER_UMMCR1 (0X30E) #define SPR_PERFF (0x30F) #define SPR_MPC_MD_TW (0x30F) #define SPR_UPERF0 (0x310) #define SPR_UPERF1 (0x311) #define SPR_UPERF2 (0x312) #define SPR_UPERF3 (0x313) +#define SPR_POWER_PMC1 (0X313) #define SPR_UPERF4 (0x314) +#define SPR_POWER_PMC2 (0X314) #define SPR_UPERF5 (0x315) +#define SPR_POWER_PMC3 (0X315) #define SPR_UPERF6 (0x316) +#define SPR_POWER_PMC4 (0X316) #define SPR_UPERF7 (0x317) +#define SPR_POWER_PMC5 (0X317) #define SPR_UPERF8 (0x318) +#define SPR_POWER_PMC6 (0X318) #define SPR_UPERF9 (0x319) #define SPR_UPERFA (0x31A) #define SPR_UPERFB (0x31B) +#define SPR_POWER_MMCR0 (0X31B) #define SPR_UPERFC (0x31C) +#define SPR_POWER_SIAR (0X31C) #define SPR_UPERFD (0x31D) +#define SPR_POWER_SDAR (0X31D) #define SPR_UPERFE (0x31E) +#define SPR_POWER_MMCR1 (0X31E) #define SPR_UPERFF (0x31F) #define SPR_RCPU_MI_RA0 (0x320) #define SPR_MPC_MI_DBCAM (0x320) |