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-rw-r--r--target-openrisc/cpu.h6
-rw-r--r--target-openrisc/helper.h4
-rw-r--r--target-openrisc/interrupt.c2
-rw-r--r--target-openrisc/mmu.c2
-rw-r--r--target-openrisc/mmu_helper.c10
-rw-r--r--target-openrisc/translate.c4
6 files changed, 14 insertions, 14 deletions
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h
index c7b1750153..8dc56c2873 100644
--- a/target-openrisc/cpu.h
+++ b/target-openrisc/cpu.h
@@ -30,7 +30,7 @@ struct OpenRISCCPU;
#include "config.h"
#include "qemu-common.h"
-#include "cpu-defs.h"
+#include "exec/cpu-defs.h"
#include "softfloat.h"
#include "qemu/cpu.h"
#include "qapi/error.h"
@@ -398,7 +398,7 @@ static inline void cpu_clone_regs(CPUOpenRISCState *env, target_ulong newsp)
}
#endif
-#include "cpu-all.h"
+#include "exec/cpu-all.h"
static inline void cpu_get_tb_cpu_state(CPUOpenRISCState *env,
target_ulong *pc,
@@ -427,7 +427,7 @@ static inline bool cpu_has_work(CPUState *cpu)
CPU_INTERRUPT_TIMER);
}
-#include "exec-all.h"
+#include "exec/exec-all.h"
static inline target_ulong cpu_get_pc(CPUOpenRISCState *env)
{
diff --git a/target-openrisc/helper.h b/target-openrisc/helper.h
index 404d46447f..2af97901ce 100644
--- a/target-openrisc/helper.h
+++ b/target-openrisc/helper.h
@@ -17,7 +17,7 @@
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/
-#include "def-helper.h"
+#include "exec/def-helper.h"
/* exception */
DEF_HELPER_FLAGS_2(exception, 0, void, env, i32)
@@ -67,4 +67,4 @@ DEF_HELPER_FLAGS_1(rfe, 0, void, env)
DEF_HELPER_FLAGS_4(mtspr, 0, void, env, tl, tl, tl)
DEF_HELPER_FLAGS_4(mfspr, 0, tl, env, tl, tl, tl)
-#include "def-helper.h"
+#include "exec/def-helper.h"
diff --git a/target-openrisc/interrupt.c b/target-openrisc/interrupt.c
index 642da7de49..226ce43513 100644
--- a/target-openrisc/interrupt.c
+++ b/target-openrisc/interrupt.c
@@ -19,7 +19,7 @@
#include "cpu.h"
#include "qemu-common.h"
-#include "gdbstub.h"
+#include "exec/gdbstub.h"
#include "host-utils.h"
#ifndef CONFIG_USER_ONLY
#include "hw/loader.h"
diff --git a/target-openrisc/mmu.c b/target-openrisc/mmu.c
index f2a6523cfb..4eee44434f 100644
--- a/target-openrisc/mmu.c
+++ b/target-openrisc/mmu.c
@@ -20,7 +20,7 @@
#include "cpu.h"
#include "qemu-common.h"
-#include "gdbstub.h"
+#include "exec/gdbstub.h"
#include "host-utils.h"
#ifndef CONFIG_USER_ONLY
#include "hw/loader.h"
diff --git a/target-openrisc/mmu_helper.c b/target-openrisc/mmu_helper.c
index d2edebcb49..e46b092984 100644
--- a/target-openrisc/mmu_helper.c
+++ b/target-openrisc/mmu_helper.c
@@ -21,20 +21,20 @@
#include "cpu.h"
#ifndef CONFIG_USER_ONLY
-#include "softmmu_exec.h"
+#include "exec/softmmu_exec.h"
#define MMUSUFFIX _mmu
#define SHIFT 0
-#include "softmmu_template.h"
+#include "exec/softmmu_template.h"
#define SHIFT 1
-#include "softmmu_template.h"
+#include "exec/softmmu_template.h"
#define SHIFT 2
-#include "softmmu_template.h"
+#include "exec/softmmu_template.h"
#define SHIFT 3
-#include "softmmu_template.h"
+#include "exec/softmmu_template.h"
void tlb_fill(CPUOpenRISCState *env, target_ulong addr, int is_write,
int mmu_idx, uintptr_t retaddr)
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index 2cb9d69826..5883347fa7 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -19,7 +19,7 @@
*/
#include "cpu.h"
-#include "exec-all.h"
+#include "exec/exec-all.h"
#include "disas/disas.h"
#include "tcg-op.h"
#include "qemu-common.h"
@@ -61,7 +61,7 @@ static TCGv_i32 fpcsr;
static TCGv machi, maclo;
static TCGv fpmaddhi, fpmaddlo;
static TCGv_i32 env_flags;
-#include "gen-icount.h"
+#include "exec/gen-icount.h"
void openrisc_translate_init(void)
{