diff options
Diffstat (limited to 'target-mips')
| -rw-r--r-- | target-mips/cpu.c | 4 | ||||
| -rw-r--r-- | target-mips/cpu.h | 5 | ||||
| -rw-r--r-- | target-mips/helper.c | 15 | ||||
| -rw-r--r-- | target-mips/op_helper.c | 3 |
4 files changed, 16 insertions, 11 deletions
diff --git a/target-mips/cpu.c b/target-mips/cpu.c index 0a2dc46144..8c304ac832 100644 --- a/target-mips/cpu.c +++ b/target-mips/cpu.c @@ -133,7 +133,9 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) cc->synchronize_from_tb = mips_cpu_synchronize_from_tb; cc->gdb_read_register = mips_cpu_gdb_read_register; cc->gdb_write_register = mips_cpu_gdb_write_register; -#ifndef CONFIG_USER_ONLY +#ifdef CONFIG_USER_ONLY + cc->handle_mmu_fault = mips_cpu_handle_mmu_fault; +#else cc->do_unassigned_access = mips_cpu_unassigned_access; cc->get_phys_page_debug = mips_cpu_get_phys_page_debug; #endif diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 6981e7a109..a1d85efea1 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -666,9 +666,8 @@ void cpu_mips_stop_count(CPUMIPSState *env); void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level); /* helper.c */ -int cpu_mips_handle_mmu_fault (CPUMIPSState *env, target_ulong address, int rw, - int mmu_idx); -#define cpu_handle_mmu_fault cpu_mips_handle_mmu_fault +int mips_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, + int mmu_idx); #if !defined(CONFIG_USER_ONLY) void r4k_invalidate_tlb (CPUMIPSState *env, int idx, int use_extra); hwaddr cpu_mips_translate_address (CPUMIPSState *env, target_ulong address, diff --git a/target-mips/helper.c b/target-mips/helper.c index 33e0e88637..d8e9166c2c 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -268,9 +268,11 @@ hwaddr mips_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) } #endif -int cpu_mips_handle_mmu_fault (CPUMIPSState *env, target_ulong address, int rw, - int mmu_idx) +int mips_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, + int mmu_idx) { + MIPSCPU *cpu = MIPS_CPU(cs); + CPUMIPSState *env = &cpu->env; #if !defined(CONFIG_USER_ONLY) hwaddr physical; int prot; @@ -279,9 +281,9 @@ int cpu_mips_handle_mmu_fault (CPUMIPSState *env, target_ulong address, int rw, int ret = 0; #if 0 - log_cpu_state(CPU(mips_env_get_cpu(env)), 0); + log_cpu_state(cs, 0); #endif - qemu_log("%s pc " TARGET_FMT_lx " ad " TARGET_FMT_lx " rw %d mmu_idx %d\n", + qemu_log("%s pc " TARGET_FMT_lx " ad %" VADDR_PRIx " rw %d mmu_idx %d\n", __func__, env->active_tc.PC, address, rw, mmu_idx); rw &= 1; @@ -293,8 +295,9 @@ int cpu_mips_handle_mmu_fault (CPUMIPSState *env, target_ulong address, int rw, access_type = ACCESS_INT; ret = get_physical_address(env, &physical, &prot, address, rw, access_type); - qemu_log("%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_plx " prot %d\n", - __func__, address, ret, physical, prot); + qemu_log("%s address=%" VADDR_PRIx " ret %d physical " TARGET_FMT_plx + " prot %d\n", + __func__, address, ret, physical, prot); if (ret == TLBRET_MATCH) { tlb_set_page(env, address & TARGET_PAGE_MASK, physical & TARGET_PAGE_MASK, prot | PAGE_EXEC, diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index 2ef6633f47..a62496cc3b 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -2146,9 +2146,10 @@ static void do_unaligned_access(CPUMIPSState *env, target_ulong addr, void tlb_fill(CPUMIPSState *env, target_ulong addr, int is_write, int mmu_idx, uintptr_t retaddr) { + MIPSCPU *cpu = mips_env_get_cpu(env); int ret; - ret = cpu_mips_handle_mmu_fault(env, addr, is_write, mmu_idx); + ret = mips_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx); if (ret) { do_raise_exception_err(env, env->exception_index, env->error_code, retaddr); |