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-rw-r--r--target-mips/mips-defs.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h
index 8b29e8b2d4..14043be272 100644
--- a/target-mips/mips-defs.h
+++ b/target-mips/mips-defs.h
@@ -19,4 +19,9 @@
#define TARGET_LONG_BITS 32
#endif
+/* Strictly follow the architecture standard: Disallow "special"
+ instruction handling for PMON/SPIM, force cycle-dependent
+ Count/Compare maintenance. */
+//#define MIPS_STRICT_STANDARD 1
+
#endif /* !defined (__QEMU_MIPS_DEFS_H__) */