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-rw-r--r--target-mips/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/helper.c b/target-mips/helper.c
index 9a503456b6..6310d68487 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
@@ -293,7 +293,7 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
/* TLB match but 'D' bit is cleared */
exception = EXCP_LTLBL;
break;
-
+
}
/* Raise exception */
env->CP0_BadVAddr = address;