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-rw-r--r--target-mips/cpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index f8b4b18583..f8299ad608 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -441,6 +441,7 @@ struct CPUMIPSState {
int CCRes; /* Cycle count resolution/divisor */
uint32_t CP0_Status_rw_bitmask; /* Read/write bits in CP0_Status */
uint32_t CP0_TCStatus_rw_bitmask; /* Read/write bits in CP0_TCStatus */
+ int insn_flags; /* Supported instruction set */
#ifdef CONFIG_USER_ONLY
target_ulong tls_value;