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-rw-r--r--target-mips/TODO1
1 files changed, 0 insertions, 1 deletions
diff --git a/target-mips/TODO b/target-mips/TODO
index e162ea5295..13ae2a93d0 100644
--- a/target-mips/TODO
+++ b/target-mips/TODO
@@ -3,7 +3,6 @@ Unsolved issues/bugs in the mips/mipsel backend
General
-------
-- TLB fails cornercase at address wrap around
- [ls][dw][lr] report broken (aligned) BadVAddr
- Missing per-CPU instruction decoding, currently all implemented
instructions are regarded as valid