diff options
Diffstat (limited to 'target-i386')
| -rw-r--r-- | target-i386/cpu.c | 17 | ||||
| -rw-r--r-- | target-i386/cpu.h | 2 |
2 files changed, 18 insertions, 1 deletions
diff --git a/target-i386/cpu.c b/target-i386/cpu.c index db9086e7ce..75dc973e3b 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2194,6 +2194,21 @@ void x86_cpu_realize(Object *obj, Error **errp) cpu_reset(CPU(cpu)); } +/* Calculates initial APIC ID for a specific CPU index + * + * Currently we need to be able to calculate the APIC ID from the CPU index + * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have + * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of + * all CPUs up to max_cpus. + */ +uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index) +{ + /* right now APIC ID == CPU index. this will eventually change to use + * the CPU topology configuration properly + */ + return cpu_index; +} + static void x86_cpu_initfn(Object *obj) { CPUState *cs = CPU(obj); @@ -2228,7 +2243,7 @@ static void x86_cpu_initfn(Object *obj) x86_cpuid_get_tsc_freq, x86_cpuid_set_tsc_freq, NULL, NULL, NULL); - env->cpuid_apic_id = cs->cpu_index; + env->cpuid_apic_id = x86_cpu_apic_id_from_index(cs->cpu_index); /* init various static tables used in TCG mode */ if (tcg_enabled() && !inited) { diff --git a/target-i386/cpu.h b/target-i386/cpu.h index 9d4fcf93b6..9442f08305 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -1255,4 +1255,6 @@ void disable_kvm_pv_eoi(void); /* Return name of 32-bit register, from a R_* constant */ const char *get_register_name_32(unsigned int reg); +uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index); + #endif /* CPU_I386_H */ |