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-rw-r--r--target-i386/cpu.c4
-rw-r--r--target-i386/cpu.h7
2 files changed, 8 insertions, 3 deletions
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 5ac7e975ad..5fc01c61dc 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2946,7 +2946,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp)
goto out;
}
- if (cpu->apic_id < 0) {
+ if (cpu->apic_id == UNASSIGNED_APIC_ID) {
error_setg(errp, "apic-id property was not initialized properly");
return;
}
@@ -3254,7 +3254,7 @@ static void x86_cpu_initfn(Object *obj)
#ifndef CONFIG_USER_ONLY
/* Any code creating new X86CPU objects have to set apic-id explicitly */
- cpu->apic_id = -1;
+ cpu->apic_id = UNASSIGNED_APIC_ID;
#endif
for (w = 0; w < FEATURE_WORDS; w++) {
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index b2ab8bf4be..10d562d4ea 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -845,6 +845,11 @@ typedef struct {
#define NB_OPMASK_REGS 8
+/* CPU can't have 0xFFFFFFFF APIC ID, use that value to distinguish
+ * that APIC ID hasn't been set yet
+ */
+#define UNASSIGNED_APIC_ID 0xFFFFFFFF
+
typedef union X86LegacyXSaveArea {
struct {
uint16_t fcw;
@@ -1174,7 +1179,7 @@ struct X86CPU {
bool expose_kvm;
bool migratable;
bool host_features;
- int64_t apic_id;
+ uint32_t apic_id;
/* if true the CPUID code directly forward host cache leaves to the guest */
bool cache_info_passthrough;