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-rw-r--r--target-i386/cpu.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 3549511106..f8373a1025 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -214,6 +214,12 @@
#define MSR_IA32_SYSENTER_ESP 0x175
#define MSR_IA32_SYSENTER_EIP 0x176
+#define MSR_MCG_CAP 0x179
+#define MSR_MCG_STATUS 0x17a
+#define MSR_MCG_CTL 0x17b
+
+#define MSR_PAT 0x277
+
#define MSR_EFER 0xc0000080
#define MSR_EFER_SCE (1 << 0)
@@ -246,6 +252,8 @@
#define CPUID_PGE (1 << 13)
#define CPUID_MCA (1 << 14)
#define CPUID_CMOV (1 << 15)
+#define CPUID_PAT (1 << 16)
+#define CPUID_CLFLUSH (1 << 19)
/* ... */
#define CPUID_MMX (1 << 23)
#define CPUID_FXSR (1 << 24)
@@ -474,6 +482,8 @@ typedef struct CPUX86State {
target_ulong kernelgsbase;
#endif
+ uint64_t pat;
+
/* temporary data for USE_CODE_COPY mode */
#ifdef USE_CODE_COPY
uint32_t tmp0;