diff options
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/translate-a64.c | 5 | ||||
| -rw-r--r-- | target-arm/translate.c | 5 |
2 files changed, 2 insertions, 8 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index a618711b64..6a66ac019a 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -11103,15 +11103,12 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu, tcg_ctx.gen_opc_instr_start[lj] = 1; tcg_ctx.gen_opc_icount[lj] = num_insns; } + tcg_gen_insn_start(dc->pc); if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) { gen_io_start(); } - if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) { - tcg_gen_insn_start(dc->pc); - } - if (dc->ss_active && !dc->pstate_ss) { /* Singlestep state is Active-pending. * If we're in this state at the start of a TB then either diff --git a/target-arm/translate.c b/target-arm/translate.c index b521fc86f8..83488486b9 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -11348,14 +11348,11 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu, tcg_ctx.gen_opc_instr_start[lj] = 1; tcg_ctx.gen_opc_icount[lj] = num_insns; } + tcg_gen_insn_start(dc->pc); if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) gen_io_start(); - if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) { - tcg_gen_insn_start(dc->pc); - } - if (dc->ss_active && !dc->pstate_ss) { /* Singlestep state is Active-pending. * If we're in this state at the start of a TB then either |