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-rw-r--r--target-arm/translate.c15
1 files changed, 7 insertions, 8 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 1753213f49..3183ef8ba0 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -8544,9 +8544,9 @@ undef:
/* generate intermediate code in gen_opc_buf and gen_opparam_buf for
basic block 'tb'. If search_pc is TRUE, also generate PC
information for each intermediate instruction. */
-static inline int gen_intermediate_code_internal(CPUState *env,
- TranslationBlock *tb,
- int search_pc)
+static inline void gen_intermediate_code_internal(CPUState *env,
+ TranslationBlock *tb,
+ int search_pc)
{
DisasContext dc1, *dc = &dc1;
uint16_t *gen_opc_end;
@@ -8787,17 +8787,16 @@ done_generating:
tb->size = dc->pc - pc_start;
tb->icount = num_insns;
}
- return 0;
}
-int gen_intermediate_code(CPUState *env, TranslationBlock *tb)
+void gen_intermediate_code(CPUState *env, TranslationBlock *tb)
{
- return gen_intermediate_code_internal(env, tb, 0);
+ gen_intermediate_code_internal(env, tb, 0);
}
-int gen_intermediate_code_pc(CPUState *env, TranslationBlock *tb)
+void gen_intermediate_code_pc(CPUState *env, TranslationBlock *tb)
{
- return gen_intermediate_code_internal(env, tb, 1);
+ gen_intermediate_code_internal(env, tb, 1);
}
static const char *cpu_mode_names[16] = {