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-rw-r--r--target-arm/op.c313
1 files changed, 0 insertions, 313 deletions
diff --git a/target-arm/op.c b/target-arm/op.c
index 74bf62b723..66dc7375c0 100644
--- a/target-arm/op.c
+++ b/target-arm/op.c
@@ -252,319 +252,6 @@ void OPPROTO op_rorl_T1_T0_cc(void)
FORCE_RET();
}
-/* VFP support. We follow the convention used for VFP instrunctions:
- Single precition routines have a "s" suffix, double precision a
- "d" suffix. */
-
-#define VFP_OP(name, p) void OPPROTO op_vfp_##name##p(void)
-
-#define VFP_BINOP(name) \
-VFP_OP(name, s) \
-{ \
- FT0s = float32_ ## name (FT0s, FT1s, &env->vfp.fp_status); \
-} \
-VFP_OP(name, d) \
-{ \
- FT0d = float64_ ## name (FT0d, FT1d, &env->vfp.fp_status); \
-}
-VFP_BINOP(add)
-VFP_BINOP(sub)
-VFP_BINOP(mul)
-VFP_BINOP(div)
-#undef VFP_BINOP
-
-#define VFP_HELPER(name) \
-VFP_OP(name, s) \
-{ \
- do_vfp_##name##s(); \
-} \
-VFP_OP(name, d) \
-{ \
- do_vfp_##name##d(); \
-}
-VFP_HELPER(abs)
-VFP_HELPER(sqrt)
-VFP_HELPER(cmp)
-VFP_HELPER(cmpe)
-#undef VFP_HELPER
-
-/* XXX: Will this do the right thing for NANs. Should invert the signbit
- without looking at the rest of the value. */
-VFP_OP(neg, s)
-{
- FT0s = float32_chs(FT0s);
-}
-
-VFP_OP(neg, d)
-{
- FT0d = float64_chs(FT0d);
-}
-
-VFP_OP(F1_ld0, s)
-{
- union {
- uint32_t i;
- float32 s;
- } v;
- v.i = 0;
- FT1s = v.s;
-}
-
-VFP_OP(F1_ld0, d)
-{
- union {
- uint64_t i;
- float64 d;
- } v;
- v.i = 0;
- FT1d = v.d;
-}
-
-/* Helper routines to perform bitwise copies between float and int. */
-static inline float32 vfp_itos(uint32_t i)
-{
- union {
- uint32_t i;
- float32 s;
- } v;
-
- v.i = i;
- return v.s;
-}
-
-static inline uint32_t vfp_stoi(float32 s)
-{
- union {
- uint32_t i;
- float32 s;
- } v;
-
- v.s = s;
- return v.i;
-}
-
-static inline float64 vfp_itod(uint64_t i)
-{
- union {
- uint64_t i;
- float64 d;
- } v;
-
- v.i = i;
- return v.d;
-}
-
-static inline uint64_t vfp_dtoi(float64 d)
-{
- union {
- uint64_t i;
- float64 d;
- } v;
-
- v.d = d;
- return v.i;
-}
-
-/* Integer to float conversion. */
-VFP_OP(uito, s)
-{
- FT0s = uint32_to_float32(vfp_stoi(FT0s), &env->vfp.fp_status);
-}
-
-VFP_OP(uito, d)
-{
- FT0d = uint32_to_float64(vfp_stoi(FT0s), &env->vfp.fp_status);
-}
-
-VFP_OP(sito, s)
-{
- FT0s = int32_to_float32(vfp_stoi(FT0s), &env->vfp.fp_status);
-}
-
-VFP_OP(sito, d)
-{
- FT0d = int32_to_float64(vfp_stoi(FT0s), &env->vfp.fp_status);
-}
-
-/* Float to integer conversion. */
-VFP_OP(toui, s)
-{
- FT0s = vfp_itos(float32_to_uint32(FT0s, &env->vfp.fp_status));
-}
-
-VFP_OP(toui, d)
-{
- FT0s = vfp_itos(float64_to_uint32(FT0d, &env->vfp.fp_status));
-}
-
-VFP_OP(tosi, s)
-{
- FT0s = vfp_itos(float32_to_int32(FT0s, &env->vfp.fp_status));
-}
-
-VFP_OP(tosi, d)
-{
- FT0s = vfp_itos(float64_to_int32(FT0d, &env->vfp.fp_status));
-}
-
-/* TODO: Set rounding mode properly. */
-VFP_OP(touiz, s)
-{
- FT0s = vfp_itos(float32_to_uint32_round_to_zero(FT0s, &env->vfp.fp_status));
-}
-
-VFP_OP(touiz, d)
-{
- FT0s = vfp_itos(float64_to_uint32_round_to_zero(FT0d, &env->vfp.fp_status));
-}
-
-VFP_OP(tosiz, s)
-{
- FT0s = vfp_itos(float32_to_int32_round_to_zero(FT0s, &env->vfp.fp_status));
-}
-
-VFP_OP(tosiz, d)
-{
- FT0s = vfp_itos(float64_to_int32_round_to_zero(FT0d, &env->vfp.fp_status));
-}
-
-/* floating point conversion */
-VFP_OP(fcvtd, s)
-{
- FT0d = float32_to_float64(FT0s, &env->vfp.fp_status);
-}
-
-VFP_OP(fcvts, d)
-{
- FT0s = float64_to_float32(FT0d, &env->vfp.fp_status);
-}
-
-/* VFP3 fixed point conversion. */
-#define VFP_CONV_FIX(name, p, ftype, itype, sign) \
-VFP_OP(name##to, p) \
-{ \
- ftype tmp; \
- tmp = sign##int32_to_##ftype ((itype)vfp_##p##toi(FT0##p), \
- &env->vfp.fp_status); \
- FT0##p = ftype##_scalbn(tmp, PARAM1, &env->vfp.fp_status); \
-} \
-VFP_OP(to##name, p) \
-{ \
- ftype tmp; \
- tmp = ftype##_scalbn(FT0##p, PARAM1, &env->vfp.fp_status); \
- FT0##p = vfp_ito##p((itype)ftype##_to_##sign##int32_round_to_zero(tmp, \
- &env->vfp.fp_status)); \
-}
-
-VFP_CONV_FIX(sh, d, float64, int16, )
-VFP_CONV_FIX(sl, d, float64, int32, )
-VFP_CONV_FIX(uh, d, float64, uint16, u)
-VFP_CONV_FIX(ul, d, float64, uint32, u)
-VFP_CONV_FIX(sh, s, float32, int16, )
-VFP_CONV_FIX(sl, s, float32, int32, )
-VFP_CONV_FIX(uh, s, float32, uint16, u)
-VFP_CONV_FIX(ul, s, float32, uint32, u)
-
-/* Get and Put values from registers. */
-VFP_OP(getreg_F0, d)
-{
- FT0d = *(float64 *)((char *) env + PARAM1);
-}
-
-VFP_OP(getreg_F0, s)
-{
- FT0s = *(float32 *)((char *) env + PARAM1);
-}
-
-VFP_OP(getreg_F1, d)
-{
- FT1d = *(float64 *)((char *) env + PARAM1);
-}
-
-VFP_OP(getreg_F1, s)
-{
- FT1s = *(float32 *)((char *) env + PARAM1);
-}
-
-VFP_OP(setreg_F0, d)
-{
- *(float64 *)((char *) env + PARAM1) = FT0d;
-}
-
-VFP_OP(setreg_F0, s)
-{
- *(float32 *)((char *) env + PARAM1) = FT0s;
-}
-
-void OPPROTO op_vfp_movl_T0_fpscr(void)
-{
- do_vfp_get_fpscr ();
-}
-
-void OPPROTO op_vfp_movl_T0_fpscr_flags(void)
-{
- T0 = env->vfp.xregs[ARM_VFP_FPSCR] & (0xf << 28);
-}
-
-void OPPROTO op_vfp_movl_fpscr_T0(void)
-{
- do_vfp_set_fpscr();
-}
-
-void OPPROTO op_vfp_movl_T0_xreg(void)
-{
- T0 = env->vfp.xregs[PARAM1];
-}
-
-void OPPROTO op_vfp_movl_xreg_T0(void)
-{
- env->vfp.xregs[PARAM1] = T0;
-}
-
-/* Move between FT0s to T0 */
-void OPPROTO op_vfp_mrs(void)
-{
- T0 = vfp_stoi(FT0s);
-}
-
-void OPPROTO op_vfp_msr(void)
-{
- FT0s = vfp_itos(T0);
-}
-
-/* Move between FT0d and {T0,T1} */
-void OPPROTO op_vfp_mrrd(void)
-{
- CPU_DoubleU u;
-
- u.d = FT0d;
- T0 = u.l.lower;
- T1 = u.l.upper;
-}
-
-void OPPROTO op_vfp_mdrr(void)
-{
- CPU_DoubleU u;
-
- u.l.lower = T0;
- u.l.upper = T1;
- FT0d = u.d;
-}
-
-/* Load immediate. PARAM1 is the 32 most significant bits of the value. */
-void OPPROTO op_vfp_fconstd(void)
-{
- CPU_DoubleU u;
- u.l.upper = PARAM1;
- u.l.lower = 0;
- FT0d = u.d;
-}
-
-void OPPROTO op_vfp_fconsts(void)
-{
- FT0s = vfp_itos(PARAM1);
-}
-
void OPPROTO op_movl_cp_T0(void)
{
helper_set_cp(env, PARAM1, T0);