diff options
Diffstat (limited to 'target-arm/nwfpe')
| -rw-r--r-- | target-arm/nwfpe/double_cpdo.c | 12 | ||||
| -rw-r--r-- | target-arm/nwfpe/extended_cpdo.c | 22 | ||||
| -rw-r--r-- | target-arm/nwfpe/fpa11.c | 60 | ||||
| -rw-r--r-- | target-arm/nwfpe/fpa11.h | 2 | ||||
| -rw-r--r-- | target-arm/nwfpe/fpa11_cpdo.c | 32 | ||||
| -rw-r--r-- | target-arm/nwfpe/fpa11_cpdt.c | 62 | ||||
| -rw-r--r-- | target-arm/nwfpe/fpa11_cprt.c | 48 | ||||
| -rw-r--r-- | target-arm/nwfpe/fpopcode.c | 22 | ||||
| -rw-r--r-- | target-arm/nwfpe/fpopcode.h | 18 | ||||
| -rw-r--r-- | target-arm/nwfpe/fpsr.h | 4 | ||||
| -rw-r--r-- | target-arm/nwfpe/single_cpdo.c | 10 |
11 files changed, 146 insertions, 146 deletions
diff --git a/target-arm/nwfpe/double_cpdo.c b/target-arm/nwfpe/double_cpdo.c index 944083a431..afc86aa417 100644 --- a/target-arm/nwfpe/double_cpdo.c +++ b/target-arm/nwfpe/double_cpdo.c @@ -42,14 +42,14 @@ unsigned int DoubleCPDO(const unsigned int opcode) unsigned int Fd, Fm, Fn, nRc = 1; //printk("DoubleCPDO(0x%08x)\n",opcode); - + Fm = getFm(opcode); if (CONSTANT_FM(opcode)) { rFm = getDoubleConstant(Fm); } else - { + { switch (fpa11->fType[Fm]) { case typeSingle: @@ -85,7 +85,7 @@ unsigned int DoubleCPDO(const unsigned int opcode) case typeDouble: rFn = fpa11->fpreg[Fn].fDouble; break; - + default: return 0; } } @@ -220,7 +220,7 @@ unsigned int DoubleCPDO(const unsigned int opcode) case NRM_CODE: break; - + default: { nRc = 0; @@ -286,11 +286,11 @@ return rFm; float64 float64_pow(float64 rFn,float64 rFm) { - return float64_exp(float64_mul(rFm,float64_ln(rFn))); + return float64_exp(float64_mul(rFm,float64_ln(rFn))); } float64 float64_pol(float64 rFn,float64 rFm) { - return float64_arctan(float64_div(rFn,rFm)); + return float64_arctan(float64_div(rFn,rFm)); } #endif diff --git a/target-arm/nwfpe/extended_cpdo.c b/target-arm/nwfpe/extended_cpdo.c index f5ef623111..caacdf2288 100644 --- a/target-arm/nwfpe/extended_cpdo.c +++ b/target-arm/nwfpe/extended_cpdo.c @@ -42,14 +42,14 @@ unsigned int ExtendedCPDO(const unsigned int opcode) unsigned int Fd, Fm, Fn, nRc = 1; //printk("ExtendedCPDO(0x%08x)\n",opcode); - + Fm = getFm(opcode); if (CONSTANT_FM(opcode)) { rFm = getExtendedConstant(Fm); } else - { + { switch (fpa11->fType[Fm]) { case typeSingle: @@ -59,15 +59,15 @@ unsigned int ExtendedCPDO(const unsigned int opcode) case typeDouble: rFm = float64_to_floatx80(fpa11->fpreg[Fm].fDouble, &fpa11->fp_status); break; - + case typeExtended: rFm = fpa11->fpreg[Fm].fExtended; break; - + default: return 0; } } - + if (!MONADIC_INSTRUCTION(opcode)) { Fn = getFn(opcode); @@ -80,11 +80,11 @@ unsigned int ExtendedCPDO(const unsigned int opcode) case typeDouble: rFn = float64_to_floatx80(fpa11->fpreg[Fn].fDouble, &fpa11->fp_status); break; - + case typeExtended: rFn = fpa11->fpreg[Fn].fExtended; break; - + default: return 0; } } @@ -204,13 +204,13 @@ unsigned int ExtendedCPDO(const unsigned int opcode) case NRM_CODE: break; - + default: { nRc = 0; } } - + if (0 != nRc) fpa11->fType[Fd] = typeExtended; return nRc; } @@ -263,11 +263,11 @@ floatx80 floatx80_arccos(floatx80 rFm) floatx80 floatx80_pow(floatx80 rFn,floatx80 rFm) { - return floatx80_exp(floatx80_mul(rFm,floatx80_ln(rFn))); + return floatx80_exp(floatx80_mul(rFm,floatx80_ln(rFn))); } floatx80 floatx80_pol(floatx80 rFn,floatx80 rFm) { - return floatx80_arctan(floatx80_div(rFn,rFm)); + return floatx80_arctan(floatx80_div(rFn,rFm)); } #endif diff --git a/target-arm/nwfpe/fpa11.c b/target-arm/nwfpe/fpa11.c index a8141e7e56..7fe6ed3f9c 100644 --- a/target-arm/nwfpe/fpa11.c +++ b/target-arm/nwfpe/fpa11.c @@ -43,16 +43,16 @@ void resetFPA11(void) { int i; FPA11 *fpa11 = GET_FPA11(); - + /* initialize the register type array */ for (i=0;i<=7;i++) { fpa11->fType[i] = typeNone; } - + /* FPSR: set system id to FP_EMULATOR, set AC, clear all other bits */ fpa11->fpsr = FP_EMULATOR | BIT_AC; - + /* FPCR: set SB, AB and DA bits, clear all others */ #if MAINTAIN_FPCR fpa11->fpcr = MASK_RESET; @@ -66,36 +66,36 @@ void SetRoundingMode(const unsigned int opcode) #if MAINTAIN_FPCR fpa11->fpcr &= ~MASK_ROUNDING_MODE; -#endif +#endif switch (opcode & MASK_ROUNDING_MODE) { default: case ROUND_TO_NEAREST: rounding_mode = float_round_nearest_even; -#if MAINTAIN_FPCR +#if MAINTAIN_FPCR fpa11->fpcr |= ROUND_TO_NEAREST; -#endif +#endif break; - + case ROUND_TO_PLUS_INFINITY: rounding_mode = float_round_up; -#if MAINTAIN_FPCR +#if MAINTAIN_FPCR fpa11->fpcr |= ROUND_TO_PLUS_INFINITY; -#endif +#endif break; - + case ROUND_TO_MINUS_INFINITY: rounding_mode = float_round_down; -#if MAINTAIN_FPCR +#if MAINTAIN_FPCR fpa11->fpcr |= ROUND_TO_MINUS_INFINITY; -#endif +#endif break; - + case ROUND_TO_ZERO: rounding_mode = float_round_to_zero; -#if MAINTAIN_FPCR +#if MAINTAIN_FPCR fpa11->fpcr |= ROUND_TO_ZERO; -#endif +#endif break; } set_float_rounding_mode(rounding_mode, &fpa11->fp_status); @@ -107,30 +107,30 @@ void SetRoundingPrecision(const unsigned int opcode) FPA11 *fpa11 = GET_FPA11(); #if MAINTAIN_FPCR fpa11->fpcr &= ~MASK_ROUNDING_PRECISION; -#endif +#endif switch (opcode & MASK_ROUNDING_PRECISION) { case ROUND_SINGLE: rounding_precision = 32; -#if MAINTAIN_FPCR +#if MAINTAIN_FPCR fpa11->fpcr |= ROUND_SINGLE; -#endif +#endif break; - + case ROUND_DOUBLE: rounding_precision = 64; -#if MAINTAIN_FPCR +#if MAINTAIN_FPCR fpa11->fpcr |= ROUND_DOUBLE; -#endif +#endif break; - + case ROUND_EXTENDED: rounding_precision = 80; -#if MAINTAIN_FPCR +#if MAINTAIN_FPCR fpa11->fpcr |= ROUND_EXTENDED; -#endif +#endif break; - + default: rounding_precision = 80; } set_floatx80_rounding_precision(rounding_precision, &fpa11->fp_status); @@ -142,12 +142,12 @@ unsigned int EmulateAll(unsigned int opcode, FPA11* qfpa, CPUARMState* qregs) { unsigned int nRc = 0; // unsigned long flags; - FPA11 *fpa11; + FPA11 *fpa11; // save_flags(flags); sti(); qemufpa=qfpa; user_registers=qregs; - + #if 0 fprintf(stderr,"emulating FP insn 0x%08x, PC=0x%08x\n", opcode, qregs[REG_PC]); @@ -222,14 +222,14 @@ unsigned int EmulateAll1(unsigned int opcode) } } break; - - case 0xe: + + case 0xe: if (opcode & 0x10) return EmulateCPDO(opcode); else return EmulateCPRT(opcode); break; - + default: return 0; } } diff --git a/target-arm/nwfpe/fpa11.h b/target-arm/nwfpe/fpa11.h index 8751696de9..f1fdfbddae 100644 --- a/target-arm/nwfpe/fpa11.h +++ b/target-arm/nwfpe/fpa11.h @@ -1,7 +1,7 @@ /* NetWinder Floating Point Emulator (c) Rebel.com, 1998-1999 - + Direct questions, comments to Scott Bambrough <scottb@netwinder.org> This program is free software; you can redistribute it and/or modify diff --git a/target-arm/nwfpe/fpa11_cpdo.c b/target-arm/nwfpe/fpa11_cpdo.c index cc8aa87c6e..3d5cc93106 100644 --- a/target-arm/nwfpe/fpa11_cpdo.c +++ b/target-arm/nwfpe/fpa11_cpdo.c @@ -30,26 +30,26 @@ unsigned int EmulateCPDO(const unsigned int opcode) { FPA11 *fpa11 = GET_FPA11(); unsigned int Fd, nType, nDest, nRc = 1; - + //printk("EmulateCPDO(0x%08x)\n",opcode); /* Get the destination size. If not valid let Linux perform an invalid instruction trap. */ nDest = getDestinationSize(opcode); if (typeNone == nDest) return 0; - + SetRoundingMode(opcode); - + /* Compare the size of the operands in Fn and Fm. Choose the largest size and perform operations in that size, - in order to make use of all the precision of the operands. - If Fm is a constant, we just grab a constant of a size + in order to make use of all the precision of the operands. + If Fm is a constant, we just grab a constant of a size matching the size of the operand in Fn. */ if (MONADIC_INSTRUCTION(opcode)) nType = nDest; else nType = fpa11->fType[getFn(opcode)]; - + if (!CONSTANT_FM(opcode)) { register unsigned int Fm = getFm(opcode); @@ -79,39 +79,39 @@ unsigned int EmulateCPDO(const unsigned int opcode) case typeSingle: { if (typeDouble == nType) - fpa11->fpreg[Fd].fSingle = + fpa11->fpreg[Fd].fSingle = float64_to_float32(fpa11->fpreg[Fd].fDouble, &fpa11->fp_status); else - fpa11->fpreg[Fd].fSingle = + fpa11->fpreg[Fd].fSingle = floatx80_to_float32(fpa11->fpreg[Fd].fExtended, &fpa11->fp_status); } break; - + case typeDouble: { if (typeSingle == nType) - fpa11->fpreg[Fd].fDouble = + fpa11->fpreg[Fd].fDouble = float32_to_float64(fpa11->fpreg[Fd].fSingle, &fpa11->fp_status); else - fpa11->fpreg[Fd].fDouble = + fpa11->fpreg[Fd].fDouble = floatx80_to_float64(fpa11->fpreg[Fd].fExtended, &fpa11->fp_status); } break; - + case typeExtended: { if (typeSingle == nType) - fpa11->fpreg[Fd].fExtended = + fpa11->fpreg[Fd].fExtended = float32_to_floatx80(fpa11->fpreg[Fd].fSingle, &fpa11->fp_status); else - fpa11->fpreg[Fd].fExtended = + fpa11->fpreg[Fd].fExtended = float64_to_floatx80(fpa11->fpreg[Fd].fDouble, &fpa11->fp_status); } break; } - + fpa11->fType[Fd] = nDest; } - + return nRc; } diff --git a/target-arm/nwfpe/fpa11_cpdt.c b/target-arm/nwfpe/fpa11_cpdt.c index 914a86fbc0..e1a67c71cf 100644 --- a/target-arm/nwfpe/fpa11_cpdt.c +++ b/target-arm/nwfpe/fpa11_cpdt.c @@ -52,7 +52,7 @@ void loadDouble(const unsigned int Fn,const unsigned int *pMem) p[0] = tget32(addr + 4); p[1] = tget32(addr); /* sign & exponent */ #endif -} +} static inline void loadExtended(const unsigned int Fn,const unsigned int *pMem) @@ -65,7 +65,7 @@ void loadExtended(const unsigned int Fn,const unsigned int *pMem) p[0] = tget32(addr); /* sign & exponent */ p[1] = tget32(addr + 8); /* ls bits */ p[2] = tget32(addr + 4); /* ms bits */ -} +} static inline void loadMultiple(const unsigned int Fn,const unsigned int *pMem) @@ -78,7 +78,7 @@ void loadMultiple(const unsigned int Fn,const unsigned int *pMem) p = (unsigned int*)&(fpa11->fpreg[Fn]); x = tget32(addr); fpa11->fType[Fn] = (x >> 14) & 0x00000003; - + switch (fpa11->fType[Fn]) { case typeSingle: @@ -88,13 +88,13 @@ void loadMultiple(const unsigned int Fn,const unsigned int *pMem) p[1] = tget32(addr + 4); /* double msw */ p[2] = 0; /* empty */ } - break; - + break; + case typeExtended: { p[1] = tget32(addr + 8); p[2] = tget32(addr + 4); /* msw */ - p[0] = (x & 0x80003fff); + p[0] = (x & 0x80003fff); } break; } @@ -107,22 +107,22 @@ void storeSingle(const unsigned int Fn,unsigned int *pMem) FPA11 *fpa11 = GET_FPA11(); float32 val; register unsigned int *p = (unsigned int*)&val; - + switch (fpa11->fType[Fn]) { - case typeDouble: + case typeDouble: val = float64_to_float32(fpa11->fpreg[Fn].fDouble, &fpa11->fp_status); break; - case typeExtended: + case typeExtended: val = floatx80_to_float32(fpa11->fpreg[Fn].fExtended, &fpa11->fp_status); break; default: val = fpa11->fpreg[Fn].fSingle; } - + tput32(addr, p[0]); -} +} static inline void storeDouble(const unsigned int Fn,unsigned int *pMem) @@ -134,7 +134,7 @@ void storeDouble(const unsigned int Fn,unsigned int *pMem) switch (fpa11->fType[Fn]) { - case typeSingle: + case typeSingle: val = float32_to_float64(fpa11->fpreg[Fn].fSingle, &fpa11->fp_status); break; @@ -151,7 +151,7 @@ void storeDouble(const unsigned int Fn,unsigned int *pMem) tput32(addr, p[1]); /* msw */ tput32(addr + 4, p[0]); /* lsw */ #endif -} +} static inline void storeExtended(const unsigned int Fn,unsigned int *pMem) @@ -160,24 +160,24 @@ void storeExtended(const unsigned int Fn,unsigned int *pMem) FPA11 *fpa11 = GET_FPA11(); floatx80 val; register unsigned int *p = (unsigned int*)&val; - + switch (fpa11->fType[Fn]) { - case typeSingle: + case typeSingle: val = float32_to_floatx80(fpa11->fpreg[Fn].fSingle, &fpa11->fp_status); break; - case typeDouble: + case typeDouble: val = float64_to_floatx80(fpa11->fpreg[Fn].fDouble, &fpa11->fp_status); break; default: val = fpa11->fpreg[Fn].fExtended; } - + tput32(addr, p[0]); /* sign & exp */ tput32(addr + 8, p[1]); tput32(addr + 4, p[2]); /* msw */ -} +} static inline void storeMultiple(const unsigned int Fn,unsigned int *pMem) @@ -185,10 +185,10 @@ void storeMultiple(const unsigned int Fn,unsigned int *pMem) target_ulong addr = (target_ulong)(long)pMem; FPA11 *fpa11 = GET_FPA11(); register unsigned int nType, *p; - + p = (unsigned int*)&(fpa11->fpreg[Fn]); nType = fpa11->fType[Fn]; - + switch (nType) { case typeSingle: @@ -198,8 +198,8 @@ void storeMultiple(const unsigned int Fn,unsigned int *pMem) tput32(addr + 4, p[1]); /* double msw */ tput32(addr, nType << 14); } - break; - + break; + case typeExtended: { tput32(addr + 4, p[2]); /* msw */ @@ -239,7 +239,7 @@ unsigned int PerformLDF(const unsigned int opcode) case TRANSFER_EXTENDED: loadExtended(getFd(opcode),pAddress); break; default: nRc = 0; } - + if (write_back) writeRegister(getRn(opcode),(unsigned int)pFinal); return nRc; } @@ -248,10 +248,10 @@ unsigned int PerformSTF(const unsigned int opcode) { unsigned int *pBase, *pAddress, *pFinal, nRc = 1, write_back = WRITE_BACK(opcode); - + //printk("PerformSTF(0x%08x), Fd = 0x%08x\n",opcode,getFd(opcode)); SetRoundingMode(ROUND_TO_NEAREST); - + pBase = (unsigned int*)readRegister(getRn(opcode)); if (REG_PC == getRn(opcode)) { @@ -274,7 +274,7 @@ unsigned int PerformSTF(const unsigned int opcode) case TRANSFER_EXTENDED: storeExtended(getFd(opcode),pAddress); break; default: nRc = 0; } - + if (write_back) writeRegister(getRn(opcode),(unsigned int)pFinal); return nRc; } @@ -315,14 +315,14 @@ unsigned int PerformSFM(const unsigned int opcode) { unsigned int i, Fd, *pBase, *pAddress, *pFinal, write_back = WRITE_BACK(opcode); - + pBase = (unsigned int*)readRegister(getRn(opcode)); if (REG_PC == getRn(opcode)) { pBase += 2; write_back = 0; } - + pFinal = pBase; if (BIT_UP_SET(opcode)) pFinal += getOffset(opcode); @@ -349,7 +349,7 @@ unsigned int EmulateCPDT(const unsigned int opcode) unsigned int nRc = 0; //printk("EmulateCPDT(0x%08x)\n",opcode); - + if (LDF_OP(opcode)) { nRc = PerformLDF(opcode); @@ -361,7 +361,7 @@ unsigned int EmulateCPDT(const unsigned int opcode) else if (STF_OP(opcode)) { nRc = PerformSTF(opcode); - } + } else if (SFM_OP(opcode)) { nRc = PerformSFM(opcode); @@ -370,7 +370,7 @@ unsigned int EmulateCPDT(const unsigned int opcode) { nRc = 0; } - + return nRc; } #endif diff --git a/target-arm/nwfpe/fpa11_cprt.c b/target-arm/nwfpe/fpa11_cprt.c index 3be9b42a90..68c4ff192d 100644 --- a/target-arm/nwfpe/fpa11_cprt.c +++ b/target-arm/nwfpe/fpa11_cprt.c @@ -55,7 +55,7 @@ unsigned int EmulateCPRT(const unsigned int opcode) { case FLT_CODE >> 20: nRc = PerformFLT(opcode); break; case FIX_CODE >> 20: nRc = PerformFIX(opcode); break; - + case WFS_CODE >> 20: writeFPSR(readRegister(getRd(opcode))); break; case RFS_CODE >> 20: writeRegister(getRd(opcode),readFPSR()); break; @@ -67,14 +67,14 @@ unsigned int EmulateCPRT(const unsigned int opcode) default: nRc = 0; } - + return nRc; } unsigned int PerformFLT(const unsigned int opcode) { FPA11 *fpa11 = GET_FPA11(); - + unsigned int nRc = 1; SetRoundingMode(opcode); @@ -95,7 +95,7 @@ unsigned int PerformFLT(const unsigned int opcode) int32_to_float64(readRegister(getRd(opcode)), &fpa11->fp_status); } break; - + case ROUND_EXTENDED: { fpa11->fType[getFn(opcode)] = typeExtended; @@ -103,10 +103,10 @@ unsigned int PerformFLT(const unsigned int opcode) int32_to_floatx80(readRegister(getRd(opcode)), &fpa11->fp_status); } break; - + default: nRc = 0; } - + return nRc; } @@ -115,7 +115,7 @@ unsigned int PerformFIX(const unsigned int opcode) FPA11 *fpa11 = GET_FPA11(); unsigned int nRc = 1; unsigned int Fn = getFm(opcode); - + SetRoundingMode(opcode); switch (fpa11->fType[Fn]) @@ -134,21 +134,21 @@ unsigned int PerformFIX(const unsigned int opcode) float64_to_int32(fpa11->fpreg[Fn].fDouble, &fpa11->fp_status)); } break; - + case typeExtended: { writeRegister(getRd(opcode), floatx80_to_int32(fpa11->fpreg[Fn].fExtended, &fpa11->fp_status)); } break; - + default: nRc = 0; } - + return nRc; } - + static unsigned int __inline__ PerformComparisonOperation(floatx80 Fn, floatx80 Fm) { @@ -160,7 +160,7 @@ PerformComparisonOperation(floatx80 Fn, floatx80 Fm) { flags |= CC_NEGATIVE; } - + /* test for equal condition */ if (floatx80_eq(Fn,Fm, &fpa11->fp_status)) { @@ -172,13 +172,13 @@ PerformComparisonOperation(floatx80 Fn, floatx80 Fm) { flags |= CC_CARRY; } - + writeConditionCodes(flags); return 1; } /* This instruction sets the flags N, Z, C, V in the FPSR. */ - + static unsigned int PerformComparison(const unsigned int opcode) { FPA11 *fpa11 = GET_FPA11(); @@ -200,27 +200,27 @@ static unsigned int PerformComparison(const unsigned int opcode) comparison (cheaper than an 80-bit one). */ switch (fpa11->fType[Fn]) { - case typeSingle: + case typeSingle: //printk("single.\n"); if (float32_is_nan(fpa11->fpreg[Fn].fSingle)) goto unordered; rFn = float32_to_floatx80(fpa11->fpreg[Fn].fSingle, &fpa11->fp_status); break; - case typeDouble: + case typeDouble: //printk("double.\n"); if (float64_is_nan(fpa11->fpreg[Fn].fDouble)) goto unordered; rFn = float64_to_floatx80(fpa11->fpreg[Fn].fDouble, &fpa11->fp_status); break; - - case typeExtended: + + case typeExtended: //printk("extended.\n"); if (floatx80_is_nan(fpa11->fpreg[Fn].fExtended)) goto unordered; rFn = fpa11->fpreg[Fn].fExtended; break; - + default: return 0; } @@ -236,27 +236,27 @@ static unsigned int PerformComparison(const unsigned int opcode) //printk("Fm = r%d which contains a ",Fm); switch (fpa11->fType[Fm]) { - case typeSingle: + case typeSingle: //printk("single.\n"); if (float32_is_nan(fpa11->fpreg[Fm].fSingle)) goto unordered; rFm = float32_to_floatx80(fpa11->fpreg[Fm].fSingle, &fpa11->fp_status); break; - case typeDouble: + case typeDouble: //printk("double.\n"); if (float64_is_nan(fpa11->fpreg[Fm].fDouble)) goto unordered; rFm = float64_to_floatx80(fpa11->fpreg[Fm].fDouble, &fpa11->fp_status); break; - - case typeExtended: + + case typeExtended: //printk("extended.\n"); if (floatx80_is_nan(fpa11->fpreg[Fm].fExtended)) goto unordered; rFm = fpa11->fpreg[Fm].fExtended; break; - + default: return 0; } } diff --git a/target-arm/nwfpe/fpopcode.c b/target-arm/nwfpe/fpopcode.c index d29e913f46..efee406fb0 100644 --- a/target-arm/nwfpe/fpopcode.c +++ b/target-arm/nwfpe/fpopcode.c @@ -35,7 +35,7 @@ const floatx80 floatx80Constant[] = { { 0xa000000000000000ULL, 0x4001}, /* extended 5.0 */ { 0x8000000000000000ULL, 0x3ffe}, /* extended 0.5 */ { 0xa000000000000000ULL, 0x4002} /* extended 10.0 */ -}; +}; const float64 float64Constant[] = { 0x0000000000000000ULL, /* double 0.0 */ @@ -46,7 +46,7 @@ const float64 float64Constant[] = { 0x4014000000000000ULL, /* double 5.0 */ 0x3fe0000000000000ULL, /* double 0.5 */ 0x4024000000000000ULL /* double 10.0 */ -}; +}; const float32 float32Constant[] = { 0x00000000, /* single 0.0 */ @@ -57,12 +57,12 @@ const float32 float32Constant[] = { 0x40a00000, /* single 5.0 */ 0x3f000000, /* single 0.5 */ 0x41200000 /* single 10.0 */ -}; +}; unsigned int getTransferLength(const unsigned int opcode) { unsigned int nRc; - + switch (opcode & MASK_TRANSFER_LENGTH) { case 0x00000000: nRc = 1; break; /* single precision */ @@ -70,14 +70,14 @@ unsigned int getTransferLength(const unsigned int opcode) case 0x00400000: nRc = 3; break; /* extended precision */ default: nRc = 0; } - + return(nRc); } unsigned int getRegisterCount(const unsigned int opcode) { unsigned int nRc; - + switch (opcode & MASK_REGISTER_COUNT) { case 0x00000000: nRc = 4; break; @@ -86,14 +86,14 @@ unsigned int getRegisterCount(const unsigned int opcode) case 0x00408000: nRc = 3; break; default: nRc = 0; } - + return(nRc); } unsigned int getRoundingPrecision(const unsigned int opcode) { unsigned int nRc; - + switch (opcode & MASK_ROUNDING_PRECISION) { case 0x00000000: nRc = 1; break; @@ -101,14 +101,14 @@ unsigned int getRoundingPrecision(const unsigned int opcode) case 0x00080000: nRc = 3; break; default: nRc = 0; } - + return(nRc); } unsigned int getDestinationSize(const unsigned int opcode) { unsigned int nRc; - + switch (opcode & MASK_DESTINATION_SIZE) { case 0x00000000: nRc = typeSingle; break; @@ -116,7 +116,7 @@ unsigned int getDestinationSize(const unsigned int opcode) case 0x00080000: nRc = typeExtended; break; default: nRc = typeNone; } - + return(nRc); } diff --git a/target-arm/nwfpe/fpopcode.h b/target-arm/nwfpe/fpopcode.h index 13c7419262..e16e47af6d 100644 --- a/target-arm/nwfpe/fpopcode.h +++ b/target-arm/nwfpe/fpopcode.h @@ -24,18 +24,18 @@ /* ARM Floating Point Instruction Classes -| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | +| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |c o n d|1 1 0 P|U|u|W|L| Rn |v| Fd |0|0|0|1| o f f s e t | CPDT |c o n d|1 1 0 P|U|w|W|L| Rn |x| Fd |0|0|0|1| o f f s e t | CPDT -| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | +| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |c o n d|1 1 1 0|a|b|c|d|e| Fn |j| Fd |0|0|0|1|f|g|h|0|i| Fm | CPDO |c o n d|1 1 1 0|a|b|c|L|e| Fn | Rd |0|0|0|1|f|g|h|1|i| Fm | CPRT |c o n d|1 1 1 0|a|b|c|1|e| Fn |1|1|1|1|0|0|0|1|f|g|h|1|i| Fm | comparisons -| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | +| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPDT data transfer instructions LDF, STF, LFM, SFM - + CPDO dyadic arithmetic instructions ADF, MUF, SUF, RSF, DVF, RDF, POW, RPW, RMF, FML, FDV, FRD, POL @@ -43,7 +43,7 @@ CPDO dyadic arithmetic instructions CPDO monadic arithmetic instructions MVF, MNF, ABS, RND, SQT, LOG, LGN, EXP, SIN, COS, TAN, ASN, ACS, ATN, URD, NRM - + CPRT joint arithmetic/data transfer instructions FIX (arithmetic followed by load/store) FLT (load/store followed by arithmetic) @@ -57,7 +57,7 @@ U up/down bit: 0 = stack grows down, 1 = stack grows up W write back bit: 1 = update base register (Rn) L load/store bit: 0 = store, 1 = load Rn base register -Rd destination/source register +Rd destination/source register Fd floating point destination register Fn floating point source register Fm floating point source register or floating point constant @@ -370,19 +370,19 @@ static inline const floatx80 getExtendedConstant(const unsigned int nIndex) { extern const floatx80 floatx80Constant[]; return floatx80Constant[nIndex]; -} +} static inline const float64 getDoubleConstant(const unsigned int nIndex) { extern const float64 float64Constant[]; return float64Constant[nIndex]; -} +} static inline const float32 getSingleConstant(const unsigned int nIndex) { extern const float32 float32Constant[]; return float32Constant[nIndex]; -} +} extern unsigned int getRegisterCount(const unsigned int opcode); extern unsigned int getDestinationSize(const unsigned int opcode); diff --git a/target-arm/nwfpe/fpsr.h b/target-arm/nwfpe/fpsr.h index 6dafb0f524..0c665431eb 100644 --- a/target-arm/nwfpe/fpsr.h +++ b/target-arm/nwfpe/fpsr.h @@ -30,7 +30,7 @@ one byte. EXCEPTION TRAP ENABLE BYTE SYSTEM CONTROL BYTE CUMULATIVE EXCEPTION FLAGS BYTE - + The FPCR is a 32 bit register consisting of bit flags. */ @@ -43,7 +43,7 @@ typedef unsigned int FPCR; /* type for floating point control register */ #define MASK_SYSID 0xff000000 #define BIT_HARDWARE 0x80000000 -#define FP_EMULATOR 0x01000000 /* System ID for emulator */ +#define FP_EMULATOR 0x01000000 /* System ID for emulator */ #define FP_ACCELERATOR 0x81000000 /* System ID for FPA11 */ /* EXCEPTION TRAP ENABLE BYTE diff --git a/target-arm/nwfpe/single_cpdo.c b/target-arm/nwfpe/single_cpdo.c index 7dd2620f21..4f2ca6ade3 100644 --- a/target-arm/nwfpe/single_cpdo.c +++ b/target-arm/nwfpe/single_cpdo.c @@ -47,13 +47,13 @@ unsigned int SingleCPDO(const unsigned int opcode) rFm = getSingleConstant(Fm); } else - { + { switch (fpa11->fType[Fm]) { case typeSingle: rFm = fpa11->fpreg[Fm].fSingle; break; - + default: return 0; } } @@ -186,7 +186,7 @@ unsigned int SingleCPDO(const unsigned int opcode) case NRM_CODE: break; - + default: { nRc = 0; @@ -245,11 +245,11 @@ float32 float32_tan(float32 rFm) float32 float32_pow(float32 rFn,float32 rFm) { - return float32_exp(float32_mul(rFm,float32_ln(rFn))); + return float32_exp(float32_mul(rFm,float32_ln(rFn))); } float32 float32_pol(float32 rFn,float32 rFm) { - return float32_arctan(float32_div(rFn,rFm)); + return float32_arctan(float32_div(rFn,rFm)); } #endif |