aboutsummaryrefslogtreecommitdiff
path: root/target-arm/helper.c
diff options
context:
space:
mode:
Diffstat (limited to 'target-arm/helper.c')
-rw-r--r--target-arm/helper.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 99e0394e93..63e5dc7ef6 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -207,7 +207,6 @@ void cpu_reset(CPUARMState *env)
#else
/* SVC mode with interrupts disabled. */
env->uncached_cpsr = ARM_CPU_MODE_SVC | CPSR_A | CPSR_F | CPSR_I;
- env->regs[15] = 0;
/* On ARMv7-M the CPSR_I is the value of the PRIMASK register, and is
clear at reset. Initial SP and PC are loaded from ROM. */
if (IS_M(env)) {