diff options
Diffstat (limited to 'target-arm/helper.c')
| -rw-r--r-- | target-arm/helper.c | 80 |
1 files changed, 61 insertions, 19 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index 2a1f44860b..50c1017c8a 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -76,6 +76,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) memcpy(env->cp15.c0_c1, arm1136_cp15_c0_c1, 8 * sizeof(uint32_t)); memcpy(env->cp15.c0_c2, arm1136_cp15_c0_c2, 8 * sizeof(uint32_t)); env->cp15.c0_cachetype = 0x1dd20d2; + env->cp15.c1_sys = 0x00050078; break; case ARM_CPUID_ARM11MPCORE: set_feature(env, ARM_FEATURE_V6); @@ -109,6 +110,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) env->cp15.c0_ccsid[0] = 0xe007e01a; /* 16k L1 dcache. */ env->cp15.c0_ccsid[1] = 0x2007e01a; /* 16k L1 icache. */ env->cp15.c0_ccsid[2] = 0xf0000000; /* No L2 icache. */ + env->cp15.c1_sys = 0x00c50078; break; case ARM_CPUID_CORTEXA9: set_feature(env, ARM_FEATURE_V6); @@ -130,6 +132,7 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id) env->cp15.c0_clid = (1 << 27) | (1 << 24) | 3; env->cp15.c0_ccsid[0] = 0xe00fe015; /* 16k L1 dcache. */ env->cp15.c0_ccsid[1] = 0x200fe015; /* 16k L1 icache. */ + env->cp15.c1_sys = 0x00c50078; break; case ARM_CPUID_CORTEXM3: set_feature(env, ARM_FEATURE_V6); @@ -1084,22 +1087,26 @@ static int get_phys_addr_v6(CPUState *env, uint32_t address, int access_type, } code = 15; } - if (xn && access_type == 2) - goto do_fault; + if (domain == 3) { + *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; + } else { + if (xn && access_type == 2) + goto do_fault; - /* The simplified model uses AP[0] as an access control bit. */ - if ((env->cp15.c1_sys & (1 << 29)) && (ap & 1) == 0) { - /* Access flag fault. */ - code = (code == 15) ? 6 : 3; - goto do_fault; - } - *prot = check_ap(env, ap, domain, access_type, is_user); - if (!*prot) { - /* Access permission fault. */ - goto do_fault; - } - if (!xn) { - *prot |= PAGE_EXEC; + /* The simplified model uses AP[0] as an access control bit. */ + if ((env->cp15.c1_sys & (1 << 29)) && (ap & 1) == 0) { + /* Access flag fault. */ + code = (code == 15) ? 6 : 3; + goto do_fault; + } + *prot = check_ap(env, ap, domain, access_type, is_user); + if (!*prot) { + /* Access permission fault. */ + goto do_fault; + } + if (!xn) { + *prot |= PAGE_EXEC; + } } *phys_ptr = phys_addr; return 0; @@ -2463,53 +2470,85 @@ float64 VFP_HELPER(sito, d)(float32 x, CPUState *env) /* Float to integer conversion. */ float32 VFP_HELPER(toui, s)(float32 x, CPUState *env) { + if (float32_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float32_to_uint32(x, &env->vfp.fp_status)); } float32 VFP_HELPER(toui, d)(float64 x, CPUState *env) { + if (float64_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float64_to_uint32(x, &env->vfp.fp_status)); } float32 VFP_HELPER(tosi, s)(float32 x, CPUState *env) { + if (float32_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float32_to_int32(x, &env->vfp.fp_status)); } float32 VFP_HELPER(tosi, d)(float64 x, CPUState *env) { + if (float64_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float64_to_int32(x, &env->vfp.fp_status)); } float32 VFP_HELPER(touiz, s)(float32 x, CPUState *env) { + if (float32_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float32_to_uint32_round_to_zero(x, &env->vfp.fp_status)); } float32 VFP_HELPER(touiz, d)(float64 x, CPUState *env) { + if (float64_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float64_to_uint32_round_to_zero(x, &env->vfp.fp_status)); } float32 VFP_HELPER(tosiz, s)(float32 x, CPUState *env) { + if (float32_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float32_to_int32_round_to_zero(x, &env->vfp.fp_status)); } float32 VFP_HELPER(tosiz, d)(float64 x, CPUState *env) { + if (float64_is_any_nan(x)) { + return float32_zero; + } return vfp_itos(float64_to_int32_round_to_zero(x, &env->vfp.fp_status)); } /* floating point conversion */ float64 VFP_HELPER(fcvtd, s)(float32 x, CPUState *env) { - return float32_to_float64(x, &env->vfp.fp_status); + float64 r = float32_to_float64(x, &env->vfp.fp_status); + /* ARM requires that S<->D conversion of any kind of NaN generates + * a quiet NaN by forcing the most significant frac bit to 1. + */ + return float64_maybe_silence_nan(r); } float32 VFP_HELPER(fcvts, d)(float64 x, CPUState *env) { - return float64_to_float32(x, &env->vfp.fp_status); + float32 r = float64_to_float32(x, &env->vfp.fp_status); + /* ARM requires that S<->D conversion of any kind of NaN generates + * a quiet NaN by forcing the most significant frac bit to 1. + */ + return float32_maybe_silence_nan(r); } /* VFP3 fixed point conversion. */ @@ -2517,15 +2556,18 @@ float32 VFP_HELPER(fcvts, d)(float64 x, CPUState *env) ftype VFP_HELPER(name##to, p)(ftype x, uint32_t shift, CPUState *env) \ { \ ftype tmp; \ - tmp = sign##int32_to_##ftype ((itype)vfp_##p##toi(x), \ + tmp = sign##int32_to_##ftype ((itype##_t)vfp_##p##toi(x), \ &env->vfp.fp_status); \ return ftype##_scalbn(tmp, -(int)shift, &env->vfp.fp_status); \ } \ ftype VFP_HELPER(to##name, p)(ftype x, uint32_t shift, CPUState *env) \ { \ ftype tmp; \ + if (ftype##_is_any_nan(x)) { \ + return ftype##_zero; \ + } \ tmp = ftype##_scalbn(x, shift, &env->vfp.fp_status); \ - return vfp_ito##p((itype)ftype##_to_##sign##int32_round_to_zero(tmp, \ + return vfp_ito##p(ftype##_to_##itype##_round_to_zero(tmp, \ &env->vfp.fp_status)); \ } |