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-rw-r--r--include/hw/acpi/bios-linker-loader.h2
-rw-r--r--include/hw/acpi/vmgenid.h1
-rw-r--r--include/hw/compat.h4
-rw-r--r--include/hw/i386/pc.h3
-rw-r--r--include/hw/loader.h2
-rw-r--r--include/hw/nvram/fw_cfg.h7
-rw-r--r--include/hw/pci/pci.h1
-rw-r--r--include/hw/pci/pci_bridge.h25
-rw-r--r--include/hw/pci/pci_bus.h1
-rw-r--r--include/hw/pci/pcie_port.h1
10 files changed, 38 insertions, 9 deletions
diff --git a/include/hw/acpi/bios-linker-loader.h b/include/hw/acpi/bios-linker-loader.h
index efe17b0b9c..a711dbced8 100644
--- a/include/hw/acpi/bios-linker-loader.h
+++ b/include/hw/acpi/bios-linker-loader.h
@@ -7,6 +7,8 @@ typedef struct BIOSLinker {
GArray *file_list;
} BIOSLinker;
+bool bios_linker_loader_can_write_pointer(void);
+
BIOSLinker *bios_linker_loader_init(void);
void bios_linker_loader_alloc(BIOSLinker *linker,
diff --git a/include/hw/acpi/vmgenid.h b/include/hw/acpi/vmgenid.h
index 7beb9592fb..38586ecbdf 100644
--- a/include/hw/acpi/vmgenid.h
+++ b/include/hw/acpi/vmgenid.h
@@ -21,7 +21,6 @@ typedef struct VmGenIdState {
DeviceClass parent_obj;
QemuUUID guid; /* The 128-bit GUID seen by the guest */
uint8_t vmgenid_addr_le[8]; /* Address of the GUID (little-endian) */
- bool write_pointer_available;
} VmGenIdState;
/* returns NULL unless there is exactly one device */
diff --git a/include/hw/compat.h b/include/hw/compat.h
index 3e101f8f67..9cc14dd798 100644
--- a/include/hw/compat.h
+++ b/include/hw/compat.h
@@ -153,10 +153,6 @@
.driver = "fw_cfg_io",\
.property = "dma_enabled",\
.value = "off",\
- },{\
- .driver = "vmgenid",\
- .property = "x-write-pointer-available",\
- .value = "off",\
},
#define HW_COMPAT_2_3 \
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index d80859bfad..8226904524 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -369,6 +369,9 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t);
int e820_get_num_entries(void);
bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
+#define PC_COMPAT_2_10 \
+ HW_COMPAT_2_10 \
+
#define PC_COMPAT_2_9 \
HW_COMPAT_2_9 \
{\
diff --git a/include/hw/loader.h b/include/hw/loader.h
index 490c9ff8e6..355fe0f5a2 100644
--- a/include/hw/loader.h
+++ b/include/hw/loader.h
@@ -192,7 +192,7 @@ int rom_add_file(const char *file, const char *fw_dir,
MemoryRegion *rom_add_blob(const char *name, const void *blob, size_t len,
size_t max_len, hwaddr addr,
const char *fw_file_name,
- FWCfgReadCallback fw_callback,
+ FWCfgCallback fw_callback,
void *callback_opaque, AddressSpace *as,
bool read_only);
int rom_add_elf_program(const char *name, void *data, size_t datasize,
diff --git a/include/hw/nvram/fw_cfg.h b/include/hw/nvram/fw_cfg.h
index b77ea48abb..f50d068563 100644
--- a/include/hw/nvram/fw_cfg.h
+++ b/include/hw/nvram/fw_cfg.h
@@ -44,7 +44,7 @@ typedef struct FWCfgDmaAccess {
uint64_t address;
} QEMU_PACKED FWCfgDmaAccess;
-typedef void (*FWCfgReadCallback)(void *opaque);
+typedef void (*FWCfgCallback)(void *opaque);
struct FWCfgState {
/*< private >*/
@@ -182,7 +182,7 @@ void fw_cfg_add_file(FWCfgState *s, const char *filename, void *data,
* fw_cfg_add_file_callback:
* @s: fw_cfg device being modified
* @filename: name of new fw_cfg file item
- * @callback: callback function
+ * @select_cb: callback function when selecting
* @callback_opaque: argument to be passed into callback function
* @data: pointer to start of item data
* @len: size of item data
@@ -201,7 +201,8 @@ void fw_cfg_add_file(FWCfgState *s, const char *filename, void *data,
* with FW_CFG_DMA_CTL_SELECT).
*/
void fw_cfg_add_file_callback(FWCfgState *s, const char *filename,
- FWCfgReadCallback callback, void *callback_opaque,
+ FWCfgCallback select_cb,
+ void *callback_opaque,
void *data, size_t len, bool read_only);
/**
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 8bb6449dd7..aa7ef9cf69 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -100,6 +100,7 @@ extern bool pci_available;
#define PCI_DEVICE_ID_REDHAT_PXB_PCIE 0x000b
#define PCI_DEVICE_ID_REDHAT_PCIE_RP 0x000c
#define PCI_DEVICE_ID_REDHAT_XHCI 0x000d
+#define PCI_DEVICE_ID_REDHAT_PCIE_BRIDGE 0x000e
#define PCI_DEVICE_ID_REDHAT_QXL 0x0100
#define FMT_PCIBUS PRIx64
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
index ff7cbaa227..1acadc2c15 100644
--- a/include/hw/pci/pci_bridge.h
+++ b/include/hw/pci/pci_bridge.h
@@ -67,4 +67,29 @@ void pci_bridge_map_irq(PCIBridge *br, const char* bus_name,
#define PCI_BRIDGE_CTL_DISCARD_STATUS 0x400 /* Discard timer status */
#define PCI_BRIDGE_CTL_DISCARD_SERR 0x800 /* Discard timer SERR# enable */
+typedef struct PCIBridgeQemuCap {
+ uint8_t id; /* Standard PCI capability header field */
+ uint8_t next; /* Standard PCI capability header field */
+ uint8_t len; /* Standard PCI vendor-specific capability header field */
+ uint8_t type; /* Red Hat vendor-specific capability type.
+ Types are defined with REDHAT_PCI_CAP_ prefix */
+
+ uint32_t bus_res; /* Minimum number of buses to reserve */
+ uint64_t io; /* IO space to reserve */
+ uint32_t mem; /* Non-prefetchable memory to reserve */
+ /* At most one of the following two fields may be set to a value
+ * different from -1 */
+ uint32_t mem_pref_32; /* Prefetchable memory to reserve (32-bit MMIO) */
+ uint64_t mem_pref_64; /* Prefetchable memory to reserve (64-bit MMIO) */
+} PCIBridgeQemuCap;
+
+#define REDHAT_PCI_CAP_RESOURCE_RESERVE 1
+
+int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset,
+ uint32_t bus_reserve, uint64_t io_reserve,
+ uint32_t mem_non_pref_reserve,
+ uint32_t mem_pref_32_reserve,
+ uint64_t mem_pref_64_reserve,
+ Error **errp);
+
#endif /* QEMU_PCI_BRIDGE_H */
diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
index 5484a9b5c5..bc34fd0017 100644
--- a/include/hw/pci/pci_bus.h
+++ b/include/hw/pci/pci_bus.h
@@ -23,6 +23,7 @@ struct PCIBus {
PCIIOMMUFunc iommu_fn;
void *iommu_opaque;
uint8_t devfn_min;
+ uint32_t slot_reserved_mask;
pci_set_irq_fn set_irq;
pci_map_irq_fn map_irq;
pci_route_irq_fn route_intx_to_irq;
diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h
index 13332668e8..0736014bfd 100644
--- a/include/hw/pci/pcie_port.h
+++ b/include/hw/pci/pcie_port.h
@@ -65,6 +65,7 @@ void pcie_chassis_del_slot(PCIESlot *s);
typedef struct PCIERootPortClass {
PCIDeviceClass parent_class;
+ DeviceRealize parent_realize;
uint8_t (*aer_vector)(const PCIDevice *dev);
int (*interrupts_init)(PCIDevice *dev, Error **errp);