diff options
Diffstat (limited to 'include/hw/ppc')
-rw-r--r-- | include/hw/ppc/mac_dbdma.h | 9 | ||||
-rw-r--r-- | include/hw/ppc/openpic.h | 9 | ||||
-rw-r--r-- | include/hw/ppc/pnv.h | 75 | ||||
-rw-r--r-- | include/hw/ppc/pnv_core.h | 26 | ||||
-rw-r--r-- | include/hw/ppc/pnv_homer.h | 22 | ||||
-rw-r--r-- | include/hw/ppc/pnv_lpc.h | 28 | ||||
-rw-r--r-- | include/hw/ppc/pnv_occ.h | 22 | ||||
-rw-r--r-- | include/hw/ppc/pnv_pnor.h | 9 | ||||
-rw-r--r-- | include/hw/ppc/pnv_psi.h | 35 | ||||
-rw-r--r-- | include/hw/ppc/pnv_xive.h | 16 | ||||
-rw-r--r-- | include/hw/ppc/pnv_xscom.h | 10 | ||||
-rw-r--r-- | include/hw/ppc/spapr.h | 23 | ||||
-rw-r--r-- | include/hw/ppc/spapr_cpu_core.h | 17 | ||||
-rw-r--r-- | include/hw/ppc/spapr_irq.h | 12 | ||||
-rw-r--r-- | include/hw/ppc/spapr_tpm_proxy.h | 9 | ||||
-rw-r--r-- | include/hw/ppc/spapr_vio.h | 19 | ||||
-rw-r--r-- | include/hw/ppc/xics.h | 31 | ||||
-rw-r--r-- | include/hw/ppc/xics_spapr.h | 5 | ||||
-rw-r--r-- | include/hw/ppc/xive.h | 77 |
19 files changed, 223 insertions, 231 deletions
diff --git a/include/hw/ppc/mac_dbdma.h b/include/hw/ppc/mac_dbdma.h index 26cc469de4..9166d5f758 100644 --- a/include/hw/ppc/mac_dbdma.h +++ b/include/hw/ppc/mac_dbdma.h @@ -27,6 +27,7 @@ #include "qemu/iov.h" #include "sysemu/dma.h" #include "hw/sysbus.h" +#include "qom/object.h" typedef struct DBDMA_io DBDMA_io; @@ -160,13 +161,14 @@ typedef struct DBDMA_channel { dbdma_cmd current; } DBDMA_channel; -typedef struct { +struct DBDMAState { SysBusDevice parent_obj; MemoryRegion mem; DBDMA_channel channels[DBDMA_CHANNELS]; QEMUBH *bh; -} DBDMAState; +}; +typedef struct DBDMAState DBDMAState; /* Externally callable functions */ @@ -176,6 +178,7 @@ void DBDMA_register_channel(void *dbdma, int nchan, qemu_irq irq, void DBDMA_kick(DBDMAState *dbdma); #define TYPE_MAC_DBDMA "mac-dbdma" -#define MAC_DBDMA(obj) OBJECT_CHECK(DBDMAState, (obj), TYPE_MAC_DBDMA) +DECLARE_INSTANCE_CHECKER(DBDMAState, MAC_DBDMA, + TYPE_MAC_DBDMA) #endif diff --git a/include/hw/ppc/openpic.h b/include/hw/ppc/openpic.h index db0d29e6c2..61908c7858 100644 --- a/include/hw/ppc/openpic.h +++ b/include/hw/ppc/openpic.h @@ -3,6 +3,7 @@ #include "hw/sysbus.h" #include "hw/core/cpu.h" +#include "qom/object.h" #define MAX_CPU 32 #define MAX_MSI 8 @@ -136,9 +137,11 @@ typedef struct IRQDest { } IRQDest; #define TYPE_OPENPIC "openpic" -#define OPENPIC(obj) OBJECT_CHECK(OpenPICState, (obj), TYPE_OPENPIC) +typedef struct OpenPICState OpenPICState; +DECLARE_INSTANCE_CHECKER(OpenPICState, OPENPIC, + TYPE_OPENPIC) -typedef struct OpenPICState { +struct OpenPICState { /*< private >*/ SysBusDevice parent_obj; /*< public >*/ @@ -183,6 +186,6 @@ typedef struct OpenPICState { uint32_t irq_ipi0; uint32_t irq_tim0; uint32_t irq_msi; -} OpenPICState; +}; #endif /* OPENPIC_H */ diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index d4b0b0e2ff..b4b2b24d80 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -32,15 +32,13 @@ #include "hw/ppc/pnv_core.h" #include "hw/pci-host/pnv_phb3.h" #include "hw/pci-host/pnv_phb4.h" +#include "qom/object.h" #define TYPE_PNV_CHIP "pnv-chip" -#define PNV_CHIP(obj) OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP) -#define PNV_CHIP_CLASS(klass) \ - OBJECT_CLASS_CHECK(PnvChipClass, (klass), TYPE_PNV_CHIP) -#define PNV_CHIP_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PnvChipClass, (obj), TYPE_PNV_CHIP) +OBJECT_DECLARE_TYPE(PnvChip, PnvChipClass, + pnv_chip, PNV_CHIP) -typedef struct PnvChip { +struct PnvChip { /*< private >*/ SysBusDevice parent_obj; @@ -61,12 +59,14 @@ typedef struct PnvChip { AddressSpace xscom_as; gchar *dt_isa_nodename; -} PnvChip; +}; #define TYPE_PNV8_CHIP "pnv8-chip" -#define PNV8_CHIP(obj) OBJECT_CHECK(Pnv8Chip, (obj), TYPE_PNV8_CHIP) +typedef struct Pnv8Chip Pnv8Chip; +DECLARE_INSTANCE_CHECKER(Pnv8Chip, PNV8_CHIP, + TYPE_PNV8_CHIP) -typedef struct Pnv8Chip { +struct Pnv8Chip { /*< private >*/ PnvChip parent_obj; @@ -82,12 +82,14 @@ typedef struct Pnv8Chip { PnvPHB3 phbs[PNV8_CHIP_PHB3_MAX]; XICSFabric *xics; -} Pnv8Chip; +}; #define TYPE_PNV9_CHIP "pnv9-chip" -#define PNV9_CHIP(obj) OBJECT_CHECK(Pnv9Chip, (obj), TYPE_PNV9_CHIP) +typedef struct Pnv9Chip Pnv9Chip; +DECLARE_INSTANCE_CHECKER(Pnv9Chip, PNV9_CHIP, + TYPE_PNV9_CHIP) -typedef struct Pnv9Chip { +struct Pnv9Chip { /*< private >*/ PnvChip parent_obj; @@ -103,7 +105,7 @@ typedef struct Pnv9Chip { #define PNV9_CHIP_MAX_PEC 3 PnvPhb4PecState pecs[PNV9_CHIP_MAX_PEC]; -} Pnv9Chip; +}; /* * A SMT8 fused core is a pair of SMT4 cores. @@ -112,18 +114,20 @@ typedef struct Pnv9Chip { #define PNV9_PIR2CHIP(pir) (((pir) >> 8) & 0x7f) #define TYPE_PNV10_CHIP "pnv10-chip" -#define PNV10_CHIP(obj) OBJECT_CHECK(Pnv10Chip, (obj), TYPE_PNV10_CHIP) +typedef struct Pnv10Chip Pnv10Chip; +DECLARE_INSTANCE_CHECKER(Pnv10Chip, PNV10_CHIP, + TYPE_PNV10_CHIP) -typedef struct Pnv10Chip { +struct Pnv10Chip { /*< private >*/ PnvChip parent_obj; /*< public >*/ Pnv9Psi psi; PnvLpcController lpc; -} Pnv10Chip; +}; -typedef struct PnvChipClass { +struct PnvChipClass { /*< private >*/ SysBusDeviceClass parent_class; @@ -144,30 +148,30 @@ typedef struct PnvChipClass { void (*pic_print_info)(PnvChip *chip, Monitor *mon); uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id); uint32_t (*xscom_pcba)(PnvChip *chip, uint64_t addr); -} PnvChipClass; +}; #define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP #define PNV_CHIP_TYPE_NAME(cpu_model) cpu_model PNV_CHIP_TYPE_SUFFIX #define TYPE_PNV_CHIP_POWER8E PNV_CHIP_TYPE_NAME("power8e_v2.1") -#define PNV_CHIP_POWER8E(obj) \ - OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER8E) +DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER8E, + TYPE_PNV_CHIP_POWER8E) #define TYPE_PNV_CHIP_POWER8 PNV_CHIP_TYPE_NAME("power8_v2.0") -#define PNV_CHIP_POWER8(obj) \ - OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER8) +DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER8, + TYPE_PNV_CHIP_POWER8) #define TYPE_PNV_CHIP_POWER8NVL PNV_CHIP_TYPE_NAME("power8nvl_v1.0") -#define PNV_CHIP_POWER8NVL(obj) \ - OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER8NVL) +DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER8NVL, + TYPE_PNV_CHIP_POWER8NVL) #define TYPE_PNV_CHIP_POWER9 PNV_CHIP_TYPE_NAME("power9_v2.0") -#define PNV_CHIP_POWER9(obj) \ - OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER9) +DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER9, + TYPE_PNV_CHIP_POWER9) #define TYPE_PNV_CHIP_POWER10 PNV_CHIP_TYPE_NAME("power10_v1.0") -#define PNV_CHIP_POWER10(obj) \ - OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER10) +DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER10, + TYPE_PNV_CHIP_POWER10) /* * This generates a HW chip id depending on an index, as found on a @@ -191,16 +195,13 @@ typedef struct PnvChipClass { PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir); #define TYPE_PNV_MACHINE MACHINE_TYPE_NAME("powernv") -#define PNV_MACHINE(obj) \ - OBJECT_CHECK(PnvMachineState, (obj), TYPE_PNV_MACHINE) -#define PNV_MACHINE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PnvMachineClass, obj, TYPE_PNV_MACHINE) -#define PNV_MACHINE_CLASS(klass) \ - OBJECT_CLASS_CHECK(PnvMachineClass, klass, TYPE_PNV_MACHINE) - +typedef struct PnvMachineClass PnvMachineClass; typedef struct PnvMachineState PnvMachineState; +DECLARE_OBJ_CHECKERS(PnvMachineState, PnvMachineClass, + PNV_MACHINE, TYPE_PNV_MACHINE) -typedef struct PnvMachineClass { + +struct PnvMachineClass { /*< private >*/ MachineClass parent_class; @@ -209,7 +210,7 @@ typedef struct PnvMachineClass { int compat_size; void (*dt_power_mgt)(PnvMachineState *pnv, void *fdt); -} PnvMachineClass; +}; struct PnvMachineState { /*< private >*/ diff --git a/include/hw/ppc/pnv_core.h b/include/hw/ppc/pnv_core.h index 113550eb7f..5cb22c2fa9 100644 --- a/include/hw/ppc/pnv_core.h +++ b/include/hw/ppc/pnv_core.h @@ -22,18 +22,15 @@ #include "hw/cpu/core.h" #include "target/ppc/cpu.h" +#include "qom/object.h" #define TYPE_PNV_CORE "powernv-cpu-core" -#define PNV_CORE(obj) \ - OBJECT_CHECK(PnvCore, (obj), TYPE_PNV_CORE) -#define PNV_CORE_CLASS(klass) \ - OBJECT_CLASS_CHECK(PnvCoreClass, (klass), TYPE_PNV_CORE) -#define PNV_CORE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PnvCoreClass, (obj), TYPE_PNV_CORE) +OBJECT_DECLARE_TYPE(PnvCore, PnvCoreClass, + pnv_core, PNV_CORE) typedef struct PnvChip PnvChip; -typedef struct PnvCore { +struct PnvCore { /*< private >*/ CPUCore parent_obj; @@ -44,13 +41,13 @@ typedef struct PnvCore { PnvChip *chip; MemoryRegion xscom_regs; -} PnvCore; +}; -typedef struct PnvCoreClass { +struct PnvCoreClass { DeviceClass parent_class; const MemoryRegionOps *xscom_ops; -} PnvCoreClass; +}; #define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE #define PNV_CORE_TYPE_NAME(cpu_model) cpu_model PNV_CORE_TYPE_SUFFIX @@ -65,13 +62,14 @@ static inline PnvCPUState *pnv_cpu_state(PowerPCCPU *cpu) } #define TYPE_PNV_QUAD "powernv-cpu-quad" -#define PNV_QUAD(obj) \ - OBJECT_CHECK(PnvQuad, (obj), TYPE_PNV_QUAD) +typedef struct PnvQuad PnvQuad; +DECLARE_INSTANCE_CHECKER(PnvQuad, PNV_QUAD, + TYPE_PNV_QUAD) -typedef struct PnvQuad { +struct PnvQuad { DeviceState parent_obj; uint32_t id; MemoryRegion xscom_regs; -} PnvQuad; +}; #endif /* PPC_PNV_CORE_H */ diff --git a/include/hw/ppc/pnv_homer.h b/include/hw/ppc/pnv_homer.h index 1e91c950f6..0978812713 100644 --- a/include/hw/ppc/pnv_homer.h +++ b/include/hw/ppc/pnv_homer.h @@ -21,28 +21,28 @@ #define PPC_PNV_HOMER_H #include "hw/ppc/pnv.h" +#include "qom/object.h" #define TYPE_PNV_HOMER "pnv-homer" -#define PNV_HOMER(obj) OBJECT_CHECK(PnvHomer, (obj), TYPE_PNV_HOMER) +OBJECT_DECLARE_TYPE(PnvHomer, PnvHomerClass, + pnv_homer, PNV_HOMER) #define TYPE_PNV8_HOMER TYPE_PNV_HOMER "-POWER8" -#define PNV8_HOMER(obj) OBJECT_CHECK(PnvHomer, (obj), TYPE_PNV8_HOMER) +DECLARE_INSTANCE_CHECKER(PnvHomer, PNV8_HOMER, + TYPE_PNV8_HOMER) #define TYPE_PNV9_HOMER TYPE_PNV_HOMER "-POWER9" -#define PNV9_HOMER(obj) OBJECT_CHECK(PnvHomer, (obj), TYPE_PNV9_HOMER) +DECLARE_INSTANCE_CHECKER(PnvHomer, PNV9_HOMER, + TYPE_PNV9_HOMER) -typedef struct PnvHomer { +struct PnvHomer { DeviceState parent; struct PnvChip *chip; MemoryRegion pba_regs; MemoryRegion regs; -} PnvHomer; +}; -#define PNV_HOMER_CLASS(klass) \ - OBJECT_CLASS_CHECK(PnvHomerClass, (klass), TYPE_PNV_HOMER) -#define PNV_HOMER_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PnvHomerClass, (obj), TYPE_PNV_HOMER) -typedef struct PnvHomerClass { +struct PnvHomerClass { DeviceClass parent_class; int pba_size; @@ -51,6 +51,6 @@ typedef struct PnvHomerClass { const MemoryRegionOps *homer_ops; hwaddr core_max_base; -} PnvHomerClass; +}; #endif /* PPC_PNV_HOMER_H */ diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h index c1ec85d5e2..cd3c13c2a8 100644 --- a/include/hw/ppc/pnv_lpc.h +++ b/include/hw/ppc/pnv_lpc.h @@ -21,20 +21,26 @@ #define PPC_PNV_LPC_H #include "hw/ppc/pnv_psi.h" +#include "qom/object.h" #define TYPE_PNV_LPC "pnv-lpc" -#define PNV_LPC(obj) \ - OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV_LPC) +typedef struct PnvLpcClass PnvLpcClass; +typedef struct PnvLpcController PnvLpcController; +DECLARE_OBJ_CHECKERS(PnvLpcController, PnvLpcClass, + PNV_LPC, TYPE_PNV_LPC) #define TYPE_PNV8_LPC TYPE_PNV_LPC "-POWER8" -#define PNV8_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV8_LPC) +DECLARE_INSTANCE_CHECKER(PnvLpcController, PNV8_LPC, + TYPE_PNV8_LPC) #define TYPE_PNV9_LPC TYPE_PNV_LPC "-POWER9" -#define PNV9_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV9_LPC) +DECLARE_INSTANCE_CHECKER(PnvLpcController, PNV9_LPC, + TYPE_PNV9_LPC) #define TYPE_PNV10_LPC TYPE_PNV_LPC "-POWER10" -#define PNV10_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV10_LPC) +DECLARE_INSTANCE_CHECKER(PnvLpcController, PNV10_LPC, + TYPE_PNV10_LPC) -typedef struct PnvLpcController { +struct PnvLpcController { DeviceState parent; uint64_t eccb_stat_reg; @@ -79,20 +85,16 @@ typedef struct PnvLpcController { /* PSI to generate interrupts */ PnvPsi *psi; -} PnvLpcController; +}; -#define PNV_LPC_CLASS(klass) \ - OBJECT_CLASS_CHECK(PnvLpcClass, (klass), TYPE_PNV_LPC) -#define PNV_LPC_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PnvLpcClass, (obj), TYPE_PNV_LPC) -typedef struct PnvLpcClass { +struct PnvLpcClass { DeviceClass parent_class; int psi_irq; DeviceRealize parent_realize; -} PnvLpcClass; +}; /* * Old compilers error on typdef forward declarations. Keep them happy. diff --git a/include/hw/ppc/pnv_occ.h b/include/hw/ppc/pnv_occ.h index f8d3061419..b79e3440be 100644 --- a/include/hw/ppc/pnv_occ.h +++ b/include/hw/ppc/pnv_occ.h @@ -21,18 +21,22 @@ #define PPC_PNV_OCC_H #include "hw/ppc/pnv_psi.h" +#include "qom/object.h" #define TYPE_PNV_OCC "pnv-occ" -#define PNV_OCC(obj) OBJECT_CHECK(PnvOCC, (obj), TYPE_PNV_OCC) +OBJECT_DECLARE_TYPE(PnvOCC, PnvOCCClass, + pnv_occ, PNV_OCC) #define TYPE_PNV8_OCC TYPE_PNV_OCC "-POWER8" -#define PNV8_OCC(obj) OBJECT_CHECK(PnvOCC, (obj), TYPE_PNV8_OCC) +DECLARE_INSTANCE_CHECKER(PnvOCC, PNV8_OCC, + TYPE_PNV8_OCC) #define TYPE_PNV9_OCC TYPE_PNV_OCC "-POWER9" -#define PNV9_OCC(obj) OBJECT_CHECK(PnvOCC, (obj), TYPE_PNV9_OCC) +DECLARE_INSTANCE_CHECKER(PnvOCC, PNV9_OCC, + TYPE_PNV9_OCC) #define PNV_OCC_SENSOR_DATA_BLOCK_OFFSET 0x00580000 #define PNV_OCC_SENSOR_DATA_BLOCK_SIZE 0x00025800 -typedef struct PnvOCC { +struct PnvOCC { DeviceState xd; /* OCC Misc interrupt */ @@ -42,20 +46,16 @@ typedef struct PnvOCC { MemoryRegion xscom_regs; MemoryRegion sram_regs; -} PnvOCC; +}; -#define PNV_OCC_CLASS(klass) \ - OBJECT_CLASS_CHECK(PnvOCCClass, (klass), TYPE_PNV_OCC) -#define PNV_OCC_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PnvOCCClass, (obj), TYPE_PNV_OCC) -typedef struct PnvOCCClass { +struct PnvOCCClass { DeviceClass parent_class; int xscom_size; const MemoryRegionOps *xscom_ops; int psi_irq; -} PnvOCCClass; +}; #define PNV_OCC_SENSOR_DATA_BLOCK_BASE(i) \ (PNV_OCC_SENSOR_DATA_BLOCK_OFFSET + (i) * PNV_OCC_SENSOR_DATA_BLOCK_SIZE) diff --git a/include/hw/ppc/pnv_pnor.h b/include/hw/ppc/pnv_pnor.h index 4f96abdfb4..1ec4098bb9 100644 --- a/include/hw/ppc/pnv_pnor.h +++ b/include/hw/ppc/pnv_pnor.h @@ -8,6 +8,7 @@ */ #ifndef _PPC_PNV_PNOR_H #define _PPC_PNV_PNOR_H +#include "qom/object.h" /* * PNOR offset on the LPC FW address space @@ -15,9 +16,11 @@ #define PNOR_SPI_OFFSET 0x0c000000UL #define TYPE_PNV_PNOR "pnv-pnor" -#define PNV_PNOR(obj) OBJECT_CHECK(PnvPnor, (obj), TYPE_PNV_PNOR) +typedef struct PnvPnor PnvPnor; +DECLARE_INSTANCE_CHECKER(PnvPnor, PNV_PNOR, + TYPE_PNV_PNOR) -typedef struct PnvPnor { +struct PnvPnor { SysBusDevice parent_obj; BlockBackend *blk; @@ -25,6 +28,6 @@ typedef struct PnvPnor { uint8_t *storage; int64_t size; MemoryRegion mmio; -} PnvPnor; +}; #endif /* _PPC_PNV_PNOR_H */ diff --git a/include/hw/ppc/pnv_psi.h b/include/hw/ppc/pnv_psi.h index 979fc59f33..0034db44c3 100644 --- a/include/hw/ppc/pnv_psi.h +++ b/include/hw/ppc/pnv_psi.h @@ -23,14 +23,15 @@ #include "hw/sysbus.h" #include "hw/ppc/xics.h" #include "hw/ppc/xive.h" +#include "qom/object.h" #define TYPE_PNV_PSI "pnv-psi" -#define PNV_PSI(obj) \ - OBJECT_CHECK(PnvPsi, (obj), TYPE_PNV_PSI) +OBJECT_DECLARE_TYPE(PnvPsi, PnvPsiClass, + pnv_psi, PNV_PSI) #define PSIHB_XSCOM_MAX 0x20 -typedef struct PnvPsi { +struct PnvPsi { DeviceState parent; MemoryRegion regs_mr; @@ -47,36 +48,34 @@ typedef struct PnvPsi { uint64_t regs[PSIHB_XSCOM_MAX]; MemoryRegion xscom_regs; -} PnvPsi; +}; #define TYPE_PNV8_PSI TYPE_PNV_PSI "-POWER8" -#define PNV8_PSI(obj) \ - OBJECT_CHECK(Pnv8Psi, (obj), TYPE_PNV8_PSI) +typedef struct Pnv8Psi Pnv8Psi; +DECLARE_INSTANCE_CHECKER(Pnv8Psi, PNV8_PSI, + TYPE_PNV8_PSI) -typedef struct Pnv8Psi { +struct Pnv8Psi { PnvPsi parent; ICSState ics; -} Pnv8Psi; +}; #define TYPE_PNV9_PSI TYPE_PNV_PSI "-POWER9" -#define PNV9_PSI(obj) \ - OBJECT_CHECK(Pnv9Psi, (obj), TYPE_PNV9_PSI) +typedef struct Pnv9Psi Pnv9Psi; +DECLARE_INSTANCE_CHECKER(Pnv9Psi, PNV9_PSI, + TYPE_PNV9_PSI) -typedef struct Pnv9Psi { +struct Pnv9Psi { PnvPsi parent; XiveSource source; -} Pnv9Psi; +}; #define TYPE_PNV10_PSI TYPE_PNV_PSI "-POWER10" -#define PNV_PSI_CLASS(klass) \ - OBJECT_CLASS_CHECK(PnvPsiClass, (klass), TYPE_PNV_PSI) -#define PNV_PSI_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PnvPsiClass, (obj), TYPE_PNV_PSI) -typedef struct PnvPsiClass { +struct PnvPsiClass { SysBusDeviceClass parent_class; uint32_t xscom_pcba; @@ -86,7 +85,7 @@ typedef struct PnvPsiClass { int compat_size; void (*irq_set)(PnvPsi *psi, int, bool state); -} PnvPsiClass; +}; /* The PSI and FSP interrupts are muxed on the same IRQ number */ typedef enum PnvPsiIrq { diff --git a/include/hw/ppc/pnv_xive.h b/include/hw/ppc/pnv_xive.h index 76cf16f644..29d5debd1c 100644 --- a/include/hw/ppc/pnv_xive.h +++ b/include/hw/ppc/pnv_xive.h @@ -11,15 +11,13 @@ #define PPC_PNV_XIVE_H #include "hw/ppc/xive.h" +#include "qom/object.h" struct PnvChip; #define TYPE_PNV_XIVE "pnv-xive" -#define PNV_XIVE(obj) OBJECT_CHECK(PnvXive, (obj), TYPE_PNV_XIVE) -#define PNV_XIVE_CLASS(klass) \ - OBJECT_CLASS_CHECK(PnvXiveClass, (klass), TYPE_PNV_XIVE) -#define PNV_XIVE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PnvXiveClass, (obj), TYPE_PNV_XIVE) +OBJECT_DECLARE_TYPE(PnvXive, PnvXiveClass, + pnv_xive, PNV_XIVE) #define XIVE_BLOCK_MAX 16 @@ -28,7 +26,7 @@ struct PnvChip; #define XIVE_TABLE_VDT_MAX 16 /* VDT Domain Table (0-15) */ #define XIVE_TABLE_EDT_MAX 64 /* EDT Domain Table (0-63) */ -typedef struct PnvXive { +struct PnvXive { XiveRouter parent_obj; /* Owning chip */ @@ -87,13 +85,13 @@ typedef struct PnvXive { uint64_t mig[XIVE_TABLE_MIG_MAX]; uint64_t vdt[XIVE_TABLE_VDT_MAX]; uint64_t edt[XIVE_TABLE_EDT_MAX]; -} PnvXive; +}; -typedef struct PnvXiveClass { +struct PnvXiveClass { XiveRouterClass parent_class; DeviceRealize parent_realize; -} PnvXiveClass; +}; void pnv_xive_pic_print_info(PnvXive *xive, Monitor *mon); diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 09156a5a7a..7e3b189c07 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -27,16 +27,14 @@ typedef struct PnvXScomInterface PnvXScomInterface; #define TYPE_PNV_XSCOM_INTERFACE "pnv-xscom-interface" #define PNV_XSCOM_INTERFACE(obj) \ INTERFACE_CHECK(PnvXScomInterface, (obj), TYPE_PNV_XSCOM_INTERFACE) -#define PNV_XSCOM_INTERFACE_CLASS(klass) \ - OBJECT_CLASS_CHECK(PnvXScomInterfaceClass, (klass), \ +typedef struct PnvXScomInterfaceClass PnvXScomInterfaceClass; +DECLARE_CLASS_CHECKERS(PnvXScomInterfaceClass, PNV_XSCOM_INTERFACE, TYPE_PNV_XSCOM_INTERFACE) -#define PNV_XSCOM_INTERFACE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(PnvXScomInterfaceClass, (obj), TYPE_PNV_XSCOM_INTERFACE) -typedef struct PnvXScomInterfaceClass { +struct PnvXScomInterfaceClass { InterfaceClass parent; int (*dt_xscom)(PnvXScomInterface *dev, void *fdt, int offset); -} PnvXScomInterfaceClass; +}; /* * Layout of the XSCOM PCB addresses of EX core 1 (POWER 8) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index e50a2672e3..c8cd63bc06 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -8,6 +8,7 @@ #include "hw/mem/pc-dimm.h" #include "hw/ppc/spapr_ovec.h" #include "hw/ppc/spapr_irq.h" +#include "qom/object.h" #include "hw/ppc/spapr_xive.h" /* For SpaprXive */ #include "hw/ppc/xics.h" /* For ICSState */ #include "hw/ppc/spapr_tpm_proxy.h" @@ -27,10 +28,10 @@ typedef struct SpaprPendingHpt SpaprPendingHpt; #define TYPE_SPAPR_RTC "spapr-rtc" -#define SPAPR_RTC(obj) \ - OBJECT_CHECK(SpaprRtcState, (obj), TYPE_SPAPR_RTC) - typedef struct SpaprRtcState SpaprRtcState; +DECLARE_INSTANCE_CHECKER(SpaprRtcState, SPAPR_RTC, + TYPE_SPAPR_RTC) + struct SpaprRtcState { /*< private >*/ DeviceState parent_obj; @@ -42,12 +43,8 @@ typedef struct SpaprMachineClass SpaprMachineClass; #define TYPE_SPAPR_MACHINE "spapr-machine" typedef struct SpaprMachineState SpaprMachineState; -#define SPAPR_MACHINE(obj) \ - OBJECT_CHECK(SpaprMachineState, (obj), TYPE_SPAPR_MACHINE) -#define SPAPR_MACHINE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(SpaprMachineClass, obj, TYPE_SPAPR_MACHINE) -#define SPAPR_MACHINE_CLASS(klass) \ - OBJECT_CLASS_CHECK(SpaprMachineClass, klass, TYPE_SPAPR_MACHINE) +DECLARE_OBJ_CHECKERS(SpaprMachineState, SpaprMachineClass, + SPAPR_MACHINE, TYPE_SPAPR_MACHINE) typedef enum { SPAPR_RESIZE_HPT_DEFAULT = 0, @@ -790,12 +787,12 @@ static inline void spapr_dt_irq(uint32_t *intspec, int irq, bool is_lsi) typedef struct SpaprTceTable SpaprTceTable; #define TYPE_SPAPR_TCE_TABLE "spapr-tce-table" -#define SPAPR_TCE_TABLE(obj) \ - OBJECT_CHECK(SpaprTceTable, (obj), TYPE_SPAPR_TCE_TABLE) +DECLARE_INSTANCE_CHECKER(SpaprTceTable, SPAPR_TCE_TABLE, + TYPE_SPAPR_TCE_TABLE) #define TYPE_SPAPR_IOMMU_MEMORY_REGION "spapr-iommu-memory-region" -#define SPAPR_IOMMU_MEMORY_REGION(obj) \ - OBJECT_CHECK(IOMMUMemoryRegion, (obj), TYPE_SPAPR_IOMMU_MEMORY_REGION) +DECLARE_INSTANCE_CHECKER(IOMMUMemoryRegion, SPAPR_IOMMU_MEMORY_REGION, + TYPE_SPAPR_IOMMU_MEMORY_REGION) struct SpaprTceTable { DeviceState parent; diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h index 7aed8f555b..4022917168 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -13,18 +13,15 @@ #include "hw/qdev-core.h" #include "target/ppc/cpu-qom.h" #include "target/ppc/cpu.h" +#include "qom/object.h" #define TYPE_SPAPR_CPU_CORE "spapr-cpu-core" -#define SPAPR_CPU_CORE(obj) \ - OBJECT_CHECK(SpaprCpuCore, (obj), TYPE_SPAPR_CPU_CORE) -#define SPAPR_CPU_CORE_CLASS(klass) \ - OBJECT_CLASS_CHECK(SpaprCpuCoreClass, (klass), TYPE_SPAPR_CPU_CORE) -#define SPAPR_CPU_CORE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(SpaprCpuCoreClass, (obj), TYPE_SPAPR_CPU_CORE) +OBJECT_DECLARE_TYPE(SpaprCpuCore, SpaprCpuCoreClass, + spapr_cpu_core, SPAPR_CPU_CORE) #define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE -typedef struct SpaprCpuCore { +struct SpaprCpuCore { /*< private >*/ CPUCore parent_obj; @@ -32,12 +29,12 @@ typedef struct SpaprCpuCore { PowerPCCPU **threads; int node_id; bool pre_3_0_migration; /* older machine don't know about SpaprCpuState */ -} SpaprCpuCore; +}; -typedef struct SpaprCpuCoreClass { +struct SpaprCpuCoreClass { DeviceClass parent_class; const char *cpu_type; -} SpaprCpuCoreClass; +}; const char *spapr_get_cpu_core_type(const char *cpu_type); void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index b161ccebc2..c22a72c9e2 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -11,6 +11,7 @@ #define HW_SPAPR_IRQ_H #include "target/ppc/cpu-qom.h" +#include "qom/object.h" /* * IRQ range offsets per device type @@ -35,12 +36,11 @@ typedef struct SpaprInterruptController SpaprInterruptController; #define TYPE_SPAPR_INTC "spapr-interrupt-controller" #define SPAPR_INTC(obj) \ INTERFACE_CHECK(SpaprInterruptController, (obj), TYPE_SPAPR_INTC) -#define SPAPR_INTC_CLASS(klass) \ - OBJECT_CLASS_CHECK(SpaprInterruptControllerClass, (klass), TYPE_SPAPR_INTC) -#define SPAPR_INTC_GET_CLASS(obj) \ - OBJECT_GET_CLASS(SpaprInterruptControllerClass, (obj), TYPE_SPAPR_INTC) +typedef struct SpaprInterruptControllerClass SpaprInterruptControllerClass; +DECLARE_CLASS_CHECKERS(SpaprInterruptControllerClass, SPAPR_INTC, + TYPE_SPAPR_INTC) -typedef struct SpaprInterruptControllerClass { +struct SpaprInterruptControllerClass { InterfaceClass parent; int (*activate)(SpaprInterruptController *intc, uint32_t nr_servers, @@ -65,7 +65,7 @@ typedef struct SpaprInterruptControllerClass { void (*dt)(SpaprInterruptController *intc, uint32_t nr_servers, void *fdt, uint32_t phandle); int (*post_load)(SpaprInterruptController *intc, int version_id); -} SpaprInterruptControllerClass; +}; void spapr_irq_update_active_intc(struct SpaprMachineState *spapr); diff --git a/include/hw/ppc/spapr_tpm_proxy.h b/include/hw/ppc/spapr_tpm_proxy.h index c574e22ba4..300c81b1f0 100644 --- a/include/hw/ppc/spapr_tpm_proxy.h +++ b/include/hw/ppc/spapr_tpm_proxy.h @@ -17,15 +17,16 @@ #include "hw/qdev-core.h" #define TYPE_SPAPR_TPM_PROXY "spapr-tpm-proxy" -#define SPAPR_TPM_PROXY(obj) OBJECT_CHECK(SpaprTpmProxy, (obj), \ - TYPE_SPAPR_TPM_PROXY) +typedef struct SpaprTpmProxy SpaprTpmProxy; +DECLARE_INSTANCE_CHECKER(SpaprTpmProxy, SPAPR_TPM_PROXY, + TYPE_SPAPR_TPM_PROXY) -typedef struct SpaprTpmProxy { +struct SpaprTpmProxy { /*< private >*/ DeviceState parent; char *host_path; int host_fd; -} SpaprTpmProxy; +}; #endif /* HW_SPAPR_TPM_PROXY_H */ diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h index bed7df60e3..6c40da72ff 100644 --- a/include/hw/ppc/spapr_vio.h +++ b/include/hw/ppc/spapr_vio.h @@ -25,17 +25,16 @@ #include "hw/ppc/spapr.h" #include "sysemu/dma.h" #include "hw/irq.h" +#include "qom/object.h" #define TYPE_VIO_SPAPR_DEVICE "vio-spapr-device" -#define VIO_SPAPR_DEVICE(obj) \ - OBJECT_CHECK(SpaprVioDevice, (obj), TYPE_VIO_SPAPR_DEVICE) -#define VIO_SPAPR_DEVICE_CLASS(klass) \ - OBJECT_CLASS_CHECK(SpaprVioDeviceClass, (klass), TYPE_VIO_SPAPR_DEVICE) -#define VIO_SPAPR_DEVICE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(SpaprVioDeviceClass, (obj), TYPE_VIO_SPAPR_DEVICE) +OBJECT_DECLARE_TYPE(SpaprVioDevice, SpaprVioDeviceClass, + vio_spapr_device, VIO_SPAPR_DEVICE) #define TYPE_SPAPR_VIO_BUS "spapr-vio-bus" -#define SPAPR_VIO_BUS(obj) OBJECT_CHECK(SpaprVioBus, (obj), TYPE_SPAPR_VIO_BUS) +typedef struct SpaprVioBus SpaprVioBus; +DECLARE_INSTANCE_CHECKER(SpaprVioBus, SPAPR_VIO_BUS, + TYPE_SPAPR_VIO_BUS) #define TYPE_SPAPR_VIO_BRIDGE "spapr-vio-bridge" @@ -46,10 +45,8 @@ typedef struct SpaprVioCrq { int(*SendFunc)(struct SpaprVioDevice *vdev, uint8_t *crq); } SpaprVioCrq; -typedef struct SpaprVioDevice SpaprVioDevice; -typedef struct SpaprVioBus SpaprVioBus; -typedef struct SpaprVioDeviceClass { +struct SpaprVioDeviceClass { DeviceClass parent_class; const char *dt_name, *dt_type, *dt_compatible; @@ -59,7 +56,7 @@ typedef struct SpaprVioDeviceClass { void (*reset)(SpaprVioDevice *dev); int (*devnode)(SpaprVioDevice *dev, void *fdt, int node_off); const char *(*get_dt_compatible)(SpaprVioDevice *dev); -} SpaprVioDeviceClass; +}; struct SpaprVioDevice { DeviceState qdev; diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 9ed58ec7e9..c5a3cdcadc 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -30,6 +30,7 @@ #include "exec/memory.h" #include "hw/qdev-core.h" +#include "qom/object.h" #define XICS_IPI 0x2 #define XICS_BUID 0x1 @@ -40,8 +41,6 @@ * (the kernel implementation supports more but we don't exploit * that yet) */ -typedef struct ICPStateClass ICPStateClass; -typedef struct ICPState ICPState; typedef struct PnvICPState PnvICPState; typedef struct ICSStateClass ICSStateClass; typedef struct ICSState ICSState; @@ -49,15 +48,13 @@ typedef struct ICSIRQState ICSIRQState; typedef struct XICSFabric XICSFabric; #define TYPE_ICP "icp" -#define ICP(obj) OBJECT_CHECK(ICPState, (obj), TYPE_ICP) +OBJECT_DECLARE_TYPE(ICPState, ICPStateClass, + icp, ICP) #define TYPE_PNV_ICP "pnv-icp" -#define PNV_ICP(obj) OBJECT_CHECK(PnvICPState, (obj), TYPE_PNV_ICP) +DECLARE_INSTANCE_CHECKER(PnvICPState, PNV_ICP, + TYPE_PNV_ICP) -#define ICP_CLASS(klass) \ - OBJECT_CLASS_CHECK(ICPStateClass, (klass), TYPE_ICP) -#define ICP_GET_CLASS(obj) \ - OBJECT_GET_CLASS(ICPStateClass, (obj), TYPE_ICP) struct ICPStateClass { DeviceClass parent_class; @@ -90,12 +87,9 @@ struct PnvICPState { }; #define TYPE_ICS "ics" -#define ICS(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS) +DECLARE_OBJ_CHECKERS(ICSState, ICSStateClass, + ICS, TYPE_ICS) -#define ICS_CLASS(klass) \ - OBJECT_CLASS_CHECK(ICSStateClass, (klass), TYPE_ICS) -#define ICS_GET_CLASS(obj) \ - OBJECT_GET_CLASS(ICSStateClass, (obj), TYPE_ICS) struct ICSStateClass { DeviceClass parent_class; @@ -145,17 +139,16 @@ struct ICSIRQState { #define TYPE_XICS_FABRIC "xics-fabric" #define XICS_FABRIC(obj) \ INTERFACE_CHECK(XICSFabric, (obj), TYPE_XICS_FABRIC) -#define XICS_FABRIC_CLASS(klass) \ - OBJECT_CLASS_CHECK(XICSFabricClass, (klass), TYPE_XICS_FABRIC) -#define XICS_FABRIC_GET_CLASS(obj) \ - OBJECT_GET_CLASS(XICSFabricClass, (obj), TYPE_XICS_FABRIC) +typedef struct XICSFabricClass XICSFabricClass; +DECLARE_CLASS_CHECKERS(XICSFabricClass, XICS_FABRIC, + TYPE_XICS_FABRIC) -typedef struct XICSFabricClass { +struct XICSFabricClass { InterfaceClass parent; ICSState *(*ics_get)(XICSFabric *xi, int irq); void (*ics_resend)(XICSFabric *xi); ICPState *(*icp_get)(XICSFabric *xi, int server); -} XICSFabricClass; +}; ICPState *xics_icp_get(XICSFabric *xi, int server); diff --git a/include/hw/ppc/xics_spapr.h b/include/hw/ppc/xics_spapr.h index 1c65c96e3c..0b8182e40b 100644 --- a/include/hw/ppc/xics_spapr.h +++ b/include/hw/ppc/xics_spapr.h @@ -28,9 +28,12 @@ #define XICS_SPAPR_H #include "hw/ppc/spapr.h" +#include "qom/object.h" #define TYPE_ICS_SPAPR "ics-spapr" -#define ICS_SPAPR(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_SPAPR) +/* This is reusing the ICSState typedef from TYPE_ICS */ +DECLARE_INSTANCE_CHECKER(ICSState, ICS_SPAPR, + TYPE_ICS_SPAPR) int xics_kvm_connect(SpaprInterruptController *intc, uint32_t nr_servers, Error **errp); diff --git a/include/hw/ppc/xive.h b/include/hw/ppc/xive.h index 2c42ae92d2..482fafccfd 100644 --- a/include/hw/ppc/xive.h +++ b/include/hw/ppc/xive.h @@ -143,6 +143,7 @@ #include "sysemu/kvm.h" #include "hw/sysbus.h" #include "hw/ppc/xive_regs.h" +#include "qom/object.h" /* * XIVE Notifier (Interface between Source and Router) @@ -153,22 +154,23 @@ typedef struct XiveNotifier XiveNotifier; #define TYPE_XIVE_NOTIFIER "xive-notifier" #define XIVE_NOTIFIER(obj) \ INTERFACE_CHECK(XiveNotifier, (obj), TYPE_XIVE_NOTIFIER) -#define XIVE_NOTIFIER_CLASS(klass) \ - OBJECT_CLASS_CHECK(XiveNotifierClass, (klass), TYPE_XIVE_NOTIFIER) -#define XIVE_NOTIFIER_GET_CLASS(obj) \ - OBJECT_GET_CLASS(XiveNotifierClass, (obj), TYPE_XIVE_NOTIFIER) +typedef struct XiveNotifierClass XiveNotifierClass; +DECLARE_CLASS_CHECKERS(XiveNotifierClass, XIVE_NOTIFIER, + TYPE_XIVE_NOTIFIER) -typedef struct XiveNotifierClass { +struct XiveNotifierClass { InterfaceClass parent; void (*notify)(XiveNotifier *xn, uint32_t lisn); -} XiveNotifierClass; +}; /* * XIVE Interrupt Source */ #define TYPE_XIVE_SOURCE "xive-source" -#define XIVE_SOURCE(obj) OBJECT_CHECK(XiveSource, (obj), TYPE_XIVE_SOURCE) +typedef struct XiveSource XiveSource; +DECLARE_INSTANCE_CHECKER(XiveSource, XIVE_SOURCE, + TYPE_XIVE_SOURCE) /* * XIVE Interrupt Source characteristics, which define how the ESB are @@ -177,7 +179,7 @@ typedef struct XiveNotifierClass { #define XIVE_SRC_H_INT_ESB 0x1 /* ESB managed with hcall H_INT_ESB */ #define XIVE_SRC_STORE_EOI 0x2 /* Store EOI supported */ -typedef struct XiveSource { +struct XiveSource { DeviceState parent; /* IRQs */ @@ -198,7 +200,7 @@ typedef struct XiveSource { MemoryRegion esb_mmio_kvm; XiveNotifier *xive; -} XiveSource; +}; /* * ESB MMIO setting. Can be one page, for both source triggering and @@ -304,7 +306,9 @@ void xive_source_set_irq(void *opaque, int srcno, int val); */ #define TYPE_XIVE_TCTX "xive-tctx" -#define XIVE_TCTX(obj) OBJECT_CHECK(XiveTCTX, (obj), TYPE_XIVE_TCTX) +typedef struct XiveTCTX XiveTCTX; +DECLARE_INSTANCE_CHECKER(XiveTCTX, XIVE_TCTX, + TYPE_XIVE_TCTX) /* * XIVE Thread interrupt Management register rings : @@ -319,7 +323,7 @@ void xive_source_set_irq(void *opaque, int srcno, int val); typedef struct XivePresenter XivePresenter; -typedef struct XiveTCTX { +struct XiveTCTX { DeviceState parent_obj; CPUState *cs; @@ -329,28 +333,24 @@ typedef struct XiveTCTX { uint8_t regs[XIVE_TM_RING_COUNT * XIVE_TM_RING_SIZE]; XivePresenter *xptr; -} XiveTCTX; +}; /* * XIVE Router */ typedef struct XiveFabric XiveFabric; -typedef struct XiveRouter { +struct XiveRouter { SysBusDevice parent; XiveFabric *xfb; -} XiveRouter; +}; #define TYPE_XIVE_ROUTER "xive-router" -#define XIVE_ROUTER(obj) \ - OBJECT_CHECK(XiveRouter, (obj), TYPE_XIVE_ROUTER) -#define XIVE_ROUTER_CLASS(klass) \ - OBJECT_CLASS_CHECK(XiveRouterClass, (klass), TYPE_XIVE_ROUTER) -#define XIVE_ROUTER_GET_CLASS(obj) \ - OBJECT_GET_CLASS(XiveRouterClass, (obj), TYPE_XIVE_ROUTER) - -typedef struct XiveRouterClass { +OBJECT_DECLARE_TYPE(XiveRouter, XiveRouterClass, + xive_router, XIVE_ROUTER) + +struct XiveRouterClass { SysBusDeviceClass parent; /* XIVE table accessors */ @@ -365,7 +365,7 @@ typedef struct XiveRouterClass { int (*write_nvt)(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx, XiveNVT *nvt, uint8_t word_number); uint8_t (*get_block_id)(XiveRouter *xrtr); -} XiveRouterClass; +}; int xive_router_get_eas(XiveRouter *xrtr, uint8_t eas_blk, uint32_t eas_idx, XiveEAS *eas); @@ -391,19 +391,18 @@ typedef struct XiveTCTXMatch { #define TYPE_XIVE_PRESENTER "xive-presenter" #define XIVE_PRESENTER(obj) \ INTERFACE_CHECK(XivePresenter, (obj), TYPE_XIVE_PRESENTER) -#define XIVE_PRESENTER_CLASS(klass) \ - OBJECT_CLASS_CHECK(XivePresenterClass, (klass), TYPE_XIVE_PRESENTER) -#define XIVE_PRESENTER_GET_CLASS(obj) \ - OBJECT_GET_CLASS(XivePresenterClass, (obj), TYPE_XIVE_PRESENTER) +typedef struct XivePresenterClass XivePresenterClass; +DECLARE_CLASS_CHECKERS(XivePresenterClass, XIVE_PRESENTER, + TYPE_XIVE_PRESENTER) -typedef struct XivePresenterClass { +struct XivePresenterClass { InterfaceClass parent; int (*match_nvt)(XivePresenter *xptr, uint8_t format, uint8_t nvt_blk, uint32_t nvt_idx, bool cam_ignore, uint8_t priority, uint32_t logic_serv, XiveTCTXMatch *match); bool (*in_kernel)(const XivePresenter *xptr); -} XivePresenterClass; +}; int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx, uint8_t format, @@ -417,28 +416,28 @@ int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx, #define TYPE_XIVE_FABRIC "xive-fabric" #define XIVE_FABRIC(obj) \ INTERFACE_CHECK(XiveFabric, (obj), TYPE_XIVE_FABRIC) -#define XIVE_FABRIC_CLASS(klass) \ - OBJECT_CLASS_CHECK(XiveFabricClass, (klass), TYPE_XIVE_FABRIC) -#define XIVE_FABRIC_GET_CLASS(obj) \ - OBJECT_GET_CLASS(XiveFabricClass, (obj), TYPE_XIVE_FABRIC) +typedef struct XiveFabricClass XiveFabricClass; +DECLARE_CLASS_CHECKERS(XiveFabricClass, XIVE_FABRIC, + TYPE_XIVE_FABRIC) -typedef struct XiveFabricClass { +struct XiveFabricClass { InterfaceClass parent; int (*match_nvt)(XiveFabric *xfb, uint8_t format, uint8_t nvt_blk, uint32_t nvt_idx, bool cam_ignore, uint8_t priority, uint32_t logic_serv, XiveTCTXMatch *match); -} XiveFabricClass; +}; /* * XIVE END ESBs */ #define TYPE_XIVE_END_SOURCE "xive-end-source" -#define XIVE_END_SOURCE(obj) \ - OBJECT_CHECK(XiveENDSource, (obj), TYPE_XIVE_END_SOURCE) +typedef struct XiveENDSource XiveENDSource; +DECLARE_INSTANCE_CHECKER(XiveENDSource, XIVE_END_SOURCE, + TYPE_XIVE_END_SOURCE) -typedef struct XiveENDSource { +struct XiveENDSource { DeviceState parent; uint32_t nr_ends; @@ -448,7 +447,7 @@ typedef struct XiveENDSource { MemoryRegion esb_mmio; XiveRouter *xrtr; -} XiveENDSource; +}; /* * For legacy compatibility, the exceptions define up to 256 different |