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path: root/include/hw/pci-host/pnv_phb3.h
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Diffstat (limited to 'include/hw/pci-host/pnv_phb3.h')
-rw-r--r--include/hw/pci-host/pnv_phb3.h19
1 files changed, 12 insertions, 7 deletions
diff --git a/include/hw/pci-host/pnv_phb3.h b/include/hw/pci-host/pnv_phb3.h
index af6ec83cf6..4854f6d2f6 100644
--- a/include/hw/pci-host/pnv_phb3.h
+++ b/include/hw/pci-host/pnv_phb3.h
@@ -14,6 +14,7 @@
#include "hw/pci/pcie_port.h"
#include "hw/ppc/xics.h"
#include "qom/object.h"
+#include "hw/pci-host/pnv_phb.h"
typedef struct PnvPHB3 PnvPHB3;
typedef struct PnvChip PnvChip;
@@ -103,15 +104,16 @@ struct PnvPBCQState {
};
/*
- * PHB3 PCIe Root port
+ * PHB3 PCIe Root Bus
*/
#define TYPE_PNV_PHB3_ROOT_BUS "pnv-phb3-root"
+struct PnvPHB3RootBus {
+ PCIBus parent;
-#define TYPE_PNV_PHB3_ROOT_PORT "pnv-phb3-root-port"
-
-typedef struct PnvPHB3RootPort {
- PCIESlot parent_obj;
-} PnvPHB3RootPort;
+ uint32_t chip_id;
+ uint32_t phb_id;
+};
+OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB3RootBus, PNV_PHB3_ROOT_BUS)
/*
* PHB3 PCIe Host Bridge for PowerNV machines (POWER8)
@@ -127,7 +129,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB3, PNV_PHB3)
#define PCI_MMIO_TOTAL_SIZE (0x1ull << 60)
struct PnvPHB3 {
- PCIExpressHost parent_obj;
+ DeviceState parent;
+
+ PnvPHB *phb_base;
uint32_t chip_id;
uint32_t phb_id;
@@ -164,5 +168,6 @@ uint64_t pnv_phb3_reg_read(void *opaque, hwaddr off, unsigned size);
void pnv_phb3_reg_write(void *opaque, hwaddr off, uint64_t val, unsigned size);
void pnv_phb3_update_regions(PnvPHB3 *phb);
void pnv_phb3_remap_irqs(PnvPHB3 *phb);
+void pnv_phb3_bus_init(DeviceState *dev, PnvPHB3 *phb);
#endif /* PCI_HOST_PNV_PHB3_H */