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-rw-r--r--include/hw/misc/mips_cmgcr.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/include/hw/misc/mips_cmgcr.h b/include/hw/misc/mips_cmgcr.h
index 69403c3880..cc60eefa53 100644
--- a/include/hw/misc/mips_cmgcr.h
+++ b/include/hw/misc/mips_cmgcr.h
@@ -26,6 +26,8 @@
#define GCR_CONFIG_OFS 0x0000
#define GCR_BASE_OFS 0x0008
#define GCR_REV_OFS 0x0030
+#define GCR_CPC_BASE_OFS 0x0088
+#define GCR_CPC_STATUS_OFS 0x00F0
#define GCR_L2_CONFIG_OFS 0x0130
/* Core Local and Core Other Block Register Map */
@@ -36,6 +38,11 @@
#define GCR_L2_CONFIG_BYPASS_SHF 20
#define GCR_L2_CONFIG_BYPASS_MSK ((0x1ULL) << GCR_L2_CONFIG_BYPASS_SHF)
+/* GCR_CPC_BASE register fields */
+#define GCR_CPC_BASE_CPCEN_MSK 1
+#define GCR_CPC_BASE_CPCBASE_MSK 0xFFFFFFFF8000ULL
+#define GCR_CPC_BASE_MSK (GCR_CPC_BASE_CPCEN_MSK | GCR_CPC_BASE_CPCBASE_MSK)
+
typedef struct MIPSGCRState MIPSGCRState;
struct MIPSGCRState {
SysBusDevice parent_obj;
@@ -44,6 +51,9 @@ struct MIPSGCRState {
int32_t num_vps;
hwaddr gcr_base;
MemoryRegion iomem;
+ MemoryRegion *cpc_mr;
+
+ uint64_t cpc_base;
};
#endif /* _MIPS_GCR_H */