aboutsummaryrefslogtreecommitdiff
path: root/include/hw/arm
diff options
context:
space:
mode:
Diffstat (limited to 'include/hw/arm')
-rw-r--r--include/hw/arm/bcm2835_peripherals.h15
-rw-r--r--include/hw/arm/raspi_platform.h8
2 files changed, 23 insertions, 0 deletions
diff --git a/include/hw/arm/bcm2835_peripherals.h b/include/hw/arm/bcm2835_peripherals.h
index 6b17f6a382..62a4c7b559 100644
--- a/include/hw/arm/bcm2835_peripherals.h
+++ b/include/hw/arm/bcm2835_peripherals.h
@@ -23,6 +23,7 @@
#include "hw/sd/sdhci.h"
#include "hw/sd/bcm2835_sdhost.h"
#include "hw/gpio/bcm2835_gpio.h"
+#include "hw/misc/unimp.h"
#define TYPE_BCM2835_PERIPHERALS "bcm2835-peripherals"
#define BCM2835_PERIPHERALS(obj) \
@@ -37,6 +38,10 @@ typedef struct BCM2835PeripheralState {
MemoryRegion ram_alias[4];
qemu_irq irq, fiq;
+ UnimplementedDeviceState systmr;
+ UnimplementedDeviceState armtmr;
+ UnimplementedDeviceState cprman;
+ UnimplementedDeviceState a2w;
PL011State uart0;
BCM2835AuxState aux;
BCM2835FBState fb;
@@ -48,6 +53,16 @@ typedef struct BCM2835PeripheralState {
SDHCIState sdhci;
BCM2835SDHostState sdhost;
BCM2835GpioState gpio;
+ UnimplementedDeviceState i2s;
+ UnimplementedDeviceState spi[1];
+ UnimplementedDeviceState i2c[3];
+ UnimplementedDeviceState otp;
+ UnimplementedDeviceState dbus;
+ UnimplementedDeviceState ave0;
+ UnimplementedDeviceState bscsl;
+ UnimplementedDeviceState smi;
+ UnimplementedDeviceState dwc2;
+ UnimplementedDeviceState sdramc;
} BCM2835PeripheralState;
#endif /* BCM2835_PERIPHERALS_H */
diff --git a/include/hw/arm/raspi_platform.h b/include/hw/arm/raspi_platform.h
index 66969fac5d..cdcbca943f 100644
--- a/include/hw/arm/raspi_platform.h
+++ b/include/hw/arm/raspi_platform.h
@@ -38,6 +38,8 @@
* Doorbells & Mailboxes */
#define CPRMAN_OFFSET 0x100000 /* Power Management, Watchdog */
#define CM_OFFSET 0x101000 /* Clock Management */
+#define A2W_OFFSET 0x102000 /* Reset controller */
+#define AVS_OFFSET 0x103000 /* Audio Video Standard */
#define RNG_OFFSET 0x104000
#define GPIO_OFFSET 0x200000
#define UART0_OFFSET 0x201000
@@ -45,11 +47,17 @@
#define I2S_OFFSET 0x203000
#define SPI0_OFFSET 0x204000
#define BSC0_OFFSET 0x205000 /* BSC0 I2C/TWI */
+#define OTP_OFFSET 0x20f000
+#define BSC_SL_OFFSET 0x214000 /* SPI slave */
#define AUX_OFFSET 0x215000 /* AUX: UART1/SPI1/SPI2 */
#define EMMC1_OFFSET 0x300000
#define SMI_OFFSET 0x600000
#define BSC1_OFFSET 0x804000 /* BSC1 I2C/TWI */
+#define BSC2_OFFSET 0x805000 /* BSC2 I2C/TWI */
+#define DBUS_OFFSET 0x900000
+#define AVE0_OFFSET 0x910000
#define USB_OTG_OFFSET 0x980000 /* DTC_OTG USB controller */
+#define SDRAMC_OFFSET 0xe00000
#define DMA15_OFFSET 0xE05000 /* DMA controller, channel 15 */
/* GPU interrupts */