aboutsummaryrefslogtreecommitdiff
path: root/hw
diff options
context:
space:
mode:
Diffstat (limited to 'hw')
-rw-r--r--hw/adlib.c309
-rw-r--r--hw/dma.c215
-rw-r--r--hw/fdc.c31
-rw-r--r--hw/fmopl.c1390
-rw-r--r--hw/fmopl.h174
-rw-r--r--hw/pc.c3
-rw-r--r--hw/sb16.c1412
7 files changed, 2873 insertions, 661 deletions
diff --git a/hw/adlib.c b/hw/adlib.c
new file mode 100644
index 0000000000..a49b32b53d
--- /dev/null
+++ b/hw/adlib.c
@@ -0,0 +1,309 @@
+/*
+ * QEMU Adlib emulation
+ *
+ * Copyright (c) 2004 Vassili Karpov (malc)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "vl.h"
+
+#define AUDIO_CAP "adlib"
+#include "audio/audio.h"
+
+#ifdef USE_YMF262
+#define HAS_YMF262 1
+#include "ymf262.h"
+void YMF262UpdateOneQEMU(int which, INT16 *dst, int length);
+#define SHIFT 2
+#else
+#include "fmopl.h"
+#define SHIFT 1
+#endif
+
+#ifdef _WIN32
+#include <windows.h>
+#define small_delay() Sleep (1)
+#else
+#define small_delay() usleep (1)
+#endif
+
+#define IO_READ_PROTO(name) \
+ uint32_t name (void *opaque, uint32_t nport)
+#define IO_WRITE_PROTO(name) \
+ void name (void *opaque, uint32_t nport, uint32_t val)
+
+static struct {
+ int port;
+ int freq;
+} conf = {0x220, 44100};
+
+typedef struct {
+ int enabled;
+ int active;
+ int cparam;
+ int64_t ticks;
+ int bufpos;
+ int16_t *mixbuf;
+ double interval;
+ QEMUTimer *ts, *opl_ts;
+ SWVoice *voice;
+ int left, pos, samples, bytes_per_second, old_free;
+ int refcount;
+#ifndef USE_YMF262
+ FM_OPL *opl;
+#endif
+} AdlibState;
+
+static AdlibState adlib;
+
+static IO_WRITE_PROTO(adlib_write)
+{
+ AdlibState *s = opaque;
+ int a = nport & 3;
+ int status;
+
+ s->ticks = qemu_get_clock (vm_clock);
+ s->active = 1;
+ AUD_enable (s->voice, 1);
+
+#ifdef USE_YMF262
+ status = YMF262Write (0, a, val);
+#else
+ status = OPLWrite (s->opl, a, val);
+#endif
+}
+
+static IO_READ_PROTO(adlib_read)
+{
+ AdlibState *s = opaque;
+ uint8_t data;
+ int a = nport & 3;
+
+#ifdef USE_YMF262
+ (void) s;
+ data = YMF262Read (0, a);
+#else
+ data = OPLRead (s->opl, a);
+#endif
+ return data;
+}
+
+static void OPL_timer (void *opaque)
+{
+ AdlibState *s = opaque;
+#ifdef USE_YMF262
+ YMF262TimerOver (s->cparam >> 1, s->cparam & 1);
+#else
+ OPLTimerOver (s->opl, s->cparam);
+#endif
+ qemu_mod_timer (s->opl_ts, qemu_get_clock (vm_clock) + s->interval);
+}
+
+static void YMF262TimerHandler (int c, double interval_Sec)
+{
+ AdlibState *s = &adlib;
+ if (interval_Sec == 0.0) {
+ qemu_del_timer (s->opl_ts);
+ return;
+ }
+ s->cparam = c;
+ s->interval = ticks_per_sec * interval_Sec;
+ qemu_mod_timer (s->opl_ts, qemu_get_clock (vm_clock) + s->interval);
+ small_delay ();
+}
+
+static int write_audio (AdlibState *s, int samples)
+{
+ int net = 0;
+ int ss = samples;
+ while (samples) {
+ int nbytes = samples << SHIFT;
+ int wbytes = AUD_write (s->voice,
+ s->mixbuf + (s->pos << (SHIFT - 1)),
+ nbytes);
+ int wsampl = wbytes >> SHIFT;
+ samples -= wsampl;
+ s->pos = (s->pos + wsampl) % s->samples;
+ net += wsampl;
+ if (!wbytes)
+ break;
+ }
+ if (net > ss) {
+ dolog ("WARNING: net > ss\n");
+ }
+ return net;
+}
+
+static void timer (void *opaque)
+{
+ AdlibState *s = opaque;
+ int elapsed, samples, net = 0;
+
+ if (s->refcount)
+ dolog ("refcount=%d\n", s->refcount);
+
+ s->refcount += 1;
+ if (!(s->active && s->enabled))
+ goto reset;
+
+ AUD_run ();
+
+ while (s->left) {
+ int written = write_audio (s, s->left);
+ net += written;
+ if (!written)
+ goto reset2;
+ s->left -= written;
+ }
+ s->pos = 0;
+
+ elapsed = AUD_calc_elapsed (s->voice);
+ if (!elapsed)
+ goto reset2;
+
+ /* elapsed = AUD_get_free (s->voice); */
+ samples = elapsed >> SHIFT;
+ if (!samples)
+ goto reset2;
+
+ samples = audio_MIN (samples, s->samples - s->pos);
+ if (s->left)
+ dolog ("left=%d samples=%d elapsed=%d free=%d\n",
+ s->left, samples, elapsed, AUD_get_free (s->voice));
+
+ if (!samples)
+ goto reset2;
+
+#ifdef USE_YMF262
+ YMF262UpdateOneQEMU (0, s->mixbuf + s->pos * 2, samples);
+#else
+ YM3812UpdateOne (s->opl, s->mixbuf + s->pos, samples);
+#endif
+
+ while (samples) {
+ int written = write_audio (s, samples);
+ net += written;
+ if (!written)
+ break;
+ samples -= written;
+ }
+ if (!samples)
+ s->pos = 0;
+ s->left = samples;
+
+reset2:
+ AUD_adjust (s->voice, net << SHIFT);
+reset:
+ qemu_mod_timer (s->ts, qemu_get_clock (vm_clock) + ticks_per_sec / 1024);
+ s->refcount -= 1;
+}
+
+static void Adlib_fini (AdlibState *s)
+{
+#ifdef USE_YMF262
+ YMF262Shutdown ();
+#else
+ if (s->opl) {
+ OPLDestroy (s->opl);
+ s->opl = NULL;
+ }
+#endif
+
+ if (s->opl_ts)
+ qemu_free_timer (s->opl_ts);
+
+ if (s->ts)
+ qemu_free_timer (s->ts);
+
+#define maybe_free(p) if (p) qemu_free (p)
+ maybe_free (s->mixbuf);
+#undef maybe_free
+
+ s->active = 0;
+ s->enabled = 0;
+}
+
+void Adlib_init (void)
+{
+ AdlibState *s = &adlib;
+
+ memset (s, 0, sizeof (*s));
+
+#ifdef USE_YMF262
+ if (YMF262Init (1, 14318180, conf.freq)) {
+ dolog ("YMF262Init %d failed\n", conf.freq);
+ return;
+ }
+ else {
+ YMF262SetTimerHandler (0, YMF262TimerHandler, 0);
+ s->enabled = 1;
+ }
+#else
+ s->opl = OPLCreate (OPL_TYPE_YM3812, 3579545, conf.freq);
+ if (!s->opl) {
+ dolog ("OPLCreate %d failed\n", conf.freq);
+ return;
+ }
+ else {
+ OPLSetTimerHandler (s->opl, YMF262TimerHandler, 0);
+ s->enabled = 1;
+ }
+#endif
+
+ s->opl_ts = qemu_new_timer (vm_clock, OPL_timer, s);
+ if (!s->opl_ts) {
+ dolog ("Can not get timer for adlib emulation\n");
+ Adlib_fini (s);
+ return;
+ }
+
+ s->ts = qemu_new_timer (vm_clock, timer, s);
+ if (!s->opl_ts) {
+ dolog ("Can not get timer for adlib emulation\n");
+ Adlib_fini (s);
+ return;
+ }
+
+ s->voice = AUD_open (s->voice, "adlib", conf.freq, SHIFT, AUD_FMT_S16);
+ if (!s->voice) {
+ Adlib_fini (s);
+ return;
+ }
+
+ s->bytes_per_second = conf.freq << SHIFT;
+ s->samples = AUD_get_buffer_size (s->voice) >> SHIFT;
+ s->mixbuf = qemu_mallocz (s->samples << SHIFT);
+
+ if (!s->mixbuf) {
+ dolog ("not enough memory for adlib mixing buffer (%d)\n",
+ s->samples << SHIFT);
+ Adlib_fini (s);
+ return;
+ }
+ register_ioport_read (0x388, 4, 1, adlib_read, s);
+ register_ioport_write (0x388, 4, 1, adlib_write, s);
+
+ register_ioport_read (conf.port, 4, 1, adlib_read, s);
+ register_ioport_write (conf.port, 4, 1, adlib_write, s);
+
+ register_ioport_read (conf.port + 8, 2, 1, adlib_read, s);
+ register_ioport_write (conf.port + 8, 2, 1, adlib_write, s);
+
+ qemu_mod_timer (s->ts, qemu_get_clock (vm_clock) + 1);
+}
diff --git a/hw/dma.c b/hw/dma.c
index e0c5bf1007..989aac5d89 100644
--- a/hw/dma.c
+++ b/hw/dma.c
@@ -1,8 +1,8 @@
/*
* QEMU DMA emulation
- *
- * Copyright (c) 2003 Vassili Karpov (malc)
- *
+ *
+ * Copyright (c) 2003-2004 Vassili Karpov (malc)
+ *
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
@@ -23,9 +23,9 @@
*/
#include "vl.h"
-//#define DEBUG_DMA
+/* #define DEBUG_DMA */
-#define log(...) fprintf (stderr, "dma: " __VA_ARGS__)
+#define dolog(...) fprintf (stderr, "dma: " __VA_ARGS__)
#ifdef DEBUG_DMA
#define lwarn(...) fprintf (stderr, "dma: " __VA_ARGS__)
#define linfo(...) fprintf (stderr, "dma: " __VA_ARGS__)
@@ -86,7 +86,7 @@ static void write_page (void *opaque, uint32_t nport, uint32_t data)
ichan = channels[nport & 7];
if (-1 == ichan) {
- log ("invalid channel %#x %#x\n", nport, data);
+ dolog ("invalid channel %#x %#x\n", nport, data);
return;
}
d->regs[ichan].page = data;
@@ -99,7 +99,7 @@ static void write_pageh (void *opaque, uint32_t nport, uint32_t data)
ichan = channels[nport & 7];
if (-1 == ichan) {
- log ("invalid channel %#x %#x\n", nport, data);
+ dolog ("invalid channel %#x %#x\n", nport, data);
return;
}
d->regs[ichan].pageh = data;
@@ -112,7 +112,7 @@ static uint32_t read_page (void *opaque, uint32_t nport)
ichan = channels[nport & 7];
if (-1 == ichan) {
- log ("invalid channel read %#x\n", nport);
+ dolog ("invalid channel read %#x\n", nport);
return 0;
}
return d->regs[ichan].page;
@@ -125,7 +125,7 @@ static uint32_t read_pageh (void *opaque, uint32_t nport)
ichan = channels[nport & 7];
if (-1 == ichan) {
- log ("invalid channel read %#x\n", nport);
+ dolog ("invalid channel read %#x\n", nport);
return 0;
}
return d->regs[ichan].pageh;
@@ -136,7 +136,7 @@ static inline void init_chan (struct dma_cont *d, int ichan)
struct dma_regs *r;
r = d->regs + ichan;
- r->now[ADDR] = r->base[0] << d->dshift;
+ r->now[ADDR] = r->base[ADDR] << d->dshift;
r->now[COUNT] = 0;
}
@@ -152,7 +152,7 @@ static inline int getff (struct dma_cont *d)
static uint32_t read_chan (void *opaque, uint32_t nport)
{
struct dma_cont *d = opaque;
- int ichan, nreg, iport, ff, val;
+ int ichan, nreg, iport, ff, val, dir;
struct dma_regs *r;
iport = (nport >> d->dshift) & 0x0f;
@@ -160,12 +160,14 @@ static uint32_t read_chan (void *opaque, uint32_t nport)
nreg = iport & 1;
r = d->regs + ichan;
+ dir = ((r->mode >> 5) & 1) ? -1 : 1;
ff = getff (d);
if (nreg)
val = (r->base[COUNT] << d->dshift) - r->now[COUNT];
else
- val = r->now[ADDR] + r->now[COUNT];
+ val = r->now[ADDR] + r->now[COUNT] * dir;
+ ldebug ("read_chan %#x -> %d\n", iport, val);
return (val >> (d->dshift + (ff << 3))) & 0xff;
}
@@ -190,19 +192,19 @@ static void write_chan (void *opaque, uint32_t nport, uint32_t data)
static void write_cont (void *opaque, uint32_t nport, uint32_t data)
{
struct dma_cont *d = opaque;
- int iport, ichan;
+ int iport, ichan = 0;
iport = (nport >> d->dshift) & 0x0f;
switch (iport) {
- case 8: /* command */
+ case 0x08: /* command */
if ((data != 0) && (data & CMD_NOT_SUPPORTED)) {
- log ("command %#x not supported\n", data);
+ dolog ("command %#x not supported\n", data);
return;
}
d->command = data;
break;
- case 9:
+ case 0x09:
ichan = data & 3;
if (data & 4) {
d->status |= 1 << (ichan + 4);
@@ -213,22 +215,19 @@ static void write_cont (void *opaque, uint32_t nport, uint32_t data)
d->status &= ~(1 << ichan);
break;
- case 0xa: /* single mask */
+ case 0x0a: /* single mask */
if (data & 4)
d->mask |= 1 << (data & 3);
else
d->mask &= ~(1 << (data & 3));
break;
- case 0xb: /* mode */
+ case 0x0b: /* mode */
{
ichan = data & 3;
#ifdef DEBUG_DMA
- int op;
- int ai;
- int dir;
- int opmode;
-
+ {
+ int op, ai, dir, opmode;
op = (data >> 2) & 3;
ai = (data >> 4) & 1;
dir = (data >> 5) & 1;
@@ -236,39 +235,39 @@ static void write_cont (void *opaque, uint32_t nport, uint32_t data)
linfo ("ichan %d, op %d, ai %d, dir %d, opmode %d\n",
ichan, op, ai, dir, opmode);
+ }
#endif
-
d->regs[ichan].mode = data;
break;
}
- case 0xc: /* clear flip flop */
+ case 0x0c: /* clear flip flop */
d->flip_flop = 0;
break;
- case 0xd: /* reset */
+ case 0x0d: /* reset */
d->flip_flop = 0;
d->mask = ~0;
d->status = 0;
d->command = 0;
break;
- case 0xe: /* clear mask for all channels */
+ case 0x0e: /* clear mask for all channels */
d->mask = 0;
break;
- case 0xf: /* write mask for all channels */
+ case 0x0f: /* write mask for all channels */
d->mask = data;
break;
default:
- log ("dma: unknown iport %#x\n", iport);
+ dolog ("unknown iport %#x\n", iport);
break;
}
#ifdef DEBUG_DMA
if (0xc != iport) {
- linfo ("nport %#06x, ichan % 2d, val %#06x\n",
+ linfo ("write_cont: nport %#06x, ichan % 2d, val %#06x\n",
nport, ichan, data);
}
#endif
@@ -278,20 +277,22 @@ static uint32_t read_cont (void *opaque, uint32_t nport)
{
struct dma_cont *d = opaque;
int iport, val;
-
+
iport = (nport >> d->dshift) & 0x0f;
switch (iport) {
- case 0x08: /* status */
+ case 0x08: /* status */
val = d->status;
d->status &= 0xf0;
break;
- case 0x0f: /* mask */
+ case 0x0f: /* mask */
val = d->mask;
break;
default:
val = 0;
break;
}
+
+ ldebug ("read_cont: nport %#06x, iport %#04x val %#x\n", nport, iport, val);
return val;
}
@@ -322,23 +323,27 @@ void DMA_release_DREQ (int nchan)
static void channel_run (int ncont, int ichan)
{
- struct dma_regs *r;
int n;
- target_ulong addr;
-/* int ai, dir; */
+ struct dma_regs *r = &dma_controllers[ncont].regs[ichan];
+#ifdef DEBUG_DMA
+ int dir, opmode;
- r = dma_controllers[ncont].regs + ichan;
-/* ai = r->mode & 16; */
-/* dir = r->mode & 32 ? -1 : 1; */
+ dir = (r->mode >> 5) & 1;
+ opmode = (r->mode >> 6) & 3;
- /* NOTE: pageh is only used by PPC PREP */
- addr = ((r->pageh & 0x7f) << 24) | (r->page << 16) | r->now[ADDR];
- n = r->transfer_handler (r->opaque, addr,
- (r->base[COUNT] << ncont) + (1 << ncont));
- r->now[COUNT] = n;
+ if (dir) {
+ dolog ("DMA in address decrement mode\n");
+ }
+ if (opmode != 1) {
+ dolog ("DMA not in single mode select %#x\n", opmode);
+ }
+#endif
- ldebug ("dma_pos %d size %d\n",
- n, (r->base[1] << ncont) + (1 << ncont));
+ r = dma_controllers[ncont].regs + ichan;
+ n = r->transfer_handler (r->opaque, ichan + (ncont << 2),
+ r->now[COUNT], (r->base[COUNT] + 1) << ncont);
+ r->now[COUNT] = n;
+ ldebug ("dma_pos %d size %d\n", n, (r->base[COUNT] + 1) << ncont);
}
void DMA_run (void)
@@ -361,7 +366,7 @@ void DMA_run (void)
}
void DMA_register_channel (int nchan,
- DMA_transfer_handler transfer_handler,
+ DMA_transfer_handler transfer_handler,
void *opaque)
{
struct dma_regs *r;
@@ -375,6 +380,50 @@ void DMA_register_channel (int nchan,
r->opaque = opaque;
}
+int DMA_read_memory (int nchan, void *buf, int pos, int len)
+{
+ struct dma_regs *r = &dma_controllers[nchan > 3].regs[nchan & 3];
+ target_ulong addr = ((r->pageh & 0x7f) << 24) | (r->page << 16) | r->now[ADDR];
+
+ if (r->mode & 0x20) {
+ int i;
+ uint8_t *p = buf;
+
+ cpu_physical_memory_read (addr - pos - len, buf, len);
+ /* What about 16bit transfers? */
+ for (i = 0; i < len >> 1; i++) {
+ uint8_t b = p[len - i - 1];
+ p[i] = b;
+ }
+ }
+ else
+ cpu_physical_memory_read (addr + pos, buf, len);
+
+ return len;
+}
+
+int DMA_write_memory (int nchan, void *buf, int pos, int len)
+{
+ struct dma_regs *r = &dma_controllers[nchan > 3].regs[nchan & 3];
+ target_ulong addr = ((r->pageh & 0x7f) << 24) | (r->page << 16) | r->now[ADDR];
+
+ if (r->mode & 0x20) {
+ int i;
+ uint8_t *p = buf;
+
+ cpu_physical_memory_write (addr - pos - len, buf, len);
+ /* What about 16bit transfers? */
+ for (i = 0; i < len; i++) {
+ uint8_t b = p[len - i - 1];
+ p[i] = b;
+ }
+ }
+ else
+ cpu_physical_memory_write (addr + pos, buf, len);
+
+ return len;
+}
+
/* request the emulator to transfer a new DMA memory block ASAP */
void DMA_schedule(int nchan)
{
@@ -388,7 +437,7 @@ static void dma_reset(void *opaque)
}
/* dshift = 0: 8 bit DMA, 1 = 16 bit DMA */
-static void dma_init2(struct dma_cont *d, int base, int dshift,
+static void dma_init2(struct dma_cont *d, int base, int dshift,
int page_base, int pageh_base)
{
const static int page_port_list[] = { 0x1, 0x2, 0x3, 0x7 };
@@ -400,31 +449,87 @@ static void dma_init2(struct dma_cont *d, int base, int dshift,
register_ioport_read (base + (i << dshift), 1, 1, read_chan, d);
}
for (i = 0; i < LENOFA (page_port_list); i++) {
- register_ioport_write (page_base + page_port_list[i], 1, 1,
+ register_ioport_write (page_base + page_port_list[i], 1, 1,
write_page, d);
- register_ioport_read (page_base + page_port_list[i], 1, 1,
+ register_ioport_read (page_base + page_port_list[i], 1, 1,
read_page, d);
if (pageh_base >= 0) {
- register_ioport_write (pageh_base + page_port_list[i], 1, 1,
+ register_ioport_write (pageh_base + page_port_list[i], 1, 1,
write_pageh, d);
- register_ioport_read (pageh_base + page_port_list[i], 1, 1,
+ register_ioport_read (pageh_base + page_port_list[i], 1, 1,
read_pageh, d);
}
}
for (i = 0; i < 8; i++) {
- register_ioport_write (base + ((i + 8) << dshift), 1, 1,
+ register_ioport_write (base + ((i + 8) << dshift), 1, 1,
write_cont, d);
- register_ioport_read (base + ((i + 8) << dshift), 1, 1,
+ register_ioport_read (base + ((i + 8) << dshift), 1, 1,
read_cont, d);
}
qemu_register_reset(dma_reset, d);
dma_reset(d);
}
+static void dma_save (QEMUFile *f, void *opaque)
+{
+ struct dma_cont *d = opaque;
+ int i;
+
+ /* qemu_put_8s (f, &d->status); */
+ qemu_put_8s (f, &d->command);
+ qemu_put_8s (f, &d->mask);
+ qemu_put_8s (f, &d->flip_flop);
+ qemu_put_be32s (f, &d->dshift);
+
+ for (i = 0; i < 4; ++i) {
+ struct dma_regs *r = &d->regs[i];
+ qemu_put_be32s (f, &r->now[0]);
+ qemu_put_be32s (f, &r->now[1]);
+ qemu_put_be16s (f, &r->base[0]);
+ qemu_put_be16s (f, &r->base[1]);
+ qemu_put_8s (f, &r->mode);
+ qemu_put_8s (f, &r->page);
+ qemu_put_8s (f, &r->pageh);
+ qemu_put_8s (f, &r->dack);
+ qemu_put_8s (f, &r->eop);
+ }
+}
+
+static int dma_load (QEMUFile *f, void *opaque, int version_id)
+{
+ struct dma_cont *d = opaque;
+ int i;
+
+ if (version_id != 1)
+ return -EINVAL;
+
+ /* qemu_get_8s (f, &d->status); */
+ qemu_get_8s (f, &d->command);
+ qemu_get_8s (f, &d->mask);
+ qemu_get_8s (f, &d->flip_flop);
+ qemu_get_be32s (f, &d->dshift);
+
+ for (i = 0; i < 4; ++i) {
+ struct dma_regs *r = &d->regs[i];
+ qemu_get_be32s (f, &r->now[0]);
+ qemu_get_be32s (f, &r->now[1]);
+ qemu_get_be16s (f, &r->base[0]);
+ qemu_get_be16s (f, &r->base[1]);
+ qemu_get_8s (f, &r->mode);
+ qemu_get_8s (f, &r->page);
+ qemu_get_8s (f, &r->pageh);
+ qemu_get_8s (f, &r->dack);
+ qemu_get_8s (f, &r->eop);
+ }
+ return 0;
+}
+
void DMA_init (int high_page_enable)
{
- dma_init2(&dma_controllers[0], 0x00, 0, 0x80,
+ dma_init2(&dma_controllers[0], 0x00, 0, 0x80,
high_page_enable ? 0x480 : -1);
dma_init2(&dma_controllers[1], 0xc0, 1, 0x88,
high_page_enable ? 0x488 : -1);
+ register_savevm ("dma", 0, 1, dma_save, dma_load, &dma_controllers[0]);
+ register_savevm ("dma", 1, 1, dma_save, dma_load, &dma_controllers[1]);
}
diff --git a/hw/fdc.c b/hw/fdc.c
index 9375b913c5..d512b1ca98 100644
--- a/hw/fdc.c
+++ b/hw/fdc.c
@@ -313,7 +313,8 @@ static void fd_reset (fdrive_t *drv)
static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq);
static void fdctrl_reset_fifo (fdctrl_t *fdctrl);
-static int fdctrl_transfer_handler (void *opaque, target_ulong addr, int size);
+static int fdctrl_transfer_handler (void *opaque, int nchan,
+ int dma_pos, int dma_len);
static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status);
static void fdctrl_result_timer(void *opaque);
@@ -908,7 +909,8 @@ static void fdctrl_start_transfer_del (fdctrl_t *fdctrl, int direction)
}
/* handlers for DMA transfers */
-static int fdctrl_transfer_handler (void *opaque, target_ulong addr, int size)
+static int fdctrl_transfer_handler (void *opaque, int nchan,
+ int dma_pos, int dma_len)
{
fdctrl_t *fdctrl;
fdrive_t *cur_drv;
@@ -924,8 +926,8 @@ static int fdctrl_transfer_handler (void *opaque, target_ulong addr, int size)
if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
fdctrl->data_dir == FD_DIR_SCANH)
status2 = 0x04;
- if (size > fdctrl->data_len)
- size = fdctrl->data_len;
+ if (dma_len > fdctrl->data_len)
+ dma_len = fdctrl->data_len;
if (cur_drv->bs == NULL) {
if (fdctrl->data_dir == FD_DIR_WRITE)
fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00);
@@ -935,8 +937,8 @@ static int fdctrl_transfer_handler (void *opaque, target_ulong addr, int size)
goto transfer_error;
}
rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
- for (start_pos = fdctrl->data_pos; fdctrl->data_pos < size;) {
- len = size - fdctrl->data_pos;
+ for (start_pos = fdctrl->data_pos; fdctrl->data_pos < dma_len;) {
+ len = dma_len - fdctrl->data_pos;
if (len + rel_pos > FD_SECTOR_LEN)
len = FD_SECTOR_LEN - rel_pos;
FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x %02x "
@@ -958,13 +960,17 @@ static int fdctrl_transfer_handler (void *opaque, target_ulong addr, int size)
switch (fdctrl->data_dir) {
case FD_DIR_READ:
/* READ commands */
- cpu_physical_memory_write(addr + fdctrl->data_pos,
- fdctrl->fifo + rel_pos, len);
+ DMA_write_memory (nchan, fdctrl->fifo + rel_pos,
+ fdctrl->data_pos, len);
+/* cpu_physical_memory_write(addr + fdctrl->data_pos, */
+/* fdctrl->fifo + rel_pos, len); */
break;
case FD_DIR_WRITE:
/* WRITE commands */
- cpu_physical_memory_read(addr + fdctrl->data_pos,
- fdctrl->fifo + rel_pos, len);
+ DMA_read_memory (nchan, fdctrl->fifo + rel_pos,
+ fdctrl->data_pos, len);
+/* cpu_physical_memory_read(addr + fdctrl->data_pos, */
+/* fdctrl->fifo + rel_pos, len); */
if (bdrv_write(cur_drv->bs, fd_sector(cur_drv),
fdctrl->fifo, 1) < 0) {
FLOPPY_ERROR("writting sector %d\n", fd_sector(cur_drv));
@@ -977,8 +983,9 @@ static int fdctrl_transfer_handler (void *opaque, target_ulong addr, int size)
{
uint8_t tmpbuf[FD_SECTOR_LEN];
int ret;
- cpu_physical_memory_read(addr + fdctrl->data_pos,
- tmpbuf, len);
+ DMA_read_memory (nchan, tmpbuf, fdctrl->data_pos, len);
+/* cpu_physical_memory_read(addr + fdctrl->data_pos, */
+/* tmpbuf, len); */
ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
if (ret == 0) {
status2 = 0x08;
diff --git a/hw/fmopl.c b/hw/fmopl.c
new file mode 100644
index 0000000000..2b0e82b0cc
--- /dev/null
+++ b/hw/fmopl.c
@@ -0,0 +1,1390 @@
+/*
+**
+** File: fmopl.c -- software implementation of FM sound generator
+**
+** Copyright (C) 1999,2000 Tatsuyuki Satoh , MultiArcadeMachineEmurator development
+**
+** Version 0.37a
+**
+*/
+
+/*
+ preliminary :
+ Problem :
+ note:
+*/
+
+/* This version of fmopl.c is a fork of the MAME one, relicensed under the LGPL.
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2.1 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#define INLINE __inline
+#define HAS_YM3812 1
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdarg.h>
+#include <math.h>
+//#include "driver.h" /* use M.A.M.E. */
+#include "fmopl.h"
+
+#ifndef PI
+#define PI 3.14159265358979323846
+#endif
+
+/* -------------------- for debug --------------------- */
+/* #define OPL_OUTPUT_LOG */
+#ifdef OPL_OUTPUT_LOG
+static FILE *opl_dbg_fp = NULL;
+static FM_OPL *opl_dbg_opl[16];
+static int opl_dbg_maxchip,opl_dbg_chip;
+#endif
+
+/* -------------------- preliminary define section --------------------- */
+/* attack/decay rate time rate */
+#define OPL_ARRATE 141280 /* RATE 4 = 2826.24ms @ 3.6MHz */
+#define OPL_DRRATE 1956000 /* RATE 4 = 39280.64ms @ 3.6MHz */
+
+#define DELTAT_MIXING_LEVEL (1) /* DELTA-T ADPCM MIXING LEVEL */
+
+#define FREQ_BITS 24 /* frequency turn */
+
+/* counter bits = 20 , octerve 7 */
+#define FREQ_RATE (1<<(FREQ_BITS-20))
+#define TL_BITS (FREQ_BITS+2)
+
+/* final output shift , limit minimum and maximum */
+#define OPL_OUTSB (TL_BITS+3-16) /* OPL output final shift 16bit */
+#define OPL_MAXOUT (0x7fff<<OPL_OUTSB)
+#define OPL_MINOUT (-0x8000<<OPL_OUTSB)
+
+/* -------------------- quality selection --------------------- */
+
+/* sinwave entries */
+/* used static memory = SIN_ENT * 4 (byte) */
+#define SIN_ENT 2048
+
+/* output level entries (envelope,sinwave) */
+/* envelope counter lower bits */
+#define ENV_BITS 16
+/* envelope output entries */
+#define EG_ENT 4096
+/* used dynamic memory = EG_ENT*4*4(byte)or EG_ENT*6*4(byte) */
+/* used static memory = EG_ENT*4 (byte) */
+
+#define EG_OFF ((2*EG_ENT)<<ENV_BITS) /* OFF */
+#define EG_DED EG_OFF
+#define EG_DST (EG_ENT<<ENV_BITS) /* DECAY START */
+#define EG_AED EG_DST
+#define EG_AST 0 /* ATTACK START */
+
+#define EG_STEP (96.0/EG_ENT) /* OPL is 0.1875 dB step */
+
+/* LFO table entries */
+#define VIB_ENT 512
+#define VIB_SHIFT (32-9)
+#define AMS_ENT 512
+#define AMS_SHIFT (32-9)
+
+#define VIB_RATE 256
+
+/* -------------------- local defines , macros --------------------- */
+
+/* register number to channel number , slot offset */
+#define SLOT1 0
+#define SLOT2 1
+
+/* envelope phase */
+#define ENV_MOD_RR 0x00
+#define ENV_MOD_DR 0x01
+#define ENV_MOD_AR 0x02
+
+/* -------------------- tables --------------------- */
+static const int slot_array[32]=
+{
+ 0, 2, 4, 1, 3, 5,-1,-1,
+ 6, 8,10, 7, 9,11,-1,-1,
+ 12,14,16,13,15,17,-1,-1,
+ -1,-1,-1,-1,-1,-1,-1,-1
+};
+
+/* key scale level */
+/* table is 3dB/OCT , DV converts this in TL step at 6dB/OCT */
+#define DV (EG_STEP/2)
+static const UINT32 KSL_TABLE[8*16]=
+{
+ /* OCT 0 */
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ /* OCT 1 */
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV,
+ 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV,
+ /* OCT 2 */
+ 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
+ 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV,
+ 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV,
+ 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV,
+ /* OCT 3 */
+ 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV,
+ 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV,
+ 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV,
+ 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV,
+ /* OCT 4 */
+ 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV,
+ 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV,
+ 9.000/DV, 9.750/DV,10.125/DV,10.500/DV,
+ 10.875/DV,11.250/DV,11.625/DV,12.000/DV,
+ /* OCT 5 */
+ 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV,
+ 9.000/DV,10.125/DV,10.875/DV,11.625/DV,
+ 12.000/DV,12.750/DV,13.125/DV,13.500/DV,
+ 13.875/DV,14.250/DV,14.625/DV,15.000/DV,
+ /* OCT 6 */
+ 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV,
+ 12.000/DV,13.125/DV,13.875/DV,14.625/DV,
+ 15.000/DV,15.750/DV,16.125/DV,16.500/DV,
+ 16.875/DV,17.250/DV,17.625/DV,18.000/DV,
+ /* OCT 7 */
+ 0.000/DV, 9.000/DV,12.000/DV,13.875/DV,
+ 15.000/DV,16.125/DV,16.875/DV,17.625/DV,
+ 18.000/DV,18.750/DV,19.125/DV,19.500/DV,
+ 19.875/DV,20.250/DV,20.625/DV,21.000/DV
+};
+#undef DV
+
+/* sustain lebel table (3db per step) */
+/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
+#define SC(db) (db*((3/EG_STEP)*(1<<ENV_BITS)))+EG_DST
+static const INT32 SL_TABLE[16]={
+ SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
+ SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(31)
+};
+#undef SC
+
+#define TL_MAX (EG_ENT*2) /* limit(tl + ksr + envelope) + sinwave */
+/* TotalLevel : 48 24 12 6 3 1.5 0.75 (dB) */
+/* TL_TABLE[ 0 to TL_MAX ] : plus section */
+/* TL_TABLE[ TL_MAX to TL_MAX+TL_MAX-1 ] : minus section */
+static INT32 *TL_TABLE;
+
+/* pointers to TL_TABLE with sinwave output offset */
+static INT32 **SIN_TABLE;
+
+/* LFO table */
+static INT32 *AMS_TABLE;
+static INT32 *VIB_TABLE;
+
+/* envelope output curve table */
+/* attack + decay + OFF */
+static INT32 ENV_CURVE[2*EG_ENT+1];
+
+/* multiple table */
+#define ML 2
+static const UINT32 MUL_TABLE[16]= {
+/* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,11,12,13,14,15 */
+ 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML,
+ 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML
+};
+#undef ML
+
+/* dummy attack / decay rate ( when rate == 0 ) */
+static INT32 RATE_0[16]=
+{0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
+
+/* -------------------- static state --------------------- */
+
+/* lock level of common table */
+static int num_lock = 0;
+
+/* work table */
+static void *cur_chip = NULL; /* current chip point */
+/* currenct chip state */
+/* static OPLSAMPLE *bufL,*bufR; */
+static OPL_CH *S_CH;
+static OPL_CH *E_CH;
+OPL_SLOT *SLOT7_1,*SLOT7_2,*SLOT8_1,*SLOT8_2;
+
+static INT32 outd[1];
+static INT32 ams;
+static INT32 vib;
+INT32 *ams_table;
+INT32 *vib_table;
+static INT32 amsIncr;
+static INT32 vibIncr;
+static INT32 feedback2; /* connect for SLOT 2 */
+
+/* log output level */
+#define LOG_ERR 3 /* ERROR */
+#define LOG_WAR 2 /* WARNING */
+#define LOG_INF 1 /* INFORMATION */
+
+//#define LOG_LEVEL LOG_INF
+#define LOG_LEVEL LOG_ERR
+
+//#define LOG(n,x) if( (n)>=LOG_LEVEL ) logerror x
+#define LOG(n,x)
+
+/* --------------------- subroutines --------------------- */
+
+INLINE int Limit( int val, int max, int min ) {
+ if ( val > max )
+ val = max;
+ else if ( val < min )
+ val = min;
+
+ return val;
+}
+
+/* status set and IRQ handling */
+INLINE void OPL_STATUS_SET(FM_OPL *OPL,int flag)
+{
+ /* set status flag */
+ OPL->status |= flag;
+ if(!(OPL->status & 0x80))
+ {
+ if(OPL->status & OPL->statusmask)
+ { /* IRQ on */
+ OPL->status |= 0x80;
+ /* callback user interrupt handler (IRQ is OFF to ON) */
+ if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,1);
+ }
+ }
+}
+
+/* status reset and IRQ handling */
+INLINE void OPL_STATUS_RESET(FM_OPL *OPL,int flag)
+{
+ /* reset status flag */
+ OPL->status &=~flag;
+ if((OPL->status & 0x80))
+ {
+ if (!(OPL->status & OPL->statusmask) )
+ {
+ OPL->status &= 0x7f;
+ /* callback user interrupt handler (IRQ is ON to OFF) */
+ if(OPL->IRQHandler) (OPL->IRQHandler)(OPL->IRQParam,0);
+ }
+ }
+}
+
+/* IRQ mask set */
+INLINE void OPL_STATUSMASK_SET(FM_OPL *OPL,int flag)
+{
+ OPL->statusmask = flag;
+ /* IRQ handling check */
+ OPL_STATUS_SET(OPL,0);
+ OPL_STATUS_RESET(OPL,0);
+}
+
+/* ----- key on ----- */
+INLINE void OPL_KEYON(OPL_SLOT *SLOT)
+{
+ /* sin wave restart */
+ SLOT->Cnt = 0;
+ /* set attack */
+ SLOT->evm = ENV_MOD_AR;
+ SLOT->evs = SLOT->evsa;
+ SLOT->evc = EG_AST;
+ SLOT->eve = EG_AED;
+}
+/* ----- key off ----- */
+INLINE void OPL_KEYOFF(OPL_SLOT *SLOT)
+{
+ if( SLOT->evm > ENV_MOD_RR)
+ {
+ /* set envelope counter from envleope output */
+ SLOT->evm = ENV_MOD_RR;
+ if( !(SLOT->evc&EG_DST) )
+ //SLOT->evc = (ENV_CURVE[SLOT->evc>>ENV_BITS]<<ENV_BITS) + EG_DST;
+ SLOT->evc = EG_DST;
+ SLOT->eve = EG_DED;
+ SLOT->evs = SLOT->evsr;
+ }
+}
+
+/* ---------- calcrate Envelope Generator & Phase Generator ---------- */
+/* return : envelope output */
+INLINE UINT32 OPL_CALC_SLOT( OPL_SLOT *SLOT )
+{
+ /* calcrate envelope generator */
+ if( (SLOT->evc+=SLOT->evs) >= SLOT->eve )
+ {
+ switch( SLOT->evm ){
+ case ENV_MOD_AR: /* ATTACK -> DECAY1 */
+ /* next DR */
+ SLOT->evm = ENV_MOD_DR;
+ SLOT->evc = EG_DST;
+ SLOT->eve = SLOT->SL;
+ SLOT->evs = SLOT->evsd;
+ break;
+ case ENV_MOD_DR: /* DECAY -> SL or RR */
+ SLOT->evc = SLOT->SL;
+ SLOT->eve = EG_DED;
+ if(SLOT->eg_typ)
+ {
+ SLOT->evs = 0;
+ }
+ else
+ {
+ SLOT->evm = ENV_MOD_RR;
+ SLOT->evs = SLOT->evsr;
+ }
+ break;
+ case ENV_MOD_RR: /* RR -> OFF */
+ SLOT->evc = EG_OFF;
+ SLOT->eve = EG_OFF+1;
+ SLOT->evs = 0;
+ break;
+ }
+ }
+ /* calcrate envelope */
+ return SLOT->TLL+ENV_CURVE[SLOT->evc>>ENV_BITS]+(SLOT->ams ? ams : 0);
+}
+
+/* set algorythm connection */
+static void set_algorythm( OPL_CH *CH)
+{
+ INT32 *carrier = &outd[0];
+ CH->connect1 = CH->CON ? carrier : &feedback2;
+ CH->connect2 = carrier;
+}
+
+/* ---------- frequency counter for operater update ---------- */
+INLINE void CALC_FCSLOT(OPL_CH *CH,OPL_SLOT *SLOT)
+{
+ int ksr;
+
+ /* frequency step counter */
+ SLOT->Incr = CH->fc * SLOT->mul;
+ ksr = CH->kcode >> SLOT->KSR;
+
+ if( SLOT->ksr != ksr )
+ {
+ SLOT->ksr = ksr;
+ /* attack , decay rate recalcration */
+ SLOT->evsa = SLOT->AR[ksr];
+ SLOT->evsd = SLOT->DR[ksr];
+ SLOT->evsr = SLOT->RR[ksr];
+ }
+ SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
+}
+
+/* set multi,am,vib,EG-TYP,KSR,mul */
+INLINE void set_mul(FM_OPL *OPL,int slot,int v)
+{
+ OPL_CH *CH = &OPL->P_CH[slot/2];
+ OPL_SLOT *SLOT = &CH->SLOT[slot&1];
+
+ SLOT->mul = MUL_TABLE[v&0x0f];
+ SLOT->KSR = (v&0x10) ? 0 : 2;
+ SLOT->eg_typ = (v&0x20)>>5;
+ SLOT->vib = (v&0x40);
+ SLOT->ams = (v&0x80);
+ CALC_FCSLOT(CH,SLOT);
+}
+
+/* set ksl & tl */
+INLINE void set_ksl_tl(FM_OPL *OPL,int slot,int v)
+{
+ OPL_CH *CH = &OPL->P_CH[slot/2];
+ OPL_SLOT *SLOT = &CH->SLOT[slot&1];
+ int ksl = v>>6; /* 0 / 1.5 / 3 / 6 db/OCT */
+
+ SLOT->ksl = ksl ? 3-ksl : 31;
+ SLOT->TL = (v&0x3f)*(0.75/EG_STEP); /* 0.75db step */
+
+ if( !(OPL->mode&0x80) )
+ { /* not CSM latch total level */
+ SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
+ }
+}
+
+/* set attack rate & decay rate */
+INLINE void set_ar_dr(FM_OPL *OPL,int slot,int v)
+{
+ OPL_CH *CH = &OPL->P_CH[slot/2];
+ OPL_SLOT *SLOT = &CH->SLOT[slot&1];
+ int ar = v>>4;
+ int dr = v&0x0f;
+
+ SLOT->AR = ar ? &OPL->AR_TABLE[ar<<2] : RATE_0;
+ SLOT->evsa = SLOT->AR[SLOT->ksr];
+ if( SLOT->evm == ENV_MOD_AR ) SLOT->evs = SLOT->evsa;
+
+ SLOT->DR = dr ? &OPL->DR_TABLE[dr<<2] : RATE_0;
+ SLOT->evsd = SLOT->DR[SLOT->ksr];
+ if( SLOT->evm == ENV_MOD_DR ) SLOT->evs = SLOT->evsd;
+}
+
+/* set sustain level & release rate */
+INLINE void set_sl_rr(FM_OPL *OPL,int slot,int v)
+{
+ OPL_CH *CH = &OPL->P_CH[slot/2];
+ OPL_SLOT *SLOT = &CH->SLOT[slot&1];
+ int sl = v>>4;
+ int rr = v & 0x0f;
+
+ SLOT->SL = SL_TABLE[sl];
+ if( SLOT->evm == ENV_MOD_DR ) SLOT->eve = SLOT->SL;
+ SLOT->RR = &OPL->DR_TABLE[rr<<2];
+ SLOT->evsr = SLOT->RR[SLOT->ksr];
+ if( SLOT->evm == ENV_MOD_RR ) SLOT->evs = SLOT->evsr;
+}
+
+/* operator output calcrator */
+#define OP_OUT(slot,env,con) slot->wavetable[((slot->Cnt+con)/(0x1000000/SIN_ENT))&(SIN_ENT-1)][env]
+/* ---------- calcrate one of channel ---------- */
+INLINE void OPL_CALC_CH( OPL_CH *CH )
+{
+ UINT32 env_out;
+ OPL_SLOT *SLOT;
+
+ feedback2 = 0;
+ /* SLOT 1 */
+ SLOT = &CH->SLOT[SLOT1];
+ env_out=OPL_CALC_SLOT(SLOT);
+ if( env_out < EG_ENT-1 )
+ {
+ /* PG */
+ if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
+ else SLOT->Cnt += SLOT->Incr;
+ /* connectoion */
+ if(CH->FB)
+ {
+ int feedback1 = (CH->op1_out[0]+CH->op1_out[1])>>CH->FB;
+ CH->op1_out[1] = CH->op1_out[0];
+ *CH->connect1 += CH->op1_out[0] = OP_OUT(SLOT,env_out,feedback1);
+ }
+ else
+ {
+ *CH->connect1 += OP_OUT(SLOT,env_out,0);
+ }
+ }else
+ {
+ CH->op1_out[1] = CH->op1_out[0];
+ CH->op1_out[0] = 0;
+ }
+ /* SLOT 2 */
+ SLOT = &CH->SLOT[SLOT2];
+ env_out=OPL_CALC_SLOT(SLOT);
+ if( env_out < EG_ENT-1 )
+ {
+ /* PG */
+ if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
+ else SLOT->Cnt += SLOT->Incr;
+ /* connectoion */
+ outd[0] += OP_OUT(SLOT,env_out, feedback2);
+ }
+}
+
+/* ---------- calcrate rythm block ---------- */
+#define WHITE_NOISE_db 6.0
+INLINE void OPL_CALC_RH( OPL_CH *CH )
+{
+ UINT32 env_tam,env_sd,env_top,env_hh;
+ int whitenoise = (rand()&1)*(WHITE_NOISE_db/EG_STEP);
+ INT32 tone8;
+
+ OPL_SLOT *SLOT;
+ int env_out;
+
+ /* BD : same as FM serial mode and output level is large */
+ feedback2 = 0;
+ /* SLOT 1 */
+ SLOT = &CH[6].SLOT[SLOT1];
+ env_out=OPL_CALC_SLOT(SLOT);
+ if( env_out < EG_ENT-1 )
+ {
+ /* PG */
+ if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
+ else SLOT->Cnt += SLOT->Incr;
+ /* connectoion */
+ if(CH[6].FB)
+ {
+ int feedback1 = (CH[6].op1_out[0]+CH[6].op1_out[1])>>CH[6].FB;
+ CH[6].op1_out[1] = CH[6].op1_out[0];
+ feedback2 = CH[6].op1_out[0] = OP_OUT(SLOT,env_out,feedback1);
+ }
+ else
+ {
+ feedback2 = OP_OUT(SLOT,env_out,0);
+ }
+ }else
+ {
+ feedback2 = 0;
+ CH[6].op1_out[1] = CH[6].op1_out[0];
+ CH[6].op1_out[0] = 0;
+ }
+ /* SLOT 2 */
+ SLOT = &CH[6].SLOT[SLOT2];
+ env_out=OPL_CALC_SLOT(SLOT);
+ if( env_out < EG_ENT-1 )
+ {
+ /* PG */
+ if(SLOT->vib) SLOT->Cnt += (SLOT->Incr*vib/VIB_RATE);
+ else SLOT->Cnt += SLOT->Incr;
+ /* connectoion */
+ outd[0] += OP_OUT(SLOT,env_out, feedback2)*2;
+ }
+
+ // SD (17) = mul14[fnum7] + white noise
+ // TAM (15) = mul15[fnum8]
+ // TOP (18) = fnum6(mul18[fnum8]+whitenoise)
+ // HH (14) = fnum7(mul18[fnum8]+whitenoise) + white noise
+ env_sd =OPL_CALC_SLOT(SLOT7_2) + whitenoise;
+ env_tam=OPL_CALC_SLOT(SLOT8_1);
+ env_top=OPL_CALC_SLOT(SLOT8_2);
+ env_hh =OPL_CALC_SLOT(SLOT7_1) + whitenoise;
+
+ /* PG */
+ if(SLOT7_1->vib) SLOT7_1->Cnt += (2*SLOT7_1->Incr*vib/VIB_RATE);
+ else SLOT7_1->Cnt += 2*SLOT7_1->Incr;
+ if(SLOT7_2->vib) SLOT7_2->Cnt += ((CH[7].fc*8)*vib/VIB_RATE);
+ else SLOT7_2->Cnt += (CH[7].fc*8);
+ if(SLOT8_1->vib) SLOT8_1->Cnt += (SLOT8_1->Incr*vib/VIB_RATE);
+ else SLOT8_1->Cnt += SLOT8_1->Incr;
+ if(SLOT8_2->vib) SLOT8_2->Cnt += ((CH[8].fc*48)*vib/VIB_RATE);
+ else SLOT8_2->Cnt += (CH[8].fc*48);
+
+ tone8 = OP_OUT(SLOT8_2,whitenoise,0 );
+
+ /* SD */
+ if( env_sd < EG_ENT-1 )
+ outd[0] += OP_OUT(SLOT7_1,env_sd, 0)*8;
+ /* TAM */
+ if( env_tam < EG_ENT-1 )
+ outd[0] += OP_OUT(SLOT8_1,env_tam, 0)*2;
+ /* TOP-CY */
+ if( env_top < EG_ENT-1 )
+ outd[0] += OP_OUT(SLOT7_2,env_top,tone8)*2;
+ /* HH */
+ if( env_hh < EG_ENT-1 )
+ outd[0] += OP_OUT(SLOT7_2,env_hh,tone8)*2;
+}
+
+/* ----------- initialize time tabls ----------- */
+static void init_timetables( FM_OPL *OPL , int ARRATE , int DRRATE )
+{
+ int i;
+ double rate;
+
+ /* make attack rate & decay rate tables */
+ for (i = 0;i < 4;i++) OPL->AR_TABLE[i] = OPL->DR_TABLE[i] = 0;
+ for (i = 4;i <= 60;i++){
+ rate = OPL->freqbase; /* frequency rate */
+ if( i < 60 ) rate *= 1.0+(i&3)*0.25; /* b0-1 : x1 , x1.25 , x1.5 , x1.75 */
+ rate *= 1<<((i>>2)-1); /* b2-5 : shift bit */
+ rate *= (double)(EG_ENT<<ENV_BITS);
+ OPL->AR_TABLE[i] = rate / ARRATE;
+ OPL->DR_TABLE[i] = rate / DRRATE;
+ }
+ for (i = 60;i < 76;i++)
+ {
+ OPL->AR_TABLE[i] = EG_AED-1;
+ OPL->DR_TABLE[i] = OPL->DR_TABLE[60];
+ }
+#if 0
+ for (i = 0;i < 64 ;i++){ /* make for overflow area */
+ LOG(LOG_WAR,("rate %2d , ar %f ms , dr %f ms \n",i,
+ ((double)(EG_ENT<<ENV_BITS) / OPL->AR_TABLE[i]) * (1000.0 / OPL->rate),
+ ((double)(EG_ENT<<ENV_BITS) / OPL->DR_TABLE[i]) * (1000.0 / OPL->rate) ));
+ }
+#endif
+}
+
+/* ---------- generic table initialize ---------- */
+static int OPLOpenTable( void )
+{
+ int s,t;
+ double rate;
+ int i,j;
+ double pom;
+
+ /* allocate dynamic tables */
+ if( (TL_TABLE = malloc(TL_MAX*2*sizeof(INT32))) == NULL)
+ return 0;
+ if( (SIN_TABLE = malloc(SIN_ENT*4 *sizeof(INT32 *))) == NULL)
+ {
+ free(TL_TABLE);
+ return 0;
+ }
+ if( (AMS_TABLE = malloc(AMS_ENT*2 *sizeof(INT32))) == NULL)
+ {
+ free(TL_TABLE);
+ free(SIN_TABLE);
+ return 0;
+ }
+ if( (VIB_TABLE = malloc(VIB_ENT*2 *sizeof(INT32))) == NULL)
+ {
+ free(TL_TABLE);
+ free(SIN_TABLE);
+ free(AMS_TABLE);
+ return 0;
+ }
+ /* make total level table */
+ for (t = 0;t < EG_ENT-1 ;t++){
+ rate = ((1<<TL_BITS)-1)/pow(10,EG_STEP*t/20); /* dB -> voltage */
+ TL_TABLE[ t] = (int)rate;
+ TL_TABLE[TL_MAX+t] = -TL_TABLE[t];
+/* LOG(LOG_INF,("TotalLevel(%3d) = %x\n",t,TL_TABLE[t]));*/
+ }
+ /* fill volume off area */
+ for ( t = EG_ENT-1; t < TL_MAX ;t++){
+ TL_TABLE[t] = TL_TABLE[TL_MAX+t] = 0;
+ }
+
+ /* make sinwave table (total level offet) */
+ /* degree 0 = degree 180 = off */
+ SIN_TABLE[0] = SIN_TABLE[SIN_ENT/2] = &TL_TABLE[EG_ENT-1];
+ for (s = 1;s <= SIN_ENT/4;s++){
+ pom = sin(2*PI*s/SIN_ENT); /* sin */
+ pom = 20*log10(1/pom); /* decibel */
+ j = pom / EG_STEP; /* TL_TABLE steps */
+
+ /* degree 0 - 90 , degree 180 - 90 : plus section */
+ SIN_TABLE[ s] = SIN_TABLE[SIN_ENT/2-s] = &TL_TABLE[j];
+ /* degree 180 - 270 , degree 360 - 270 : minus section */
+ SIN_TABLE[SIN_ENT/2+s] = SIN_TABLE[SIN_ENT -s] = &TL_TABLE[TL_MAX+j];
+/* LOG(LOG_INF,("sin(%3d) = %f:%f db\n",s,pom,(double)j * EG_STEP));*/
+ }
+ for (s = 0;s < SIN_ENT;s++)
+ {
+ SIN_TABLE[SIN_ENT*1+s] = s<(SIN_ENT/2) ? SIN_TABLE[s] : &TL_TABLE[EG_ENT];
+ SIN_TABLE[SIN_ENT*2+s] = SIN_TABLE[s % (SIN_ENT/2)];
+ SIN_TABLE[SIN_ENT*3+s] = (s/(SIN_ENT/4))&1 ? &TL_TABLE[EG_ENT] : SIN_TABLE[SIN_ENT*2+s];
+ }
+
+ /* envelope counter -> envelope output table */
+ for (i=0; i<EG_ENT; i++)
+ {
+ /* ATTACK curve */
+ pom = pow( ((double)(EG_ENT-1-i)/EG_ENT) , 8 ) * EG_ENT;
+ /* if( pom >= EG_ENT ) pom = EG_ENT-1; */
+ ENV_CURVE[i] = (int)pom;
+ /* DECAY ,RELEASE curve */
+ ENV_CURVE[(EG_DST>>ENV_BITS)+i]= i;
+ }
+ /* off */
+ ENV_CURVE[EG_OFF>>ENV_BITS]= EG_ENT-1;
+ /* make LFO ams table */
+ for (i=0; i<AMS_ENT; i++)
+ {
+ pom = (1.0+sin(2*PI*i/AMS_ENT))/2; /* sin */
+ AMS_TABLE[i] = (1.0/EG_STEP)*pom; /* 1dB */
+ AMS_TABLE[AMS_ENT+i] = (4.8/EG_STEP)*pom; /* 4.8dB */
+ }
+ /* make LFO vibrate table */
+ for (i=0; i<VIB_ENT; i++)
+ {
+ /* 100cent = 1seminote = 6% ?? */
+ pom = (double)VIB_RATE*0.06*sin(2*PI*i/VIB_ENT); /* +-100sect step */
+ VIB_TABLE[i] = VIB_RATE + (pom*0.07); /* +- 7cent */
+ VIB_TABLE[VIB_ENT+i] = VIB_RATE + (pom*0.14); /* +-14cent */
+ /* LOG(LOG_INF,("vib %d=%d\n",i,VIB_TABLE[VIB_ENT+i])); */
+ }
+ return 1;
+}
+
+
+static void OPLCloseTable( void )
+{
+ free(TL_TABLE);
+ free(SIN_TABLE);
+ free(AMS_TABLE);
+ free(VIB_TABLE);
+}
+
+/* CSM Key Controll */
+INLINE void CSMKeyControll(OPL_CH *CH)
+{
+ OPL_SLOT *slot1 = &CH->SLOT[SLOT1];
+ OPL_SLOT *slot2 = &CH->SLOT[SLOT2];
+ /* all key off */
+ OPL_KEYOFF(slot1);
+ OPL_KEYOFF(slot2);
+ /* total level latch */
+ slot1->TLL = slot1->TL + (CH->ksl_base>>slot1->ksl);
+ slot1->TLL = slot1->TL + (CH->ksl_base>>slot1->ksl);
+ /* key on */
+ CH->op1_out[0] = CH->op1_out[1] = 0;
+ OPL_KEYON(slot1);
+ OPL_KEYON(slot2);
+}
+
+/* ---------- opl initialize ---------- */
+static void OPL_initalize(FM_OPL *OPL)
+{
+ int fn;
+
+ /* frequency base */
+ OPL->freqbase = (OPL->rate) ? ((double)OPL->clock / OPL->rate) / 72 : 0;
+ /* Timer base time */
+ OPL->TimerBase = 1.0/((double)OPL->clock / 72.0 );
+ /* make time tables */
+ init_timetables( OPL , OPL_ARRATE , OPL_DRRATE );
+ /* make fnumber -> increment counter table */
+ for( fn=0 ; fn < 1024 ; fn++ )
+ {
+ OPL->FN_TABLE[fn] = OPL->freqbase * fn * FREQ_RATE * (1<<7) / 2;
+ }
+ /* LFO freq.table */
+ OPL->amsIncr = OPL->rate ? (double)AMS_ENT*(1<<AMS_SHIFT) / OPL->rate * 3.7 * ((double)OPL->clock/3600000) : 0;
+ OPL->vibIncr = OPL->rate ? (double)VIB_ENT*(1<<VIB_SHIFT) / OPL->rate * 6.4 * ((double)OPL->clock/3600000) : 0;
+}
+
+/* ---------- write a OPL registers ---------- */
+static void OPLWriteReg(FM_OPL *OPL, int r, int v)
+{
+ OPL_CH *CH;
+ int slot;
+ int block_fnum;
+
+ switch(r&0xe0)
+ {
+ case 0x00: /* 00-1f:controll */
+ switch(r&0x1f)
+ {
+ case 0x01:
+ /* wave selector enable */
+ if(OPL->type&OPL_TYPE_WAVESEL)
+ {
+ OPL->wavesel = v&0x20;
+ if(!OPL->wavesel)
+ {
+ /* preset compatible mode */
+ int c;
+ for(c=0;c<OPL->max_ch;c++)
+ {
+ OPL->P_CH[c].SLOT[SLOT1].wavetable = &SIN_TABLE[0];
+ OPL->P_CH[c].SLOT[SLOT2].wavetable = &SIN_TABLE[0];
+ }
+ }
+ }
+ return;
+ case 0x02: /* Timer 1 */
+ OPL->T[0] = (256-v)*4;
+ break;
+ case 0x03: /* Timer 2 */
+ OPL->T[1] = (256-v)*16;
+ return;
+ case 0x04: /* IRQ clear / mask and Timer enable */
+ if(v&0x80)
+ { /* IRQ flag clear */
+ OPL_STATUS_RESET(OPL,0x7f);
+ }
+ else
+ { /* set IRQ mask ,timer enable*/
+ UINT8 st1 = v&1;
+ UINT8 st2 = (v>>1)&1;
+ /* IRQRST,T1MSK,t2MSK,EOSMSK,BRMSK,x,ST2,ST1 */
+ OPL_STATUS_RESET(OPL,v&0x78);
+ OPL_STATUSMASK_SET(OPL,((~v)&0x78)|0x01);
+ /* timer 2 */
+ if(OPL->st[1] != st2)
+ {
+ double interval = st2 ? (double)OPL->T[1]*OPL->TimerBase : 0.0;
+ OPL->st[1] = st2;
+ if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+1,interval);
+ }
+ /* timer 1 */
+ if(OPL->st[0] != st1)
+ {
+ double interval = st1 ? (double)OPL->T[0]*OPL->TimerBase : 0.0;
+ OPL->st[0] = st1;
+ if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+0,interval);
+ }
+ }
+ return;
+#if BUILD_Y8950
+ case 0x06: /* Key Board OUT */
+ if(OPL->type&OPL_TYPE_KEYBOARD)
+ {
+ if(OPL->keyboardhandler_w)
+ OPL->keyboardhandler_w(OPL->keyboard_param,v);
+ else
+ LOG(LOG_WAR,("OPL:write unmapped KEYBOARD port\n"));
+ }
+ return;
+ case 0x07: /* DELTA-T controll : START,REC,MEMDATA,REPT,SPOFF,x,x,RST */
+ if(OPL->type&OPL_TYPE_ADPCM)
+ YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v);
+ return;
+ case 0x08: /* MODE,DELTA-T : CSM,NOTESEL,x,x,smpl,da/ad,64k,rom */
+ OPL->mode = v;
+ v&=0x1f; /* for DELTA-T unit */
+ case 0x09: /* START ADD */
+ case 0x0a:
+ case 0x0b: /* STOP ADD */
+ case 0x0c:
+ case 0x0d: /* PRESCALE */
+ case 0x0e:
+ case 0x0f: /* ADPCM data */
+ case 0x10: /* DELTA-N */
+ case 0x11: /* DELTA-N */
+ case 0x12: /* EG-CTRL */
+ if(OPL->type&OPL_TYPE_ADPCM)
+ YM_DELTAT_ADPCM_Write(OPL->deltat,r-0x07,v);
+ return;
+#if 0
+ case 0x15: /* DAC data */
+ case 0x16:
+ case 0x17: /* SHIFT */
+ return;
+ case 0x18: /* I/O CTRL (Direction) */
+ if(OPL->type&OPL_TYPE_IO)
+ OPL->portDirection = v&0x0f;
+ return;
+ case 0x19: /* I/O DATA */
+ if(OPL->type&OPL_TYPE_IO)
+ {
+ OPL->portLatch = v;
+ if(OPL->porthandler_w)
+ OPL->porthandler_w(OPL->port_param,v&OPL->portDirection);
+ }
+ return;
+ case 0x1a: /* PCM data */
+ return;
+#endif
+#endif
+ }
+ break;
+ case 0x20: /* am,vib,ksr,eg type,mul */
+ slot = slot_array[r&0x1f];
+ if(slot == -1) return;
+ set_mul(OPL,slot,v);
+ return;
+ case 0x40:
+ slot = slot_array[r&0x1f];
+ if(slot == -1) return;
+ set_ksl_tl(OPL,slot,v);
+ return;
+ case 0x60:
+ slot = slot_array[r&0x1f];
+ if(slot == -1) return;
+ set_ar_dr(OPL,slot,v);
+ return;
+ case 0x80:
+ slot = slot_array[r&0x1f];
+ if(slot == -1) return;
+ set_sl_rr(OPL,slot,v);
+ return;
+ case 0xa0:
+ switch(r)
+ {
+ case 0xbd:
+ /* amsep,vibdep,r,bd,sd,tom,tc,hh */
+ {
+ UINT8 rkey = OPL->rythm^v;
+ OPL->ams_table = &AMS_TABLE[v&0x80 ? AMS_ENT : 0];
+ OPL->vib_table = &VIB_TABLE[v&0x40 ? VIB_ENT : 0];
+ OPL->rythm = v&0x3f;
+ if(OPL->rythm&0x20)
+ {
+#if 0
+ usrintf_showmessage("OPL Rythm mode select");
+#endif
+ /* BD key on/off */
+ if(rkey&0x10)
+ {
+ if(v&0x10)
+ {
+ OPL->P_CH[6].op1_out[0] = OPL->P_CH[6].op1_out[1] = 0;
+ OPL_KEYON(&OPL->P_CH[6].SLOT[SLOT1]);
+ OPL_KEYON(&OPL->P_CH[6].SLOT[SLOT2]);
+ }
+ else
+ {
+ OPL_KEYOFF(&OPL->P_CH[6].SLOT[SLOT1]);
+ OPL_KEYOFF(&OPL->P_CH[6].SLOT[SLOT2]);
+ }
+ }
+ /* SD key on/off */
+ if(rkey&0x08)
+ {
+ if(v&0x08) OPL_KEYON(&OPL->P_CH[7].SLOT[SLOT2]);
+ else OPL_KEYOFF(&OPL->P_CH[7].SLOT[SLOT2]);
+ }/* TAM key on/off */
+ if(rkey&0x04)
+ {
+ if(v&0x04) OPL_KEYON(&OPL->P_CH[8].SLOT[SLOT1]);
+ else OPL_KEYOFF(&OPL->P_CH[8].SLOT[SLOT1]);
+ }
+ /* TOP-CY key on/off */
+ if(rkey&0x02)
+ {
+ if(v&0x02) OPL_KEYON(&OPL->P_CH[8].SLOT[SLOT2]);
+ else OPL_KEYOFF(&OPL->P_CH[8].SLOT[SLOT2]);
+ }
+ /* HH key on/off */
+ if(rkey&0x01)
+ {
+ if(v&0x01) OPL_KEYON(&OPL->P_CH[7].SLOT[SLOT1]);
+ else OPL_KEYOFF(&OPL->P_CH[7].SLOT[SLOT1]);
+ }
+ }
+ }
+ return;
+ }
+ /* keyon,block,fnum */
+ if( (r&0x0f) > 8) return;
+ CH = &OPL->P_CH[r&0x0f];
+ if(!(r&0x10))
+ { /* a0-a8 */
+ block_fnum = (CH->block_fnum&0x1f00) | v;
+ }
+ else
+ { /* b0-b8 */
+ int keyon = (v>>5)&1;
+ block_fnum = ((v&0x1f)<<8) | (CH->block_fnum&0xff);
+ if(CH->keyon != keyon)
+ {
+ if( (CH->keyon=keyon) )
+ {
+ CH->op1_out[0] = CH->op1_out[1] = 0;
+ OPL_KEYON(&CH->SLOT[SLOT1]);
+ OPL_KEYON(&CH->SLOT[SLOT2]);
+ }
+ else
+ {
+ OPL_KEYOFF(&CH->SLOT[SLOT1]);
+ OPL_KEYOFF(&CH->SLOT[SLOT2]);
+ }
+ }
+ }
+ /* update */
+ if(CH->block_fnum != block_fnum)
+ {
+ int blockRv = 7-(block_fnum>>10);
+ int fnum = block_fnum&0x3ff;
+ CH->block_fnum = block_fnum;
+
+ CH->ksl_base = KSL_TABLE[block_fnum>>6];
+ CH->fc = OPL->FN_TABLE[fnum]>>blockRv;
+ CH->kcode = CH->block_fnum>>9;
+ if( (OPL->mode&0x40) && CH->block_fnum&0x100) CH->kcode |=1;
+ CALC_FCSLOT(CH,&CH->SLOT[SLOT1]);
+ CALC_FCSLOT(CH,&CH->SLOT[SLOT2]);
+ }
+ return;
+ case 0xc0:
+ /* FB,C */
+ if( (r&0x0f) > 8) return;
+ CH = &OPL->P_CH[r&0x0f];
+ {
+ int feedback = (v>>1)&7;
+ CH->FB = feedback ? (8+1) - feedback : 0;
+ CH->CON = v&1;
+ set_algorythm(CH);
+ }
+ return;
+ case 0xe0: /* wave type */
+ slot = slot_array[r&0x1f];
+ if(slot == -1) return;
+ CH = &OPL->P_CH[slot/2];
+ if(OPL->wavesel)
+ {
+ /* LOG(LOG_INF,("OPL SLOT %d wave select %d\n",slot,v&3)); */
+ CH->SLOT[slot&1].wavetable = &SIN_TABLE[(v&0x03)*SIN_ENT];
+ }
+ return;
+ }
+}
+
+/* lock/unlock for common table */
+static int OPL_LockTable(void)
+{
+ num_lock++;
+ if(num_lock>1) return 0;
+ /* first time */
+ cur_chip = NULL;
+ /* allocate total level table (128kb space) */
+ if( !OPLOpenTable() )
+ {
+ num_lock--;
+ return -1;
+ }
+ return 0;
+}
+
+static void OPL_UnLockTable(void)
+{
+ if(num_lock) num_lock--;
+ if(num_lock) return;
+ /* last time */
+ cur_chip = NULL;
+ OPLCloseTable();
+}
+
+#if (BUILD_YM3812 || BUILD_YM3526)
+/*******************************************************************************/
+/* YM3812 local section */
+/*******************************************************************************/
+
+/* ---------- update one of chip ----------- */
+void YM3812UpdateOne(FM_OPL *OPL, INT16 *buffer, int length)
+{
+ int i;
+ int data;
+ OPLSAMPLE *buf = buffer;
+ UINT32 amsCnt = OPL->amsCnt;
+ UINT32 vibCnt = OPL->vibCnt;
+ UINT8 rythm = OPL->rythm&0x20;
+ OPL_CH *CH,*R_CH;
+
+ if( (void *)OPL != cur_chip ){
+ cur_chip = (void *)OPL;
+ /* channel pointers */
+ S_CH = OPL->P_CH;
+ E_CH = &S_CH[9];
+ /* rythm slot */
+ SLOT7_1 = &S_CH[7].SLOT[SLOT1];
+ SLOT7_2 = &S_CH[7].SLOT[SLOT2];
+ SLOT8_1 = &S_CH[8].SLOT[SLOT1];
+ SLOT8_2 = &S_CH[8].SLOT[SLOT2];
+ /* LFO state */
+ amsIncr = OPL->amsIncr;
+ vibIncr = OPL->vibIncr;
+ ams_table = OPL->ams_table;
+ vib_table = OPL->vib_table;
+ }
+ R_CH = rythm ? &S_CH[6] : E_CH;
+ for( i=0; i < length ; i++ )
+ {
+ /* channel A channel B channel C */
+ /* LFO */
+ ams = ams_table[(amsCnt+=amsIncr)>>AMS_SHIFT];
+ vib = vib_table[(vibCnt+=vibIncr)>>VIB_SHIFT];
+ outd[0] = 0;
+ /* FM part */
+ for(CH=S_CH ; CH < R_CH ; CH++)
+ OPL_CALC_CH(CH);
+ /* Rythn part */
+ if(rythm)
+ OPL_CALC_RH(S_CH);
+ /* limit check */
+ data = Limit( outd[0] , OPL_MAXOUT, OPL_MINOUT );
+ /* store to sound buffer */
+ buf[i] = data >> OPL_OUTSB;
+ }
+
+ OPL->amsCnt = amsCnt;
+ OPL->vibCnt = vibCnt;
+#ifdef OPL_OUTPUT_LOG
+ if(opl_dbg_fp)
+ {
+ for(opl_dbg_chip=0;opl_dbg_chip<opl_dbg_maxchip;opl_dbg_chip++)
+ if( opl_dbg_opl[opl_dbg_chip] == OPL) break;
+ fprintf(opl_dbg_fp,"%c%c%c",0x20+opl_dbg_chip,length&0xff,length/256);
+ }
+#endif
+}
+#endif /* (BUILD_YM3812 || BUILD_YM3526) */
+
+#if BUILD_Y8950
+
+void Y8950UpdateOne(FM_OPL *OPL, INT16 *buffer, int length)
+{
+ int i;
+ int data;
+ OPLSAMPLE *buf = buffer;
+ UINT32 amsCnt = OPL->amsCnt;
+ UINT32 vibCnt = OPL->vibCnt;
+ UINT8 rythm = OPL->rythm&0x20;
+ OPL_CH *CH,*R_CH;
+ YM_DELTAT *DELTAT = OPL->deltat;
+
+ /* setup DELTA-T unit */
+ YM_DELTAT_DECODE_PRESET(DELTAT);
+
+ if( (void *)OPL != cur_chip ){
+ cur_chip = (void *)OPL;
+ /* channel pointers */
+ S_CH = OPL->P_CH;
+ E_CH = &S_CH[9];
+ /* rythm slot */
+ SLOT7_1 = &S_CH[7].SLOT[SLOT1];
+ SLOT7_2 = &S_CH[7].SLOT[SLOT2];
+ SLOT8_1 = &S_CH[8].SLOT[SLOT1];
+ SLOT8_2 = &S_CH[8].SLOT[SLOT2];
+ /* LFO state */
+ amsIncr = OPL->amsIncr;
+ vibIncr = OPL->vibIncr;
+ ams_table = OPL->ams_table;
+ vib_table = OPL->vib_table;
+ }
+ R_CH = rythm ? &S_CH[6] : E_CH;
+ for( i=0; i < length ; i++ )
+ {
+ /* channel A channel B channel C */
+ /* LFO */
+ ams = ams_table[(amsCnt+=amsIncr)>>AMS_SHIFT];
+ vib = vib_table[(vibCnt+=vibIncr)>>VIB_SHIFT];
+ outd[0] = 0;
+ /* deltaT ADPCM */
+ if( DELTAT->portstate )
+ YM_DELTAT_ADPCM_CALC(DELTAT);
+ /* FM part */
+ for(CH=S_CH ; CH < R_CH ; CH++)
+ OPL_CALC_CH(CH);
+ /* Rythn part */
+ if(rythm)
+ OPL_CALC_RH(S_CH);
+ /* limit check */
+ data = Limit( outd[0] , OPL_MAXOUT, OPL_MINOUT );
+ /* store to sound buffer */
+ buf[i] = data >> OPL_OUTSB;
+ }
+ OPL->amsCnt = amsCnt;
+ OPL->vibCnt = vibCnt;
+ /* deltaT START flag */
+ if( !DELTAT->portstate )
+ OPL->status &= 0xfe;
+}
+#endif
+
+/* ---------- reset one of chip ---------- */
+void OPLResetChip(FM_OPL *OPL)
+{
+ int c,s;
+ int i;
+
+ /* reset chip */
+ OPL->mode = 0; /* normal mode */
+ OPL_STATUS_RESET(OPL,0x7f);
+ /* reset with register write */
+ OPLWriteReg(OPL,0x01,0); /* wabesel disable */
+ OPLWriteReg(OPL,0x02,0); /* Timer1 */
+ OPLWriteReg(OPL,0x03,0); /* Timer2 */
+ OPLWriteReg(OPL,0x04,0); /* IRQ mask clear */
+ for(i = 0xff ; i >= 0x20 ; i-- ) OPLWriteReg(OPL,i,0);
+ /* reset OPerator paramater */
+ for( c = 0 ; c < OPL->max_ch ; c++ )
+ {
+ OPL_CH *CH = &OPL->P_CH[c];
+ /* OPL->P_CH[c].PAN = OPN_CENTER; */
+ for(s = 0 ; s < 2 ; s++ )
+ {
+ /* wave table */
+ CH->SLOT[s].wavetable = &SIN_TABLE[0];
+ /* CH->SLOT[s].evm = ENV_MOD_RR; */
+ CH->SLOT[s].evc = EG_OFF;
+ CH->SLOT[s].eve = EG_OFF+1;
+ CH->SLOT[s].evs = 0;
+ }
+ }
+#if BUILD_Y8950
+ if(OPL->type&OPL_TYPE_ADPCM)
+ {
+ YM_DELTAT *DELTAT = OPL->deltat;
+
+ DELTAT->freqbase = OPL->freqbase;
+ DELTAT->output_pointer = outd;
+ DELTAT->portshift = 5;
+ DELTAT->output_range = DELTAT_MIXING_LEVEL<<TL_BITS;
+ YM_DELTAT_ADPCM_Reset(DELTAT,0);
+ }
+#endif
+}
+
+/* ---------- Create one of vietual YM3812 ---------- */
+/* 'rate' is sampling rate and 'bufsiz' is the size of the */
+FM_OPL *OPLCreate(int type, int clock, int rate)
+{
+ char *ptr;
+ FM_OPL *OPL;
+ int state_size;
+ int max_ch = 9; /* normaly 9 channels */
+
+ if( OPL_LockTable() ==-1) return NULL;
+ /* allocate OPL state space */
+ state_size = sizeof(FM_OPL);
+ state_size += sizeof(OPL_CH)*max_ch;
+#if BUILD_Y8950
+ if(type&OPL_TYPE_ADPCM) state_size+= sizeof(YM_DELTAT);
+#endif
+ /* allocate memory block */
+ ptr = malloc(state_size);
+ if(ptr==NULL) return NULL;
+ /* clear */
+ memset(ptr,0,state_size);
+ OPL = (FM_OPL *)ptr; ptr+=sizeof(FM_OPL);
+ OPL->P_CH = (OPL_CH *)ptr; ptr+=sizeof(OPL_CH)*max_ch;
+#if BUILD_Y8950
+ if(type&OPL_TYPE_ADPCM) OPL->deltat = (YM_DELTAT *)ptr; ptr+=sizeof(YM_DELTAT);
+#endif
+ /* set channel state pointer */
+ OPL->type = type;
+ OPL->clock = clock;
+ OPL->rate = rate;
+ OPL->max_ch = max_ch;
+ /* init grobal tables */
+ OPL_initalize(OPL);
+ /* reset chip */
+ OPLResetChip(OPL);
+#ifdef OPL_OUTPUT_LOG
+ if(!opl_dbg_fp)
+ {
+ opl_dbg_fp = fopen("opllog.opl","wb");
+ opl_dbg_maxchip = 0;
+ }
+ if(opl_dbg_fp)
+ {
+ opl_dbg_opl[opl_dbg_maxchip] = OPL;
+ fprintf(opl_dbg_fp,"%c%c%c%c%c%c",0x00+opl_dbg_maxchip,
+ type,
+ clock&0xff,
+ (clock/0x100)&0xff,
+ (clock/0x10000)&0xff,
+ (clock/0x1000000)&0xff);
+ opl_dbg_maxchip++;
+ }
+#endif
+ return OPL;
+}
+
+/* ---------- Destroy one of vietual YM3812 ---------- */
+void OPLDestroy(FM_OPL *OPL)
+{
+#ifdef OPL_OUTPUT_LOG
+ if(opl_dbg_fp)
+ {
+ fclose(opl_dbg_fp);
+ opl_dbg_fp = NULL;
+ }
+#endif
+ OPL_UnLockTable();
+ free(OPL);
+}
+
+/* ---------- Option handlers ---------- */
+
+void OPLSetTimerHandler(FM_OPL *OPL,OPL_TIMERHANDLER TimerHandler,int channelOffset)
+{
+ OPL->TimerHandler = TimerHandler;
+ OPL->TimerParam = channelOffset;
+}
+void OPLSetIRQHandler(FM_OPL *OPL,OPL_IRQHANDLER IRQHandler,int param)
+{
+ OPL->IRQHandler = IRQHandler;
+ OPL->IRQParam = param;
+}
+void OPLSetUpdateHandler(FM_OPL *OPL,OPL_UPDATEHANDLER UpdateHandler,int param)
+{
+ OPL->UpdateHandler = UpdateHandler;
+ OPL->UpdateParam = param;
+}
+#if BUILD_Y8950
+void OPLSetPortHandler(FM_OPL *OPL,OPL_PORTHANDLER_W PortHandler_w,OPL_PORTHANDLER_R PortHandler_r,int param)
+{
+ OPL->porthandler_w = PortHandler_w;
+ OPL->porthandler_r = PortHandler_r;
+ OPL->port_param = param;
+}
+
+void OPLSetKeyboardHandler(FM_OPL *OPL,OPL_PORTHANDLER_W KeyboardHandler_w,OPL_PORTHANDLER_R KeyboardHandler_r,int param)
+{
+ OPL->keyboardhandler_w = KeyboardHandler_w;
+ OPL->keyboardhandler_r = KeyboardHandler_r;
+ OPL->keyboard_param = param;
+}
+#endif
+/* ---------- YM3812 I/O interface ---------- */
+int OPLWrite(FM_OPL *OPL,int a,int v)
+{
+ if( !(a&1) )
+ { /* address port */
+ OPL->address = v & 0xff;
+ }
+ else
+ { /* data port */
+ if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0);
+#ifdef OPL_OUTPUT_LOG
+ if(opl_dbg_fp)
+ {
+ for(opl_dbg_chip=0;opl_dbg_chip<opl_dbg_maxchip;opl_dbg_chip++)
+ if( opl_dbg_opl[opl_dbg_chip] == OPL) break;
+ fprintf(opl_dbg_fp,"%c%c%c",0x10+opl_dbg_chip,OPL->address,v);
+ }
+#endif
+ OPLWriteReg(OPL,OPL->address,v);
+ }
+ return OPL->status>>7;
+}
+
+unsigned char OPLRead(FM_OPL *OPL,int a)
+{
+ if( !(a&1) )
+ { /* status port */
+ return OPL->status & (OPL->statusmask|0x80);
+ }
+ /* data port */
+ switch(OPL->address)
+ {
+ case 0x05: /* KeyBoard IN */
+ if(OPL->type&OPL_TYPE_KEYBOARD)
+ {
+ if(OPL->keyboardhandler_r)
+ return OPL->keyboardhandler_r(OPL->keyboard_param);
+ else
+ LOG(LOG_WAR,("OPL:read unmapped KEYBOARD port\n"));
+ }
+ return 0;
+#if 0
+ case 0x0f: /* ADPCM-DATA */
+ return 0;
+#endif
+ case 0x19: /* I/O DATA */
+ if(OPL->type&OPL_TYPE_IO)
+ {
+ if(OPL->porthandler_r)
+ return OPL->porthandler_r(OPL->port_param);
+ else
+ LOG(LOG_WAR,("OPL:read unmapped I/O port\n"));
+ }
+ return 0;
+ case 0x1a: /* PCM-DATA */
+ return 0;
+ }
+ return 0;
+}
+
+int OPLTimerOver(FM_OPL *OPL,int c)
+{
+ if( c )
+ { /* Timer B */
+ OPL_STATUS_SET(OPL,0x20);
+ }
+ else
+ { /* Timer A */
+ OPL_STATUS_SET(OPL,0x40);
+ /* CSM mode key,TL controll */
+ if( OPL->mode & 0x80 )
+ { /* CSM mode total level latch and auto key on */
+ int ch;
+ if(OPL->UpdateHandler) OPL->UpdateHandler(OPL->UpdateParam,0);
+ for(ch=0;ch<9;ch++)
+ CSMKeyControll( &OPL->P_CH[ch] );
+ }
+ }
+ /* reload timer */
+ if (OPL->TimerHandler) (OPL->TimerHandler)(OPL->TimerParam+c,(double)OPL->T[c]*OPL->TimerBase);
+ return OPL->status>>7;
+}
diff --git a/hw/fmopl.h b/hw/fmopl.h
new file mode 100644
index 0000000000..a01ff902c7
--- /dev/null
+++ b/hw/fmopl.h
@@ -0,0 +1,174 @@
+#ifndef __FMOPL_H_
+#define __FMOPL_H_
+
+/* --- select emulation chips --- */
+#define BUILD_YM3812 (HAS_YM3812)
+//#define BUILD_YM3526 (HAS_YM3526)
+//#define BUILD_Y8950 (HAS_Y8950)
+
+/* --- system optimize --- */
+/* select bit size of output : 8 or 16 */
+#define OPL_OUTPUT_BIT 16
+
+/* compiler dependence */
+#ifndef OSD_CPU_H
+#define OSD_CPU_H
+typedef unsigned char UINT8; /* unsigned 8bit */
+typedef unsigned short UINT16; /* unsigned 16bit */
+typedef unsigned int UINT32; /* unsigned 32bit */
+typedef signed char INT8; /* signed 8bit */
+typedef signed short INT16; /* signed 16bit */
+typedef signed int INT32; /* signed 32bit */
+#endif
+
+#if (OPL_OUTPUT_BIT==16)
+typedef INT16 OPLSAMPLE;
+#endif
+#if (OPL_OUTPUT_BIT==8)
+typedef unsigned char OPLSAMPLE;
+#endif
+
+
+#if BUILD_Y8950
+#include "ymdeltat.h"
+#endif
+
+typedef void (*OPL_TIMERHANDLER)(int channel,double interval_Sec);
+typedef void (*OPL_IRQHANDLER)(int param,int irq);
+typedef void (*OPL_UPDATEHANDLER)(int param,int min_interval_us);
+typedef void (*OPL_PORTHANDLER_W)(int param,unsigned char data);
+typedef unsigned char (*OPL_PORTHANDLER_R)(int param);
+
+/* !!!!! here is private section , do not access there member direct !!!!! */
+
+#define OPL_TYPE_WAVESEL 0x01 /* waveform select */
+#define OPL_TYPE_ADPCM 0x02 /* DELTA-T ADPCM unit */
+#define OPL_TYPE_KEYBOARD 0x04 /* keyboard interface */
+#define OPL_TYPE_IO 0x08 /* I/O port */
+
+/* Saving is necessary for member of the 'R' mark for suspend/resume */
+/* ---------- OPL one of slot ---------- */
+typedef struct fm_opl_slot {
+ INT32 TL; /* total level :TL << 8 */
+ INT32 TLL; /* adjusted now TL */
+ UINT8 KSR; /* key scale rate :(shift down bit) */
+ INT32 *AR; /* attack rate :&AR_TABLE[AR<<2] */
+ INT32 *DR; /* decay rate :&DR_TALBE[DR<<2] */
+ INT32 SL; /* sustin level :SL_TALBE[SL] */
+ INT32 *RR; /* release rate :&DR_TABLE[RR<<2] */
+ UINT8 ksl; /* keyscale level :(shift down bits) */
+ UINT8 ksr; /* key scale rate :kcode>>KSR */
+ UINT32 mul; /* multiple :ML_TABLE[ML] */
+ UINT32 Cnt; /* frequency count : */
+ UINT32 Incr; /* frequency step : */
+ /* envelope generator state */
+ UINT8 eg_typ; /* envelope type flag */
+ UINT8 evm; /* envelope phase */
+ INT32 evc; /* envelope counter */
+ INT32 eve; /* envelope counter end point */
+ INT32 evs; /* envelope counter step */
+ INT32 evsa; /* envelope step for AR :AR[ksr] */
+ INT32 evsd; /* envelope step for DR :DR[ksr] */
+ INT32 evsr; /* envelope step for RR :RR[ksr] */
+ /* LFO */
+ UINT8 ams; /* ams flag */
+ UINT8 vib; /* vibrate flag */
+ /* wave selector */
+ INT32 **wavetable;
+}OPL_SLOT;
+
+/* ---------- OPL one of channel ---------- */
+typedef struct fm_opl_channel {
+ OPL_SLOT SLOT[2];
+ UINT8 CON; /* connection type */
+ UINT8 FB; /* feed back :(shift down bit) */
+ INT32 *connect1; /* slot1 output pointer */
+ INT32 *connect2; /* slot2 output pointer */
+ INT32 op1_out[2]; /* slot1 output for selfeedback */
+ /* phase generator state */
+ UINT32 block_fnum; /* block+fnum : */
+ UINT8 kcode; /* key code : KeyScaleCode */
+ UINT32 fc; /* Freq. Increment base */
+ UINT32 ksl_base; /* KeyScaleLevel Base step */
+ UINT8 keyon; /* key on/off flag */
+} OPL_CH;
+
+/* OPL state */
+typedef struct fm_opl_f {
+ UINT8 type; /* chip type */
+ int clock; /* master clock (Hz) */
+ int rate; /* sampling rate (Hz) */
+ double freqbase; /* frequency base */
+ double TimerBase; /* Timer base time (==sampling time) */
+ UINT8 address; /* address register */
+ UINT8 status; /* status flag */
+ UINT8 statusmask; /* status mask */
+ UINT32 mode; /* Reg.08 : CSM , notesel,etc. */
+ /* Timer */
+ int T[2]; /* timer counter */
+ UINT8 st[2]; /* timer enable */
+ /* FM channel slots */
+ OPL_CH *P_CH; /* pointer of CH */
+ int max_ch; /* maximum channel */
+ /* Rythm sention */
+ UINT8 rythm; /* Rythm mode , key flag */
+#if BUILD_Y8950
+ /* Delta-T ADPCM unit (Y8950) */
+ YM_DELTAT *deltat; /* DELTA-T ADPCM */
+#endif
+ /* Keyboard / I/O interface unit (Y8950) */
+ UINT8 portDirection;
+ UINT8 portLatch;
+ OPL_PORTHANDLER_R porthandler_r;
+ OPL_PORTHANDLER_W porthandler_w;
+ int port_param;
+ OPL_PORTHANDLER_R keyboardhandler_r;
+ OPL_PORTHANDLER_W keyboardhandler_w;
+ int keyboard_param;
+ /* time tables */
+ INT32 AR_TABLE[75]; /* atttack rate tables */
+ INT32 DR_TABLE[75]; /* decay rate tables */
+ UINT32 FN_TABLE[1024]; /* fnumber -> increment counter */
+ /* LFO */
+ INT32 *ams_table;
+ INT32 *vib_table;
+ INT32 amsCnt;
+ INT32 amsIncr;
+ INT32 vibCnt;
+ INT32 vibIncr;
+ /* wave selector enable flag */
+ UINT8 wavesel;
+ /* external event callback handler */
+ OPL_TIMERHANDLER TimerHandler; /* TIMER handler */
+ int TimerParam; /* TIMER parameter */
+ OPL_IRQHANDLER IRQHandler; /* IRQ handler */
+ int IRQParam; /* IRQ parameter */
+ OPL_UPDATEHANDLER UpdateHandler; /* stream update handler */
+ int UpdateParam; /* stream update parameter */
+} FM_OPL;
+
+/* ---------- Generic interface section ---------- */
+#define OPL_TYPE_YM3526 (0)
+#define OPL_TYPE_YM3812 (OPL_TYPE_WAVESEL)
+#define OPL_TYPE_Y8950 (OPL_TYPE_ADPCM|OPL_TYPE_KEYBOARD|OPL_TYPE_IO)
+
+FM_OPL *OPLCreate(int type, int clock, int rate);
+void OPLDestroy(FM_OPL *OPL);
+void OPLSetTimerHandler(FM_OPL *OPL,OPL_TIMERHANDLER TimerHandler,int channelOffset);
+void OPLSetIRQHandler(FM_OPL *OPL,OPL_IRQHANDLER IRQHandler,int param);
+void OPLSetUpdateHandler(FM_OPL *OPL,OPL_UPDATEHANDLER UpdateHandler,int param);
+/* Y8950 port handlers */
+void OPLSetPortHandler(FM_OPL *OPL,OPL_PORTHANDLER_W PortHandler_w,OPL_PORTHANDLER_R PortHandler_r,int param);
+void OPLSetKeyboardHandler(FM_OPL *OPL,OPL_PORTHANDLER_W KeyboardHandler_w,OPL_PORTHANDLER_R KeyboardHandler_r,int param);
+
+void OPLResetChip(FM_OPL *OPL);
+int OPLWrite(FM_OPL *OPL,int a,int v);
+unsigned char OPLRead(FM_OPL *OPL,int a);
+int OPLTimerOver(FM_OPL *OPL,int c);
+
+/* YM3626/YM3812 local section */
+void YM3812UpdateOne(FM_OPL *OPL, INT16 *buffer, int length);
+
+void Y8950UpdateOne(FM_OPL *OPL, INT16 *buffer, int length);
+
+#endif
diff --git a/hw/pc.c b/hw/pc.c
index cddd136183..fbcd969802 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -554,13 +554,10 @@ void pc_init(int ram_size, int vga_ram_size, int boot_device,
kbd_init();
DMA_init(0);
-#ifndef _WIN32
if (audio_enabled) {
/* no audio supported yet for win32 */
AUD_init();
- SB16_init();
}
-#endif
floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
diff --git a/hw/sb16.c b/hw/sb16.c
index f84cf8d4a2..d9320566ab 100644
--- a/hw/sb16.c
+++ b/hw/sb16.c
@@ -1,7 +1,7 @@
/*
* QEMU Soundblaster 16 emulation
*
- * Copyright (c) 2003 Vassili Karpov (malc)
+ * Copyright (c) 2003-2004 Vassili Karpov (malc)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
@@ -23,32 +23,20 @@
*/
#include "vl.h"
-#define MIN(a, b) ((a)>(b)?(b):(a))
-#define LENOFA(a) ((int) (sizeof(a)/sizeof(a[0])))
-
-#define dolog(...) fprintf (stderr, "sb16: " __VA_ARGS__);
+/* #define DEBUG */
+#define AUDIO_CAP "sb16"
+#include "audio/audio.h"
-/* #define DEBUG_SB16 */
+#define LENOFA(a) ((int) (sizeof(a)/sizeof(a[0])))
-#ifdef DEBUG_SB16
-#define lwarn(...) fprintf (stderr, "sb16: " __VA_ARGS__)
-#define linfo(...) fprintf (stderr, "sb16: " __VA_ARGS__)
-#define ldebug(...) fprintf (stderr, "sb16: " __VA_ARGS__)
-#else
-#define lwarn(...)
-#define linfo(...)
-#define ldebug(...)
-#endif
+/* #define DEBUG_SB16_MOST */
-#define IO_READ_PROTO(name) \
+#define IO_READ_PROTO(name) \
uint32_t name (void *opaque, uint32_t nport)
-#define IO_WRITE_PROTO(name) \
+#define IO_WRITE_PROTO(name) \
void name (void *opaque, uint32_t nport, uint32_t val)
-static const char e3[] =
- "COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1992\0"
- "COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1994-1997";
- /* "COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1994."; */
+static const char e3[] = "COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1992.";
static struct {
int ver_lo;
@@ -57,38 +45,58 @@ static struct {
int dma;
int hdma;
int port;
- int mix_block;
-} sb = {5, 4, 5, 1, 5, 0x220, -1};
-
-static int mix_block, noirq;
+} conf = {5, 4, 5, 1, 5, 0x220};
typedef struct SB16State {
+ int irq;
+ int dma;
+ int hdma;
+ int port;
+ int ver;
+
int in_index;
int out_data_len;
int fmt_stereo;
int fmt_signed;
int fmt_bits;
+ audfmt_e fmt;
int dma_auto;
- int dma_buffer_size;
+ int block_size;
int fifo;
int freq;
int time_const;
int speaker;
int needed_bytes;
int cmd;
- int dma_pos;
int use_hdma;
+ int highspeed;
+ int can_write;
int v2x6;
+ uint8_t csp_param;
+ uint8_t csp_value;
+ uint8_t csp_mode;
+ uint8_t csp_regs[256];
+ uint8_t csp_index;
+ uint8_t csp_reg83[4];
+ int csp_reg83r;
+ int csp_reg83w;
+
uint8_t in2_data[10];
- uint8_t out_data[1024];
+ uint8_t out_data[50];
+ uint8_t test_reg;
+ uint8_t last_read_byte;
+ int nzero;
int left_till_irq;
- uint64_t nzero;
- uint8_t last_read_byte;
- uint8_t test_reg;
+ int dma_running;
+ int bytes_per_second;
+ int align;
+ SWVoice *voice;
+
+ QEMUTimer *ts, *aux_ts;
/* mixer state */
int mixer_nreg;
uint8_t mixer_regs[256];
@@ -97,664 +105,853 @@ typedef struct SB16State {
/* XXX: suppress that and use a context */
static struct SB16State dsp;
+static int magic_of_irq (int irq)
+{
+ switch (irq) {
+ case 5:
+ return 2;
+ case 7:
+ return 4;
+ case 9:
+ return 1;
+ case 10:
+ return 8;
+ default:
+ dolog ("bad irq %d\n", irq);
+ return 2;
+ }
+}
+
+static int irq_of_magic (int magic)
+{
+ switch (magic) {
+ case 1:
+ return 9;
+ case 2:
+ return 5;
+ case 4:
+ return 7;
+ case 8:
+ return 10;
+ default:
+ dolog ("bad irq magic %d\n", magic);
+ return -1;
+ }
+}
+
+#if 0
static void log_dsp (SB16State *dsp)
{
- ldebug ("%c:%c:%d:%c:dmabuf=%d:pos=%d:freq=%d:timeconst=%d:speaker=%d\n",
- dsp->fmt_stereo ? 'S' : 'M',
- dsp->fmt_signed ? 'S' : 'U',
- dsp->fmt_bits,
- dsp->dma_auto ? 'a' : 's',
- dsp->dma_buffer_size,
- dsp->dma_pos,
- dsp->freq,
- dsp->time_const,
- dsp->speaker);
+ ldebug ("%s:%s:%d:%s:dmasize=%d:freq=%d:const=%d:speaker=%d\n",
+ dsp->fmt_stereo ? "Stereo" : "Mono",
+ dsp->fmt_signed ? "Signed" : "Unsigned",
+ dsp->fmt_bits,
+ dsp->dma_auto ? "Auto" : "Single",
+ dsp->block_size,
+ dsp->freq,
+ dsp->time_const,
+ dsp->speaker);
+}
+#endif
+
+static void speaker (SB16State *s, int on)
+{
+ s->speaker = on;
+ /* AUD_enable (s->voice, on); */
}
-static void control (int hold)
+static void control (SB16State *s, int hold)
{
- linfo ("%d high %d\n", hold, dsp.use_hdma);
+ int dma = s->use_hdma ? s->hdma : s->dma;
+ s->dma_running = hold;
+
+ ldebug ("hold %d high %d dma %d\n", hold, s->use_hdma, dma);
+
if (hold) {
- if (dsp.use_hdma)
- DMA_hold_DREQ (sb.hdma);
- else
- DMA_hold_DREQ (sb.dma);
+ DMA_hold_DREQ (dma);
+ AUD_enable (s->voice, 1);
}
else {
- if (dsp.use_hdma)
- DMA_release_DREQ (sb.hdma);
- else
- DMA_release_DREQ (sb.dma);
+ DMA_release_DREQ (dma);
+ AUD_enable (s->voice, 0);
}
}
-static void dma_cmd (uint8_t cmd, uint8_t d0, int dma_len)
+static void aux_timer (void *opaque)
{
- int bps;
- audfmt_e fmt;
+ SB16State *s = opaque;
+ s->can_write = 1;
+ pic_set_irq (s->irq, 1);
+}
+
+#define DMA8_AUTO 1
+#define DMA8_HIGH 2
+
+static void dma_cmd8 (SB16State *s, int mask, int dma_len)
+{
+ s->fmt = AUD_FMT_U8;
+ s->use_hdma = 0;
+ s->fmt_bits = 8;
+ s->fmt_signed = 0;
+ s->fmt_stereo = (s->mixer_regs[0x0e] & 2) != 0;
+ if (-1 == s->time_const) {
+ s->freq = 11025;
+ }
+ else {
+ int tmp = (256 - s->time_const);
+ s->freq = (1000000 + (tmp / 2)) / tmp;
+ }
+
+ if (-1 != dma_len)
+ s->block_size = dma_len + 1;
+
+ s->freq >>= s->fmt_stereo;
+ s->left_till_irq = s->block_size;
+ s->bytes_per_second = (s->freq << s->fmt_stereo);
+ /* s->highspeed = (mask & DMA8_HIGH) != 0; */
+ s->dma_auto = (mask & DMA8_AUTO) != 0;
+ s->align = (1 << s->fmt_stereo) - 1;
+
+ ldebug ("freq %d, stereo %d, sign %d, bits %d, "
+ "dma %d, auto %d, fifo %d, high %d\n",
+ s->freq, s->fmt_stereo, s->fmt_signed, s->fmt_bits,
+ s->block_size, s->dma_auto, s->fifo, s->highspeed);
+
+ if (s->freq)
+ s->voice = AUD_open (s->voice, "sb16", s->freq,
+ 1 << s->fmt_stereo, s->fmt);
+
+ control (s, 1);
+ speaker (s, 1);
+}
- dsp.use_hdma = cmd < 0xc0;
- dsp.fifo = (cmd >> 1) & 1;
- dsp.dma_auto = (cmd >> 2) & 1;
+static void dma_cmd (SB16State *s, uint8_t cmd, uint8_t d0, int dma_len)
+{
+ s->use_hdma = cmd < 0xc0;
+ s->fifo = (cmd >> 1) & 1;
+ s->dma_auto = (cmd >> 2) & 1;
+ s->fmt_signed = (d0 >> 4) & 1;
+ s->fmt_stereo = (d0 >> 5) & 1;
switch (cmd >> 4) {
case 11:
- dsp.fmt_bits = 16;
+ s->fmt_bits = 16;
break;
case 12:
- dsp.fmt_bits = 8;
+ s->fmt_bits = 8;
break;
}
- dsp.fmt_signed = (d0 >> 4) & 1;
- dsp.fmt_stereo = (d0 >> 5) & 1;
-
- if (-1 != dsp.time_const) {
- int tmp;
-
- tmp = 256 - dsp.time_const;
- dsp.freq = (1000000 + (tmp / 2)) / tmp;
+ if (-1 != s->time_const) {
+#if 1
+ int tmp = 256 - s->time_const;
+ s->freq = (1000000 + (tmp / 2)) / tmp;
+#else
+ /* s->freq = 1000000 / ((255 - s->time_const) << s->fmt_stereo); */
+ s->freq = 1000000 / ((255 - s->time_const));
+#endif
+ s->time_const = -1;
}
- bps = 1 << (16 == dsp.fmt_bits);
- if (-1 != dma_len)
- dsp.dma_buffer_size = (dma_len + 1) * bps;
+ s->block_size = dma_len + 1;
+ s->block_size <<= (s->fmt_bits == 16);
+ if (!s->dma_auto) /* Miles Sound System ? */
+ s->block_size <<= s->fmt_stereo;
- linfo ("frequency %d, stereo %d, signed %d, bits %d, size %d, auto %d\n",
- dsp.freq, dsp.fmt_stereo, dsp.fmt_signed, dsp.fmt_bits,
- dsp.dma_buffer_size, dsp.dma_auto);
+ ldebug ("freq %d, stereo %d, sign %d, bits %d, "
+ "dma %d, auto %d, fifo %d, high %d\n",
+ s->freq, s->fmt_stereo, s->fmt_signed, s->fmt_bits,
+ s->block_size, s->dma_auto, s->fifo, s->highspeed);
- if (16 == dsp.fmt_bits) {
- if (dsp.fmt_signed) {
- fmt = AUD_FMT_S16;
+ if (16 == s->fmt_bits) {
+ if (s->fmt_signed) {
+ s->fmt = AUD_FMT_S16;
}
else {
- fmt = AUD_FMT_U16;
+ s->fmt = AUD_FMT_U16;
}
}
else {
- if (dsp.fmt_signed) {
- fmt = AUD_FMT_S8;
+ if (s->fmt_signed) {
+ s->fmt = AUD_FMT_S8;
}
else {
- fmt = AUD_FMT_U8;
+ s->fmt = AUD_FMT_U8;
}
}
- dsp.dma_pos = 0;
- dsp.left_till_irq = dsp.dma_buffer_size;
+ s->left_till_irq = s->block_size;
- if (sb.mix_block) {
- mix_block = sb.mix_block;
- }
- else {
- int align;
+ s->bytes_per_second = (s->freq << s->fmt_stereo) << (s->fmt_bits == 16);
+ s->highspeed = 0;
+ s->align = (1 << (s->fmt_stereo + (s->fmt_bits == 16))) - 1;
- align = bps << dsp.fmt_stereo;
- mix_block = ((dsp.freq * align) / 100) & ~(align - 1);
- }
+ if (s->freq)
+ s->voice = AUD_open (s->voice, "sb16", s->freq,
+ 1 << s->fmt_stereo, s->fmt);
- if (dsp.freq)
- AUD_reset (dsp.freq, 1 << dsp.fmt_stereo, fmt);
- control (1);
- dsp.speaker = 1;
+ control (s, 1);
+ speaker (s, 1);
}
-static inline void dsp_out_data(SB16State *dsp, int val)
+static inline void dsp_out_data (SB16State *s, uint8_t val)
{
- if (dsp->out_data_len < sizeof(dsp->out_data))
- dsp->out_data[dsp->out_data_len++] = val;
+ ldebug ("outdata %#x\n", val);
+ if (s->out_data_len < sizeof (s->out_data))
+ s->out_data[s->out_data_len++] = val;
}
-static inline uint8_t dsp_get_data(SB16State *dsp)
+static inline uint8_t dsp_get_data (SB16State *s)
{
- if (dsp->in_index)
- return dsp->in2_data[--dsp->in_index];
- else
+ if (s->in_index)
+ return s->in2_data[--s->in_index];
+ else {
+ dolog ("buffer underflow\n");
return 0;
+ }
}
-static void command (SB16State *dsp, uint8_t cmd)
+static void command (SB16State *s, uint8_t cmd)
{
- linfo ("command: %#x\n", cmd);
+ ldebug ("command %#x\n", cmd);
if (cmd > 0xaf && cmd < 0xd0) {
- if (cmd & 8)
- goto error;
+ if (cmd & 8) {
+ dolog ("ADC not yet supported (command %#x)\n", cmd);
+ }
switch (cmd >> 4) {
case 11:
case 12:
break;
default:
- dolog ("command: %#x wrong bits specification\n", cmd);
- goto error;
+ dolog ("%#x wrong bits\n", cmd);
}
- dsp->needed_bytes = 3;
+ s->needed_bytes = 3;
}
else {
switch (cmd) {
- case 0x00:
- case 0xe7:
- /* IMS uses those when probing for sound devices */
- return;
-
case 0x03:
+ dsp_out_data (s, 0x10); /* s->csp_param); */
+ goto warn;
+
case 0x04:
- dsp_out_data (dsp, 0);
- return;
+ s->needed_bytes = 1;
+ goto warn;
case 0x05:
- dsp->needed_bytes = 2;
- break;
+ s->needed_bytes = 2;
+ goto warn;
+
+ case 0x08:
+ /* __asm__ ("int3"); */
+ goto warn;
case 0x0e:
- dsp->needed_bytes = 2;
- break;
+ s->needed_bytes = 2;
+ goto warn;
+
+ case 0x09:
+ dsp_out_data (s, 0xf8);
+ goto warn;
case 0x0f:
- dsp->needed_bytes = 1;
- break;
+ s->needed_bytes = 1;
+ goto warn;
case 0x10:
- dsp->needed_bytes = 1;
- break;
+ s->needed_bytes = 1;
+ goto warn;
case 0x14:
- dsp->needed_bytes = 2;
- dsp->dma_buffer_size = 0;
+ s->needed_bytes = 2;
+ s->block_size = 0;
break;
- case 0x20:
- dsp_out_data(dsp, 0xff);
- break;
+ case 0x20: /* Direct ADC, Juice/PL */
+ dsp_out_data (s, 0xff);
+ goto warn;
case 0x35:
- lwarn ("MIDI commands not implemented\n");
+ dolog ("MIDI command(0x35) not implemented\n");
break;
case 0x40:
- dsp->freq = -1;
- dsp->time_const = -1;
- dsp->needed_bytes = 1;
+ s->freq = -1;
+ s->time_const = -1;
+ s->needed_bytes = 1;
break;
case 0x41:
- case 0x42:
- dsp->freq = -1;
- dsp->time_const = -1;
- dsp->needed_bytes = 2;
+ s->freq = -1;
+ s->time_const = -1;
+ s->needed_bytes = 2;
break;
+ case 0x42:
+ s->freq = -1;
+ s->time_const = -1;
+ s->needed_bytes = 2;
+ goto warn;
+
case 0x45:
- dsp_out_data (dsp, 0xaa);
+ dsp_out_data (s, 0xaa);
+ goto warn;
+
case 0x47: /* Continue Auto-Initialize DMA 16bit */
break;
case 0x48:
- dsp->needed_bytes = 2;
+ s->needed_bytes = 2;
break;
- case 0x27: /* ????????? */
- case 0x4e:
- return;
-
case 0x80:
- cmd = -1;
+ s->needed_bytes = 2;
break;
case 0x90:
case 0x91:
- {
- uint8_t d0;
-
- d0 = 4;
- /* if (dsp->fmt_signed) d0 |= 16; */
- /* if (dsp->fmt_stereo) d0 |= 32; */
- dma_cmd (cmd == 0x90 ? 0xc4 : 0xc0, d0, -1);
- cmd = -1;
- break;
- }
+ dma_cmd8 (s, ((cmd & 1) == 0) | DMA8_HIGH, -1);
+ break;
- case 0xd0: /* XXX */
- control (0);
- return;
+ case 0xd0: /* halt DMA operation. 8bit */
+ control (s, 0);
+ break;
- case 0xd1:
- dsp->speaker = 1;
+ case 0xd1: /* speaker on */
+ speaker (s, 1);
break;
- case 0xd3:
- dsp->speaker = 0;
- return;
+ case 0xd3: /* speaker off */
+ speaker (s, 0);
+ break;
- case 0xd4:
- control (1);
+ case 0xd4: /* continue DMA operation. 8bit */
+ control (s, 1);
break;
- case 0xd5:
- control (0);
+ case 0xd5: /* halt DMA operation. 16bit */
+ control (s, 0);
break;
- case 0xd6:
- control (1);
+ case 0xd6: /* continue DMA operation. 16bit */
+ control (s, 1);
break;
- case 0xd9:
- control (0);
- dsp->dma_auto = 0;
- return;
+ case 0xd9: /* exit auto-init DMA after this block. 16bit */
+ s->dma_auto = 0;
+ break;
- case 0xda:
- control (0);
- dsp->dma_auto = 0;
+ case 0xda: /* exit auto-init DMA after this block. 8bit */
+ s->dma_auto = 0;
break;
case 0xe0:
- dsp->needed_bytes = 1;
- break;
+ s->needed_bytes = 1;
+ goto warn;
case 0xe1:
- dsp_out_data(dsp, sb.ver_lo);
- dsp_out_data(dsp, sb.ver_hi);
- return;
+ dsp_out_data (s, s->ver & 0xff);
+ dsp_out_data (s, s->ver >> 8);
+ break;
+
+ case 0xe2:
+ s->needed_bytes = 1;
+ goto warn;
case 0xe3:
{
int i;
- for (i = sizeof (e3) - 1; i >= 0; i--)
- dsp_out_data (dsp, e3[i]);
- return;
+ for (i = sizeof (e3) - 1; i >= 0; --i)
+ dsp_out_data (s, e3[i]);
}
+ break;
case 0xe4: /* write test reg */
- dsp->needed_bytes = 1;
+ s->needed_bytes = 1;
break;
+ case 0xe7:
+ dolog ("Attempt to probe for ESS (0xe7)?\n");
+ return;
+
case 0xe8: /* read test reg */
- dsp_out_data (dsp, dsp->test_reg);
+ dsp_out_data (s, s->test_reg);
break;
case 0xf2:
- dsp_out_data (dsp, 0xaa);
- dsp->mixer_regs[0x82] |= dsp->mixer_regs[0x80];
- pic_set_irq (sb.irq, 1);
- return;
+ case 0xf3:
+ dsp_out_data (s, 0xaa);
+ s->mixer_regs[0x82] |= (cmd == 0xf2) ? 1 : 2;
+ pic_set_irq (s->irq, 1);
+ break;
case 0xf9:
- dsp->needed_bytes = 1;
- break;
+ s->needed_bytes = 1;
+ goto warn;
case 0xfa:
- dsp_out_data (dsp, 0);
- break;
+ dsp_out_data (s, 0);
+ goto warn;
case 0xfc: /* FIXME */
- dsp_out_data (dsp, 0);
- break;
+ dsp_out_data (s, 0);
+ goto warn;
default:
dolog ("unrecognized command %#x\n", cmd);
- goto error;
+ return;
}
}
- dsp->cmd = cmd;
+
+ s->cmd = cmd;
+ if (!s->needed_bytes)
+ ldebug ("\n");
return;
- error:
+ warn:
+ dolog ("warning command %#x,%d is not trully understood yet\n",
+ cmd, s->needed_bytes);
+ s->cmd = cmd;
return;
}
-static void complete (SB16State *dsp)
+static uint16_t dsp_get_lohi (SB16State *s)
+{
+ uint8_t hi = dsp_get_data (s);
+ uint8_t lo = dsp_get_data (s);
+ return (hi << 8) | lo;
+}
+
+static uint16_t dsp_get_hilo (SB16State *s)
+{
+ uint8_t lo = dsp_get_data (s);
+ uint8_t hi = dsp_get_data (s);
+ return (hi << 8) | lo;
+}
+
+static void complete (SB16State *s)
{
int d0, d1, d2;
- linfo ("complete command %#x, in_index %d, needed_bytes %d\n",
- dsp->cmd, dsp->in_index, dsp->needed_bytes);
+ ldebug ("complete command %#x, in_index %d, needed_bytes %d\n",
+ s->cmd, s->in_index, s->needed_bytes);
- if (dsp->cmd > 0xaf && dsp->cmd < 0xd0) {
- d2 = dsp_get_data (dsp);
- d1 = dsp_get_data (dsp);
- d0 = dsp_get_data (dsp);
+ if (s->cmd > 0xaf && s->cmd < 0xd0) {
+ d2 = dsp_get_data (s);
+ d1 = dsp_get_data (s);
+ d0 = dsp_get_data (s);
- ldebug ("d0 = %d, d1 = %d, d2 = %d\n",
- d0, d1, d2);
- dma_cmd (dsp->cmd, d0, d1 + (d2 << 8));
+ if (s->cmd & 8) {
+ dolog ("ADC params cmd = %#x d0 = %d, d1 = %d, d2 = %d\n",
+ s->cmd, d0, d1, d2);
+ }
+ else {
+ ldebug ("cmd = %#x d0 = %d, d1 = %d, d2 = %d\n",
+ s->cmd, d0, d1, d2);
+ dma_cmd (s, s->cmd, d0, d1 + (d2 << 8));
+ }
}
else {
- switch (dsp->cmd) {
+ switch (s->cmd) {
case 0x04:
- case 0x10:
- dsp_get_data (dsp);
+ s->csp_mode = dsp_get_data (s);
+ s->csp_reg83r = 0;
+ s->csp_reg83w = 0;
+ ldebug ("CSP command 0x04: mode=%#x\n", s->csp_mode);
break;
- case 0x0f:
- d0 = dsp_get_data (dsp);
- dsp_out_data (dsp, 0xf8);
+ case 0x05:
+ s->csp_param = dsp_get_data (s);
+ s->csp_value = dsp_get_data (s);
+ ldebug ("CSP command 0x05: param=%#x value=%#x\n",
+ s->csp_param,
+ s->csp_value);
break;
- case 0x05:
case 0x0e:
- dsp_get_data (dsp);
- dsp_get_data (dsp);
+ d0 = dsp_get_data (s);
+ d1 = dsp_get_data (s);
+ ldebug ("write CSP register %d <- %#x\n", d1, d0);
+ if (d1 == 0x83) {
+ ldebug ("0x83[%d] <- %#x\n", s->csp_reg83r, d0);
+ s->csp_reg83[s->csp_reg83r % 4] = d0;
+ s->csp_reg83r += 1;
+ }
+ else
+ s->csp_regs[d1] = d0;
break;
- case 0x14:
- {
- int save_left;
- int save_pos;
-
- d1 = dsp_get_data (dsp);
- d0 = dsp_get_data (dsp);
+ case 0x0f:
+ d0 = dsp_get_data (s);
+ ldebug ("read CSP register %#x -> %#x, mode=%#x\n",
+ d0, s->csp_regs[d0], s->csp_mode);
+ if (d0 == 0x83) {
+ ldebug ("0x83[%d] -> %#x\n",
+ s->csp_reg83w,
+ s->csp_reg83[s->csp_reg83w % 4]);
+ dsp_out_data (s, s->csp_reg83[s->csp_reg83w % 4]);
+ s->csp_reg83w += 1;
+ }
+ else
+ dsp_out_data (s, s->csp_regs[d0]);
+ break;
- save_left = dsp->left_till_irq;
- save_pos = dsp->dma_pos;
- dma_cmd (0xc0, 0, d0 + (d1 << 8));
- dsp->left_till_irq = save_left;
- dsp->dma_pos = save_pos;
+ case 0x10:
+ d0 = dsp_get_data (s);
+ dolog ("cmd 0x10 d0=%#x\n", d0);
+ break;
- linfo ("set buffer size data[%d, %d] %d pos %d\n",
- d0, d1, dsp->dma_buffer_size, dsp->dma_pos);
- break;
- }
+ case 0x14:
+ dma_cmd8 (s, 0, dsp_get_lohi (s));
+ /* s->can_write = 0; */
+ /* qemu_mod_timer (s->aux_ts, qemu_get_clock (vm_clock) + (ticks_per_sec * 320) / 1000000); */
+ break;
case 0x40:
- dsp->time_const = dsp_get_data (dsp);
- linfo ("set time const %d\n", dsp->time_const);
+ s->time_const = dsp_get_data (s);
+ ldebug ("set time const %d\n", s->time_const);
break;
- case 0x41:
- case 0x42:
- d1 = dsp_get_data (dsp);
- d0 = dsp_get_data (dsp);
+ case 0x42: /* FT2 sets output freq with this, go figure */
+ dolog ("cmd 0x42 might not do what it think it should\n");
- dsp->freq = d1 + (d0 << 8);
- linfo ("set freq %#x, %#x = %d\n", d1, d0, dsp->freq);
+ case 0x41:
+ s->freq = dsp_get_hilo (s);
+ ldebug ("set freq %d\n", s->freq);
break;
case 0x48:
- d1 = dsp_get_data (dsp);
- d0 = dsp_get_data (dsp);
- dsp->dma_buffer_size = d1 + (d0 << 8);
- linfo ("set dma len %#x, %#x = %d\n",
- d1, d0, dsp->dma_buffer_size);
+ s->block_size = dsp_get_lohi (s);
+ /* s->highspeed = 1; */
+ ldebug ("set dma block len %d\n", s->block_size);
+ break;
+
+ case 0x80:
+ {
+ int samples, bytes;
+ int64_t ticks;
+
+ if (-1 == s->freq)
+ s->freq = 11025;
+ samples = dsp_get_lohi (s);
+ bytes = samples << s->fmt_stereo << (s->fmt_bits == 16);
+ ticks = ticks_per_sec / (s->freq / bytes);
+ if (ticks < ticks_per_sec / 1024)
+ pic_set_irq (s->irq, 1);
+ else
+ qemu_mod_timer (s->aux_ts, qemu_get_clock (vm_clock) + ticks);
+ ldebug ("mix silence %d %d %lld\n", samples, bytes, ticks);
+ }
break;
case 0xe0:
- d0 = dsp_get_data (dsp);
- dsp->out_data_len = 0;
- linfo ("data = %#x\n", d0);
- dsp_out_data (dsp, d0 ^ 0xff);
+ d0 = dsp_get_data (s);
+ s->out_data_len = 0;
+ ldebug ("E0 data = %#x\n", d0);
+ dsp_out_data(s, ~d0);
break;
- case 0xe4:
- dsp->test_reg = dsp_get_data (dsp);
+ case 0xe2:
+ d0 = dsp_get_data (s);
+ dolog ("E2 = %#x\n", d0);
break;
+ case 0xe4:
+ s->test_reg = dsp_get_data (s);
+ break;
case 0xf9:
- d0 = dsp_get_data (dsp);
- ldebug ("f9 <- %#x\n", d0);
+ d0 = dsp_get_data (s);
+ ldebug ("command 0xf9 with %#x\n", d0);
switch (d0) {
- case 0x0e: dsp_out_data (dsp, 0xff); break;
- case 0x0f: dsp_out_data (dsp, 0x07); break;
- case 0xf9: dsp_out_data (dsp, 0x00); break;
+ case 0x0e:
+ dsp_out_data (s, 0xff);
+ break;
+
+ case 0x0f:
+ dsp_out_data (s, 0x07);
+ break;
+
case 0x37:
- dsp_out_data (dsp, 0x38); break;
+ dsp_out_data (s, 0x38);
+ break;
+
default:
- dsp_out_data (dsp, 0);
+ dsp_out_data (s, 0x00);
+ break;
}
break;
default:
- dolog ("complete: unrecognized command %#x\n", dsp->cmd);
+ dolog ("complete: unrecognized command %#x\n", s->cmd);
return;
}
}
- dsp->needed_bytes = 0;
- dsp->cmd = -1;
+ ldebug ("\n");
+ s->cmd = -1;
return;
}
+static void reset (SB16State *s)
+{
+ pic_set_irq (s->irq, 0);
+ if (s->dma_auto) {
+ pic_set_irq (s->irq, 1);
+ pic_set_irq (s->irq, 0);
+ }
+
+ s->mixer_regs[0x82] = 0;
+ s->dma_auto = 0;
+ s->in_index = 0;
+ s->out_data_len = 0;
+ s->left_till_irq = 0;
+ s->needed_bytes = 0;
+ s->block_size = -1;
+ s->nzero = 0;
+ s->highspeed = 0;
+ s->v2x6 = 0;
+
+ dsp_out_data(s, 0xaa);
+ speaker (s, 0);
+ control (s, 0);
+}
+
static IO_WRITE_PROTO (dsp_write)
{
- SB16State *dsp = opaque;
+ SB16State *s = opaque;
int iport;
- iport = nport - sb.port;
+ iport = nport - s->port;
- ldebug ("dsp_write %#x <- %#x\n", nport, val);
+ ldebug ("write %#x <- %#x\n", nport, val);
switch (iport) {
- case 0x6:
- control (0);
- if (0 == val)
- dsp->v2x6 = 0;
- else if ((1 == val) && (0 == dsp->v2x6)) {
- dsp->v2x6 = 1;
- dsp->dma_pos = 0;
- dsp->dma_auto = 0;
- dsp->in_index = 0;
- dsp->out_data_len = 0;
- dsp->left_till_irq = 0;
- dsp->speaker = 0;
- dsp->needed_bytes = 0;
- pic_set_irq (sb.irq, 0);
- dsp_out_data(dsp, 0xaa);
+ case 0x06:
+ switch (val) {
+ case 0x00:
+ if (s->v2x6 == 1) {
+ if (0 && s->highspeed) {
+ s->highspeed = 0;
+ pic_set_irq (s->irq, 0);
+ control (s, 0);
+ }
+ else
+ reset (s);
+ }
+ s->v2x6 = 0;
+ break;
+
+ case 0x01:
+ case 0x03: /* FreeBSD kludge */
+ s->v2x6 = 1;
+ break;
+
+ case 0xc6:
+ s->v2x6 = 0; /* Prince of Persia, csp.sys, diagnose.exe */
+ break;
+
+ case 0xb8: /* Panic */
+ reset (s);
+ break;
+
+ case 0x39:
+ dsp_out_data (s, 0x38);
+ reset (s);
+ s->v2x6 = 0x39;
+ break;
+
+ default:
+ s->v2x6 = val;
+ break;
}
- else
- dsp->v2x6 = ~0;
break;
- case 0xc: /* write data or command | write status */
- if (0 == dsp->needed_bytes) {
- command (dsp, val);
- if (0 == dsp->needed_bytes) {
- log_dsp (dsp);
+ case 0x0c: /* write data or command | write status */
+/* if (s->highspeed) */
+/* break; */
+
+ if (0 == s->needed_bytes) {
+ command (s, val);
+#if 0
+ if (0 == s->needed_bytes) {
+ log_dsp (s);
}
+#endif
}
else {
- if (dsp->in_index == sizeof (dsp->in2_data)) {
+ if (s->in_index == sizeof (s->in2_data)) {
dolog ("in data overrun\n");
}
else {
- dsp->in2_data[dsp->in_index++] = val;
- if (dsp->in_index == dsp->needed_bytes) {
- dsp->needed_bytes = 0;
- complete (dsp);
- log_dsp (dsp);
+ s->in2_data[s->in_index++] = val;
+ if (s->in_index == s->needed_bytes) {
+ s->needed_bytes = 0;
+ complete (s);
+#if 0
+ log_dsp (s);
+#endif
+ }
}
}
- }
break;
default:
- dolog ("dsp_write (nport=%#x, val=%#x)\n", nport, val);
+ ldebug ("(nport=%#x, val=%#x)\n", nport, val);
break;
}
}
static IO_READ_PROTO (dsp_read)
{
- SB16State *dsp = opaque;
- int iport, retval;
+ SB16State *s = opaque;
+ int iport, retval, ack = 0;
- iport = nport - sb.port;
+ iport = nport - s->port;
switch (iport) {
- case 0x6: /* reset */
- control (0);
- retval = 0;
- dsp->speaker = 0;
+ case 0x06: /* reset */
+ retval = 0xff;
break;
- case 0xa: /* read data */
- if (dsp->out_data_len) {
- retval = dsp->out_data[--dsp->out_data_len];
- dsp->last_read_byte = retval;
- } else {
- retval = dsp->last_read_byte;
+ case 0x0a: /* read data */
+ if (s->out_data_len) {
+ retval = s->out_data[--s->out_data_len];
+ s->last_read_byte = retval;
+ }
+ else {
dolog ("empty output buffer\n");
+ retval = s->last_read_byte;
/* goto error; */
}
break;
- case 0xc: /* 0xxxxxxx can write */
- retval = 0;
- if (dsp->out_data_len == sizeof (dsp->out_data)) retval |= 0x80;
+ case 0x0c: /* 0 can write */
+ retval = s->can_write ? 0 : 0x80;
break;
- case 0xd: /* timer interrupt clear */
- dolog ("timer interrupt clear\n");
- goto error;
+ case 0x0d: /* timer interrupt clear */
+ /* dolog ("timer interrupt clear\n"); */
+ retval = 0;
+ break;
- case 0xe: /* data available status | irq 8 ack */
- /* XXX drop pic irq line here? */
- /* ldebug ("8 ack\n"); */
- retval = dsp->out_data_len ? 0x80 : 0;
- dsp->mixer_regs[0x82] &= ~dsp->mixer_regs[0x80];
- pic_set_irq (sb.irq, 0);
+ case 0x0e: /* data available status | irq 8 ack */
+ retval = (!s->out_data_len || s->highspeed) ? 0 : 0x80;
+ if (s->mixer_regs[0x82] & 1) {
+ ack = 1;
+ s->mixer_regs[0x82] &= 1;
+ pic_set_irq (s->irq, 0);
+ }
break;
- case 0xf: /* irq 16 ack */
- /* XXX drop pic irq line here? */
- ldebug ("16 ack\n");
+ case 0x0f: /* irq 16 ack */
retval = 0xff;
- dsp->mixer_regs[0x82] &= ~dsp->mixer_regs[0x80];
- pic_set_irq (sb.irq, 0);
+ if (s->mixer_regs[0x82] & 2) {
+ ack = 1;
+ s->mixer_regs[0x82] &= 2;
+ pic_set_irq (s->irq, 0);
+ }
break;
default:
goto error;
}
- if (0xe == iport) {
- if (0 == retval) {
- if (!dsp->nzero) {
- ldebug ("dsp_read (nport=%#x iport %#x) = %#x, %lld\n",
- nport, iport, retval, dsp->nzero);
- }
- dsp->nzero += 1;
- }
- else {
- ldebug ("dsp_read (nport=%#x iport %#x) = %#x, %lld\n",
- nport, iport, retval, dsp->nzero);
- dsp->nzero = 0;
- }
- }
- else {
- ldebug ("dsp_read (nport=%#x iport %#x) = %#x\n",
- nport, iport, retval);
- }
+ if (!ack)
+ ldebug ("read %#x -> %#x\n", nport, retval);
return retval;
error:
- printf ("dsp_read error %#x\n", nport);
+ dolog ("WARNING dsp_read %#x error\n", nport);
return 0xff;
}
+static void reset_mixer (SB16State *s)
+{
+ int i;
+
+ memset (s->mixer_regs, 0xff, 0x7f);
+ memset (s->mixer_regs + 0x83, 0xff, sizeof (s->mixer_regs) - 0x83);
+
+ s->mixer_regs[0x02] = 4; /* master volume 3bits */
+ s->mixer_regs[0x06] = 4; /* MIDI volume 3bits */
+ s->mixer_regs[0x08] = 0; /* CD volume 3bits */
+ s->mixer_regs[0x0a] = 0; /* voice volume 2bits */
+
+ /* d5=input filt, d3=lowpass filt, d1,d2=input source */
+ s->mixer_regs[0x0c] = 0;
+
+ /* d5=output filt, d1=stereo switch */
+ s->mixer_regs[0x0e] = 0;
+
+ /* voice volume L d5,d7, R d1,d3 */
+ s->mixer_regs[0x04] = (4 << 5) | (4 << 1);
+ /* master ... */
+ s->mixer_regs[0x22] = (4 << 5) | (4 << 1);
+ /* MIDI ... */
+ s->mixer_regs[0x26] = (4 << 5) | (4 << 1);
+
+ for (i = 0x30; i < 0x48; i++) {
+ s->mixer_regs[i] = 0x20;
+ }
+}
+
static IO_WRITE_PROTO(mixer_write_indexb)
{
- SB16State *dsp = opaque;
- dsp->mixer_nreg = val;
+ SB16State *s = opaque;
+ s->mixer_nreg = val;
}
static IO_WRITE_PROTO(mixer_write_datab)
{
- SB16State *dsp = opaque;
- int i;
+ SB16State *s = opaque;
+
+ ldebug ("mixer_write [%#x] <- %#x\n", s->mixer_nreg, val);
+ if (s->mixer_nreg > sizeof (s->mixer_regs))
+ return;
- linfo ("mixer [%#x] <- %#x\n", dsp->mixer_nreg, val);
- switch (dsp->mixer_nreg) {
+ switch (s->mixer_nreg) {
case 0x00:
- /* Bochs */
- dsp->mixer_regs[0x04] = 0xcc;
- dsp->mixer_regs[0x0a] = 0x00;
- dsp->mixer_regs[0x22] = 0xcc;
- dsp->mixer_regs[0x26] = 0xcc;
- dsp->mixer_regs[0x28] = 0x00;
- dsp->mixer_regs[0x2e] = 0x00;
- dsp->mixer_regs[0x3c] = 0x1f;
- dsp->mixer_regs[0x3d] = 0x15;
- dsp->mixer_regs[0x3e] = 0x0b;
-
- for (i = 0x30; i <= 0x35; i++)
- dsp->mixer_regs[i] = 0xc0;
-
- for (i = 0x36; i <= 0x3b; i++)
- dsp->mixer_regs[i] = 0x00;
-
- for (i = 0x3f; i <= 0x43; i++)
- dsp->mixer_regs[i] = 0x00;
-
- for (i = 0x44; i <= 0x47; i++)
- dsp->mixer_regs[i] = 0x80;
-
- for (i = 0x30; i < 0x48; i++) {
- dsp->mixer_regs[i] = 0x20;
- }
+ reset_mixer (s);
break;
- case 0x04:
- case 0x0a:
- case 0x22:
- case 0x26:
- case 0x28:
- case 0x2e:
- case 0x30:
- case 0x31:
- case 0x32:
- case 0x33:
- case 0x34:
- case 0x35:
- case 0x36:
- case 0x37:
- case 0x38:
- case 0x39:
- case 0x3a:
- case 0x3b:
- case 0x3c:
- case 0x3d:
- case 0x3e:
- case 0x3f:
- case 0x40:
- case 0x41:
- case 0x42:
- case 0x43:
- case 0x44:
- case 0x45:
- case 0x46:
- case 0x47:
case 0x80:
- case 0x81:
+ {
+ int irq = irq_of_magic (val);
+ ldebug ("setting irq to %d (val=%#x)\n", irq, val);
+ if (irq > 0)
+ s->irq = irq;
+ }
break;
- default:
- return;
- }
- dsp->mixer_regs[dsp->mixer_nreg] = val;
-}
-static IO_WRITE_PROTO(mpu_write)
-{
- linfo ("mpu: %#x\n", val);
-}
+ case 0x81:
+ {
+ int dma, hdma;
-static IO_WRITE_PROTO(adlib_write)
-{
- linfo ("adlib: %#x\n", val);
-}
+ dma = lsbindex (val & 0xf);
+ hdma = lsbindex (val & 0xf0);
+ dolog ("attempt to set DMA register 8bit %d, 16bit %d (val=%#x)\n",
+ dma, hdma, val);
+#if 0
+ s->dma = dma;
+ s->hdma = hdma;
+#endif
+ }
+ break;
-static IO_READ_PROTO(mpu_read)
-{
- linfo ("mpu read: %#x\n", nport);
- return 0x80;
-}
+ case 0x82:
+ dolog ("attempt to write into IRQ status register (val=%#x)\n",
+ val);
+ return;
-static IO_READ_PROTO(adlib_read)
-{
- linfo ("adlib read: %#x\n", nport);
- return 0;
+ default:
+ if (s->mixer_nreg >= 0x80)
+ dolog ("attempt to write mixer[%#x] <- %#x\n", s->mixer_nreg, val);
+ break;
+ }
+
+ s->mixer_regs[s->mixer_nreg] = val;
}
static IO_WRITE_PROTO(mixer_write_indexw)
@@ -765,194 +962,229 @@ static IO_WRITE_PROTO(mixer_write_indexw)
static IO_READ_PROTO(mixer_read)
{
- SB16State *dsp = opaque;
- linfo ("mixer [%#x] -> %#x\n", dsp->mixer_nreg, dsp->mixer_regs[dsp->mixer_nreg]);
- return dsp->mixer_regs[dsp->mixer_nreg];
-}
-
-void SB16_run (void)
-{
- if (0 == dsp.speaker)
- return;
-
- AUD_run ();
+ SB16State *s = opaque;
+ ldebug ("mixer_read[%#x] -> %#x\n",
+ s->mixer_nreg, s->mixer_regs[s->mixer_nreg]);
+ return s->mixer_regs[s->mixer_nreg];
}
-static int write_audio (uint32_t addr, int len, int size)
+static int write_audio (SB16State *s, int nchan, int dma_pos,
+ int dma_len, int len)
{
int temp, net;
uint8_t tmpbuf[4096];
- temp = size;
-
+ temp = len;
net = 0;
while (temp) {
- int left_till_end;
- int to_copy;
- int copied;
+ int left = dma_len - dma_pos;
+ int to_copy, copied;
- left_till_end = len - dsp.dma_pos;
-
- to_copy = MIN (temp, left_till_end);
+ to_copy = audio_MIN (temp, left);
if (to_copy > sizeof(tmpbuf))
to_copy = sizeof(tmpbuf);
- cpu_physical_memory_read(addr + dsp.dma_pos, tmpbuf, to_copy);
- copied = AUD_write (tmpbuf, to_copy);
- temp -= copied;
- dsp.dma_pos += copied;
-
- if (dsp.dma_pos == len) {
- dsp.dma_pos = 0;
- }
+ copied = DMA_read_memory (nchan, tmpbuf, dma_pos, to_copy);
+ copied = AUD_write (s->voice, tmpbuf, copied);
+ temp -= copied;
+ dma_pos = (dma_pos + copied) % dma_len;
net += copied;
- if (copied != to_copy)
- return net;
+ if (!copied)
+ break;
}
return net;
}
-static int SB_read_DMA (void *opaque, target_ulong addr, int size)
+static int SB_read_DMA (void *opaque, int nchan, int dma_pos, int dma_len)
{
- SB16State *dsp = opaque;
- int free, till, copy, written;
-
- if (0 == dsp->speaker)
- return 0;
+ SB16State *s = opaque;
+ int free, rfree, till, copy, written, elapsed;
- if (dsp->left_till_irq < 0) {
- ldebug ("left_till_irq < 0, %d, pos %d \n",
- dsp->left_till_irq, dsp->dma_buffer_size);
- dsp->left_till_irq += dsp->dma_buffer_size;
- return dsp->dma_pos;
+ if (s->left_till_irq < 0) {
+ s->left_till_irq = s->block_size;
}
- free = AUD_get_free ();
-
- if ((free <= 0) || (0 == size)) {
- ldebug ("returning, since free = %d and size = %d\n", free, size);
- return dsp->dma_pos;
- }
+ elapsed = AUD_calc_elapsed (s->voice);
+ free = elapsed;/* AUD_get_free (s->voice); */
+ rfree = free;
+ free = audio_MIN (free, elapsed) & ~s->align;
- if (mix_block > 0) {
- copy = MIN (free, mix_block);
- }
- else {
- copy = free;
+ if ((free <= 0) || !dma_len) {
+ return dma_pos;
}
- till = dsp->left_till_irq;
+ copy = free;
+ till = s->left_till_irq;
#ifdef DEBUG_SB16_MOST
- ldebug ("addr:%#010x free:%d till:%d size:%d\n",
- addr, free, till, size);
+ dolog ("pos:%06d free:%d,%d till:%d len:%d\n",
+ dma_pos, free, AUD_get_free (s->voice), till, dma_len);
#endif
if (till <= copy) {
- if (0 == dsp->dma_auto) {
+ if (0 == s->dma_auto) {
copy = till;
}
}
- written = write_audio (addr, size, copy);
- dsp->left_till_irq -= written;
- AUD_adjust_estimate (free - written);
+ written = write_audio (s, nchan, dma_pos, dma_len, copy);
+ dma_pos = (dma_pos + written) % dma_len;
+ s->left_till_irq -= written;
- if (dsp->left_till_irq <= 0) {
- dsp->mixer_regs[0x82] |= dsp->mixer_regs[0x80];
- if (0 == noirq) {
- ldebug ("request irq pos %d, left %d\n",
- dsp->dma_pos, dsp->left_till_irq);
- pic_set_irq(sb.irq, 1);
- }
-
- if (0 == dsp->dma_auto) {
- control (0);
+ if (s->left_till_irq <= 0) {
+ s->mixer_regs[0x82] |= (nchan & 4) ? 2 : 1;
+ pic_set_irq (s->irq, 1);
+ if (0 == s->dma_auto) {
+ control (s, 0);
+ speaker (s, 0);
}
}
#ifdef DEBUG_SB16_MOST
ldebug ("pos %5d free %5d size %5d till % 5d copy %5d dma size %5d\n",
- dsp->dma_pos, free, size, dsp->left_till_irq, copy,
- dsp->dma_buffer_size);
+ dma_pos, free, dma_len, s->left_till_irq, copy, s->block_size);
#endif
- if (dsp->left_till_irq <= 0) {
- dsp->left_till_irq += dsp->dma_buffer_size;
+ while (s->left_till_irq <= 0) {
+ s->left_till_irq = s->block_size + s->left_till_irq;
}
- return dsp->dma_pos;
-}
-
-static int magic_of_irq (int irq)
-{
- switch (irq) {
- case 2:
- return 1;
- case 5:
- return 2;
- case 7:
- return 4;
- case 10:
- return 8;
- default:
- dolog ("bad irq %d\n", irq);
- return 2;
- }
+ AUD_adjust (s->voice, written);
+ return dma_pos;
}
-#if 0
-static int irq_of_magic (int magic)
+void SB_timer (void *opaque)
{
- switch (magic) {
- case 1:
- return 2;
- case 2:
- return 5;
- case 4:
- return 7;
- case 8:
- return 10;
- default:
- dolog ("bad irq magic %d\n", magic);
- return 2;
- }
+ SB16State *s = opaque;
+ AUD_run ();
+ qemu_mod_timer (s->ts, qemu_get_clock (vm_clock) + 1);
}
-#endif
-#ifdef SB16_TRAP_ALL
-static IO_READ_PROTO (trap_read)
+static void SB_save (QEMUFile *f, void *opaque)
{
- switch (nport) {
- case 0x220:
- return 0;
- case 0x226:
- case 0x22a:
- case 0x22c:
- case 0x22d:
- case 0x22e:
- case 0x22f:
- return dsp_read (opaque, nport);
- }
- linfo ("trap_read: %#x\n", nport);
- return 0xff;
+ SB16State *s = opaque;
+
+ qemu_put_be32s (f, &s->irq);
+ qemu_put_be32s (f, &s->dma);
+ qemu_put_be32s (f, &s->hdma);
+ qemu_put_be32s (f, &s->port);
+ qemu_put_be32s (f, &s->ver);
+ qemu_put_be32s (f, &s->in_index);
+ qemu_put_be32s (f, &s->out_data_len);
+ qemu_put_be32s (f, &s->fmt_stereo);
+ qemu_put_be32s (f, &s->fmt_signed);
+ qemu_put_be32s (f, &s->fmt_bits);
+ qemu_put_be32s (f, &s->fmt);
+ qemu_put_be32s (f, &s->dma_auto);
+ qemu_put_be32s (f, &s->block_size);
+ qemu_put_be32s (f, &s->fifo);
+ qemu_put_be32s (f, &s->freq);
+ qemu_put_be32s (f, &s->time_const);
+ qemu_put_be32s (f, &s->speaker);
+ qemu_put_be32s (f, &s->needed_bytes);
+ qemu_put_be32s (f, &s->cmd);
+ qemu_put_be32s (f, &s->use_hdma);
+ qemu_put_be32s (f, &s->highspeed);
+ qemu_put_be32s (f, &s->can_write);
+ qemu_put_be32s (f, &s->v2x6);
+
+ qemu_put_8s (f, &s->csp_param);
+ qemu_put_8s (f, &s->csp_value);
+ qemu_put_8s (f, &s->csp_mode);
+ qemu_put_8s (f, &s->csp_param);
+ qemu_put_buffer (f, s->csp_regs, 256);
+ qemu_put_8s (f, &s->csp_index);
+ qemu_put_buffer (f, s->csp_reg83, 4);
+ qemu_put_be32s (f, &s->csp_reg83r);
+ qemu_put_be32s (f, &s->csp_reg83w);
+
+ qemu_put_buffer (f, s->in2_data, sizeof (s->in2_data));
+ qemu_put_buffer (f, s->out_data, sizeof (s->out_data));
+ qemu_put_8s (f, &s->test_reg);
+ qemu_put_8s (f, &s->last_read_byte);
+
+ qemu_put_be32s (f, &s->nzero);
+ qemu_put_be32s (f, &s->left_till_irq);
+ qemu_put_be32s (f, &s->dma_running);
+ qemu_put_be32s (f, &s->bytes_per_second);
+ qemu_put_be32s (f, &s->align);
+
+ qemu_put_be32s (f, &s->mixer_nreg);
+ qemu_put_buffer (f, s->mixer_regs, 256);
}
-static IO_WRITE_PROTO (trap_write)
+static int SB_load (QEMUFile *f, void *opaque, int version_id)
{
- switch (nport) {
- case 0x226:
- case 0x22c:
- dsp_write (opaque, nport, val);
- return;
+ SB16State *s = opaque;
+
+ if (version_id != 1)
+ return -EINVAL;
+
+ qemu_get_be32s (f, &s->irq);
+ qemu_get_be32s (f, &s->dma);
+ qemu_get_be32s (f, &s->hdma);
+ qemu_get_be32s (f, &s->port);
+ qemu_get_be32s (f, &s->ver);
+ qemu_get_be32s (f, &s->in_index);
+ qemu_get_be32s (f, &s->out_data_len);
+ qemu_get_be32s (f, &s->fmt_stereo);
+ qemu_get_be32s (f, &s->fmt_signed);
+ qemu_get_be32s (f, &s->fmt_bits);
+ qemu_get_be32s (f, &s->fmt);
+ qemu_get_be32s (f, &s->dma_auto);
+ qemu_get_be32s (f, &s->block_size);
+ qemu_get_be32s (f, &s->fifo);
+ qemu_get_be32s (f, &s->freq);
+ qemu_get_be32s (f, &s->time_const);
+ qemu_get_be32s (f, &s->speaker);
+ qemu_get_be32s (f, &s->needed_bytes);
+ qemu_get_be32s (f, &s->cmd);
+ qemu_get_be32s (f, &s->use_hdma);
+ qemu_get_be32s (f, &s->highspeed);
+ qemu_get_be32s (f, &s->can_write);
+ qemu_get_be32s (f, &s->v2x6);
+
+ qemu_get_8s (f, &s->csp_param);
+ qemu_get_8s (f, &s->csp_value);
+ qemu_get_8s (f, &s->csp_mode);
+ qemu_get_8s (f, &s->csp_param);
+ qemu_get_buffer (f, s->csp_regs, 256);
+ qemu_get_8s (f, &s->csp_index);
+ qemu_get_buffer (f, s->csp_reg83, 4);
+ qemu_get_be32s (f, &s->csp_reg83r);
+ qemu_get_be32s (f, &s->csp_reg83w);
+
+ qemu_get_buffer (f, s->in2_data, sizeof (s->in2_data));
+ qemu_get_buffer (f, s->out_data, sizeof (s->out_data));
+ qemu_get_8s (f, &s->test_reg);
+ qemu_get_8s (f, &s->last_read_byte);
+
+ qemu_get_be32s (f, &s->nzero);
+ qemu_get_be32s (f, &s->left_till_irq);
+ qemu_get_be32s (f, &s->dma_running);
+ qemu_get_be32s (f, &s->bytes_per_second);
+ qemu_get_be32s (f, &s->align);
+
+ qemu_get_be32s (f, &s->mixer_nreg);
+ qemu_get_buffer (f, s->mixer_regs, 256);
+
+ if (s->voice)
+ AUD_reset (s->voice);
+
+ if (s->dma_running) {
+ if (s->freq)
+ s->voice = AUD_open (s->voice, "sb16", s->freq,
+ 1 << s->fmt_stereo, s->fmt);
+
+ control (s, 1);
+ speaker (s, s->speaker);
}
- linfo ("trap_write: %#x = %#x\n", nport, val);
+ return 0;
}
-#endif
void SB16_init (void)
{
@@ -961,47 +1193,45 @@ void SB16_init (void)
static const uint8_t dsp_write_ports[] = {0x6, 0xc};
static const uint8_t dsp_read_ports[] = {0x6, 0xa, 0xc, 0xd, 0xe, 0xf};
- memset(s->mixer_regs, 0xff, sizeof(s->mixer_regs));
+ s->ts = qemu_new_timer (vm_clock, SB_timer, s);
+ if (!s->ts)
+ return;
+
+ s->irq = conf.irq;
+ s->dma = conf.dma;
+ s->hdma = conf.hdma;
+ s->port = conf.port;
+ s->ver = conf.ver_lo | (conf.ver_hi << 8);
- s->mixer_regs[0x00] = 0;
- s->mixer_regs[0x0e] = ~0;
- s->mixer_regs[0x80] = magic_of_irq (sb.irq);
- s->mixer_regs[0x81] = 0x80 | 0x10 | (sb.dma << 1);
- s->mixer_regs[0x82] = 0;
- s->mixer_regs[0xfd] = 16; /* bochs */
- s->mixer_regs[0xfe] = 6; /* bochs */
- mixer_write_indexw (s, 0x224, 0);
-
-#ifdef SB16_TRAP_ALL
- for (i = 0; i < 0x100; i++) {
- if (i != 4 && i != 5) {
- register_ioport_write (sb.port + i, 1, 1, trap_write, s);
- register_ioport_read (sb.port + i, 1, 1, trap_read, s);
- }
- }
-#else
+ s->mixer_regs[0x80] = magic_of_irq (s->irq);
+ s->mixer_regs[0x81] = (1 << s->dma) | (1 << s->hdma);
+ s->mixer_regs[0x82] = 2 << 5;
+
+ s->csp_regs[5] = 1;
+ s->csp_regs[9] = 0xf8;
+
+ reset_mixer (s);
+ s->aux_ts = qemu_new_timer (vm_clock, aux_timer, s);
+ if (!s->aux_ts)
+ return;
for (i = 0; i < LENOFA (dsp_write_ports); i++) {
- register_ioport_write (sb.port + dsp_write_ports[i], 1, 1, dsp_write, s);
+ register_ioport_write (s->port + dsp_write_ports[i], 1, 1, dsp_write, s);
}
for (i = 0; i < LENOFA (dsp_read_ports); i++) {
- register_ioport_read (sb.port + dsp_read_ports[i], 1, 1, dsp_read, s);
+ register_ioport_read (s->port + dsp_read_ports[i], 1, 1, dsp_read, s);
}
-#endif
- register_ioport_write (sb.port + 0x4, 1, 1, mixer_write_indexb, s);
- register_ioport_write (sb.port + 0x4, 1, 2, mixer_write_indexw, s);
- register_ioport_read (sb.port + 0x5, 1, 1, mixer_read, s);
- register_ioport_write (sb.port + 0x5, 1, 1, mixer_write_datab, s);
+ register_ioport_write (s->port + 0x4, 1, 1, mixer_write_indexb, s);
+ register_ioport_write (s->port + 0x4, 1, 2, mixer_write_indexw, s);
+ register_ioport_read (s->port + 0x5, 1, 1, mixer_read, s);
+ register_ioport_write (s->port + 0x5, 1, 1, mixer_write_datab, s);
- for (i = 0; 4 < 4; i++) {
- register_ioport_read (0x330 + i, 1, 1, mpu_read, s);
- register_ioport_write (0x330 + i, 1, 1, mpu_write, s);
- register_ioport_read (0x388 + i, 1, 1, adlib_read, s);
- register_ioport_write (0x388 + i, 1, 1, adlib_write, s);
- }
+ DMA_register_channel (s->hdma, SB_read_DMA, s);
+ DMA_register_channel (s->dma, SB_read_DMA, s);
+ s->can_write = 1;
- DMA_register_channel (sb.hdma, SB_read_DMA, s);
- DMA_register_channel (sb.dma, SB_read_DMA, s);
+ qemu_mod_timer (s->ts, qemu_get_clock (vm_clock) + 1);
+ register_savevm ("sb16", 0, 1, SB_save, SB_load, s);
}
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-12 14:33:04 +0000